component
ATmega32U4
Public Made by Adomby adom
Microchip 8-bit AVR MCU with native full-speed USB, TQFP-44. 32 KB flash, 16 MHz, the Arduino Leonardo chip. Datasheet-verified.
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Symbol & Footprint
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Datasheet
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README
markdownATmega32U4
Microchip Technology · 8-bit AVR MCU with USB · TQFP-44
An 8-bit AVR microcontroller with a full-speed USB device controller built in, in TQFP-44, the chip behind the Arduino Leonardo, Micro, and Pro Micro. Because the USB peripheral is on-chip (D+/D- go straight to the connector) it enumerates as a keyboard, mouse, MIDI device, or serial port with no FT232 or CH340 helper. It has 32 KB of flash, 2.5 KB SRAM, and 1 KB EEPROM, runs the AVR core at up to 16 MHz, and brings out 26 I/O, a 12-channel 10-bit ADC, four timers with PWM, and hardware SPI and I2C. Datasheet-verified 44-pin pinout.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | PE6/INT6/AIN0 | bidirectional | Port E bit 6 GPIO with internal pull-up. Alternate: INT6 external interrupt input, AIN0 analog comparator positive input. Tri-stated on reset. |
| 2 | UVCC | power_in | USB pads internal 3.3V regulator input supply voltage. Connect to VCC through a decoupling network per USB module requirements. |
| 3 | D- | bidirectional | USB 2.0 Full-Speed/Low-Speed negative data upstream port. Connect to the USB connector D- pin through a 22Ω series resistor. |
| 4 | D+ | bidirectional | USB 2.0 Full-Speed/Low-Speed positive data upstream port. Connect to the USB connector D+ pin through a 22Ω series resistor. |
| 5 | UGND | power_in | USB pads ground reference. Tie to system GND. |
| 6 | UCAP | passive | USB pads internal 3.3V regulator output. Connect to an external 1µF ceramic bypass capacitor to GND. |
| 7 | VBUS | input | USB VBUS monitor input used by firmware to detect host connection/disconnection. Sensed via internal comparator; may be connected to the USB VBUS rail (nominal 5V) directly or through a divider. |
| 8 | PB0/SS/PCINT0 | bidirectional | Port B bit 0 GPIO with internal pull-up. Alternate: SPI slave-select (SS), pin-change interrupt PCINT0. |
| 9 | PB1/SCLK/PCINT1 | bidirectional | Port B bit 1 GPIO with internal pull-up. Alternate: SPI serial clock (SCLK/SCK), pin-change interrupt PCINT1. |
| 10 | PB2/PDI/MOSI/PCINT2 | bidirectional | Port B bit 2 GPIO with internal pull-up. Alternate: SPI MOSI, ISP programming data input (PDI), pin-change interrupt PCINT2. |
| 11 | PB3/PDO/MISO/PCINT3 | bidirectional | Port B bit 3 GPIO with internal pull-up. Alternate: SPI MISO, ISP programming data output (PDO), pin-change interrupt PCINT3. |
| 12 | PB7/OC0A/OC1C/RTS/PCINT7 | bidirectional | Port B bit 7 GPIO with internal pull-up. Alternate: Timer/Counter 0 output compare A (OC0A), Timer/Counter 1 output compare C (OC1C), USART RTS flow-control, pin-change interrupt PCINT7. |
| 13 | RESET | input | Active-low external reset input. A low level longer than the minimum pulse length triggers a reset even without the clock running. Has an internal pull-up; drive with an open-drain source or add an external pull-up + decoupling cap. |
| 14 | VCC | power_in | Digital supply voltage (2.7-5.5V). Decouple to GND with a 100nF ceramic close to the pin. |
| 15 | GND | power_in | Digital ground reference. |
| 16 | XTAL2 | output | Output from the inverting on-chip oscillator amplifier. Connect to the far side of the external crystal/resonator with the appropriate load capacitor. Leave open when driving XTAL1 from an external clock. |
| 17 | XTAL1 | input | Input to the inverting on-chip oscillator amplifier and the internal clock generator. Connect to the near side of the external crystal/resonator or to an external CMOS clock source. |
| 18 | PD0/OC0B/SCL/INT0 | bidirectional | Port D bit 0 GPIO with internal pull-up. Alternate: Timer/Counter 0 output compare B (OC0B), TWI (I²C) clock line SCL, external interrupt INT0. |
| 19 | PD1/SDA/INT1 | bidirectional | Port D bit 1 GPIO with internal pull-up. Alternate: TWI (I²C) data line SDA, external interrupt INT1. |
| 20 | PD2/RXD1/INT2 | bidirectional | Port D bit 2 GPIO with internal pull-up. Alternate: USART1 receive data (RXD1), external interrupt INT2. |
| 21 | PD3/TXD1/INT3 | bidirectional | Port D bit 3 GPIO with internal pull-up. Alternate: USART1 transmit data (TXD1), external interrupt INT3. |
| 22 | PD5/XCK1/CTS | bidirectional | Port D bit 5 GPIO with internal pull-up. Alternate: USART1 synchronous clock (XCK1), USART CTS hardware flow-control. |
| 23 | GND | power_in | Digital ground reference (second GND pin). |
| 24 | AVCC | power_in | Supply voltage for Port F and the A/D converter. If the ADC is unused, tie directly to VCC; if used, connect to VCC through a low-pass (typ. 10Ω + 100nF). |
| 25 | PD4/ICP1/ADC8 | bidirectional | Port D bit 4 GPIO with internal pull-up. Alternate: Timer/Counter 1 input capture (ICP1), ADC channel 8 analog input. |
| 26 | PD6/T1/OC4D/ADC9 | bidirectional | Port D bit 6 GPIO with internal pull-up. Alternate: Timer/Counter 1 external clock (T1), Timer/Counter 4 output compare D inverted (OC4D̅), ADC channel 9 analog input. |
| 27 | PD7/T0/OC4D/ADC10 | bidirectional | Port D bit 7 GPIO with internal pull-up. Alternate: Timer/Counter 0 external clock (T0), Timer/Counter 4 output compare D (OC4D), ADC channel 10 analog input. |
| 28 | PB4/PCINT4/ADC11 | bidirectional | Port B bit 4 GPIO with internal pull-up. Alternate: pin-change interrupt PCINT4, ADC channel 11 analog input. |
| 29 | PB5/PCINT5/OC1A/OC4B/ADC12 | bidirectional | Port B bit 5 GPIO with internal pull-up. Alternate: pin-change interrupt PCINT5, Timer/Counter 1 output compare A (OC1A), Timer/Counter 4 output compare B inverted (OC4B̅), ADC channel 12 analog input. |
| 30 | PB6/PCINT6/OC1B/OC4B/ADC13 | bidirectional | Port B bit 6 GPIO with internal pull-up. Alternate: pin-change interrupt PCINT6, Timer/Counter 1 output compare B (OC1B), Timer/Counter 4 output compare B (OC4B), ADC channel 13 analog input. |
| 31 | PC6/OC3A/OC4A | bidirectional | Port C bit 6 GPIO with internal pull-up. Alternate: Timer/Counter 3 output compare A (OC3A), Timer/Counter 4 output compare A inverted (OC4A̅). |
| 32 | PC7/ICP3/CLK0/OC4A | bidirectional | Port C bit 7 GPIO with internal pull-up. Alternate: Timer/Counter 3 input capture (ICP3), system clock output (CLK0/CLKO), Timer/Counter 4 output compare A (OC4A). |
| 33 | PE2/HWB | bidirectional | Port E bit 2 GPIO with internal pull-up. Alternate: Hardware Bootloader (HWB) select input, latched at reset to force execution of the bootloader when pulled low. Often tied to a button + pull-up for USB DFU entry. |
| 34 | VCC | power_in | Digital supply voltage (2.7-5.5V), second VCC pin. Decouple locally with a 100nF ceramic to GND. |
| 35 | GND | power_in | Digital ground reference (third GND pin). |
| 36 | PF7/ADC7/TDI | bidirectional | Port F bit 7 GPIO with internal pull-up. Alternate: ADC channel 7 analog input, JTAG test data input (TDI). When JTAG is enabled the internal pull-up is forced active even in reset. |
| 37 | PF6/ADC6/TDO | bidirectional | Port F bit 6 GPIO with internal pull-up. Alternate: ADC channel 6 analog input, JTAG test data output (TDO). |
| 38 | PF5/ADC5/TMS | bidirectional | Port F bit 5 GPIO with internal pull-up. Alternate: ADC channel 5 analog input, JTAG test mode select (TMS). When JTAG is enabled the internal pull-up is forced active even in reset. |
| 39 | PF4/ADC4/TCK | bidirectional | Port F bit 4 GPIO with internal pull-up. Alternate: ADC channel 4 analog input, JTAG test clock (TCK). When JTAG is enabled the internal pull-up is forced active even in reset. |
| 40 | PF1/ADC1 | bidirectional | Port F bit 1 GPIO with internal pull-up. Alternate: ADC channel 1 analog input. |
| 41 | PF0/ADC0 | bidirectional | Port F bit 0 GPIO with internal pull-up. Alternate: ADC channel 0 analog input. |
| 42 | AREF | passive | Analog reference input for the A/D converter. Connect an external reference or decouple to GND with 100nF when using AVCC/internal 2.56V reference. Must not exceed AVCC. |
| 43 | GND | power_in | Analog ground reference; tie to GND star point near AVCC decoupling. |
| 44 | AVCC | power_in | Analog supply voltage for Port F and the A/D converter (second AVCC pin). If the ADC is unused, tie directly to VCC; if used, connect to VCC through a low-pass filter. |
Key specifications
| Parameter | Value |
|---|---|
| Core | 8-bit AVR RISC |
| Flash | 32 KB |
| SRAM | 2.5 KB |
| EEPROM | 1 KB |
| USB | full-speed device (on-chip, no external PHY) |
| Max clock | 16 MHz |
| I/O | 26 |
| ADC | 12-channel 10-bit |
| Supply voltage | 2.7-5.5 V |
| Package | TQFP-44 |
Ordering variants
ATmega32U4-AU (TQFP-44)ATmega32U4-MU (QFN-44)
CAD (KiCad official)
- Symbol:
MCU_Microchip_ATmega:ATmega32U4-A - Footprint:
Package_QFP:TQFP-44_10x10mm_P0.8mm - 3D model: TQFP-44 (KiCad packages3D)
- 3D model files:
atmega32u4-etched.step/atmega32u4-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);atmega32u4.step/atmega32u4.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Microchip Technology datasheet (12 pp, sha256
8ead4c44bcf240ef, retrieved 2026-08-17, tier: manufacturer) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).