component
ATMEGA3290PV-10AU
Public Made by Adomby adom
Microchip Tech Pre-ordered MCUs, TQFP-100(14x14). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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ATMEGA3290PV-10AU
Microchip Tech · Pre-ordered MCUs · TQFP-100(14x14)
ATMEGA3290PV-10AU from Microchip Tech, in a TQFP-100(14x14). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | LCDCAP | passive | LCD controller capacitor connection; the provided pages name this pin in Figure 1-2 but do not state its electrical limits. |
| 2 | PE0 | bidirectional | Port E bit 0 is a bi-directional I/O with selectable internal pull-up, tri-stated at reset, and also serves RXD (USART receive) and PCINT0. |
| 3 | PE1 | bidirectional | Port E bit 1 is a bi-directional I/O with selectable internal pull-up, tri-stated at reset, and also serves TXD (USART transmit) and PCINT1. |
| 4 | PE2 | bidirectional | Port E bit 2 is a bi-directional I/O with selectable internal pull-up, tri-stated at reset, and also serves XCK, analog comparator input AIN0 and PCINT2. |
| 5 | PE3 | bidirectional | Port E bit 3 is a bi-directional I/O with selectable internal pull-up, tri-stated at reset, and also serves analog comparator input AIN1 and PCINT3. |
| 6 | PE4 | bidirectional | Port E bit 4 is a bi-directional I/O with selectable internal pull-up, tri-stated at reset, and also serves USI clock USCK/SCL and PCINT4. |
| 7 | PE5 | bidirectional | Port E bit 5 is a bi-directional I/O with selectable internal pull-up, tri-stated at reset, and also serves USI data input DI/SDA and PCINT5. |
| 8 | PE6 | bidirectional | Port E bit 6 is a bi-directional I/O with selectable internal pull-up, tri-stated at reset, and also serves USI data output DO and PCINT6. |
| 9 | PE7 | bidirectional | Port E bit 7 is a bi-directional I/O with selectable internal pull-up, tri-stated at reset, and also serves CLKO and PCINT7. |
| 10 | VCC | power_in | Digital supply voltage; the ATmega3290PV-10AU is rated 1.8 - 5.5V at 10 MHz. |
| 11 | GND | power_in | Ground reference for the digital supply. |
| 12 | DNC | unconnected | Do not connect; this pin is marked DNC in Figure 1-2. |
| 13 | PJ0 | bidirectional | Port J bit 0 is a bi-directional I/O with selectable internal pull-up, tri-stated at reset, and also serves PCINT24 and LCD segment SEG35. |
| 14 | PJ1 | bidirectional | Port J bit 1 is a bi-directional I/O with selectable internal pull-up, tri-stated at reset, and also serves PCINT25 and LCD segment SEG34. |
| 15 | DNC | unconnected | Do not connect; this pin is marked DNC in Figure 1-2. |
| 16 | DNC | unconnected | Do not connect; this pin is marked DNC in Figure 1-2. |
| 17 | DNC | unconnected | Do not connect; this pin is marked DNC in Figure 1-2. |
| 18 | DNC | unconnected | Do not connect; this pin is marked DNC in Figure 1-2. |
| 19 | PB0 | bidirectional | Port B bit 0 is a bi-directional I/O with selectable internal pull-up, tri-stated at reset, has better drive capability than other ports, and also serves SPI SS and PCINT8. |
| 20 | PB1 | bidirectional | Port B bit 1 is a bi-directional I/O with selectable internal pull-up, tri-stated at reset, has better drive capability than other ports, and also serves SPI SCK and PCINT9. |
| 21 | PB2 | bidirectional | Port B bit 2 is a bi-directional I/O with selectable internal pull-up, tri-stated at reset, has better drive capability than other ports, and also serves SPI MOSI and PCINT10. |
| 22 | PB3 | bidirectional | Port B bit 3 is a bi-directional I/O with selectable internal pull-up, tri-stated at reset, has better drive capability than other ports, and also serves SPI MISO and PCINT11. |
| 23 | PB4 | bidirectional | Port B bit 4 is a bi-directional I/O with selectable internal pull-up, tri-stated at reset, has better drive capability than other ports, and also serves Timer/Counter0 output OC0A and PCINT12. |
| 24 | PB5 | bidirectional | Port B bit 5 is a bi-directional I/O with selectable internal pull-up, tri-stated at reset, has better drive capability than other ports, and also serves Timer/Counter1 output OC1A and PCINT13. |
| 25 | PB6 | bidirectional | Port B bit 6 is a bi-directional I/O with selectable internal pull-up, tri-stated at reset, has better drive capability than other ports, and also serves Timer/Counter1 output OC1B and PCINT14. |
| 26 | PB7 | bidirectional | Port B bit 7 is a bi-directional I/O with selectable internal pull-up, tri-stated at reset, has better drive capability than other ports, and also serves Timer/Counter2 output OC2A and PCINT15. |
| 27 | DNC | unconnected | Do not connect; this pin is marked DNC in Figure 1-2. |
| 28 | PG3 | bidirectional | Port G bit 3 is a bi-directional I/O with selectable internal pull-up, tri-stated at reset, and also serves Timer/Counter1 clock input T1 and LCD segment SEG33. |
| 29 | PG4 | bidirectional | Port G bit 4 is a bi-directional I/O with selectable internal pull-up, tri-stated at reset, and also serves Timer/Counter0 clock input T0 and LCD segment SEG32. |
| 30 | RESET/PG5 | input | Shared reset pin and Port G bit 5; the provided pages do not state the reset input's electrical limits. |
| 31 | VCC | power_in | Digital supply voltage; the ATmega3290PV-10AU is rated 1.8 - 5.5V at 10 MHz. |
| 32 | GND | power_in | Ground reference for the digital supply. |
| 33 | XTAL2 | output | Crystal oscillator output (XTAL2), which also serves as the TOSC2 asynchronous timer oscillator connection; the provided pages give no further electrical limits. |
| 34 | XTAL1 | input | Crystal oscillator input (XTAL1), which also serves as the TOSC1 asynchronous timer oscillator connection; the provided pages give no further electrical limits. |
| 35 | DNC | unconnected | Do not connect; this pin is marked DNC in Figure 1-2. |
| 36 | DNC | unconnected | Do not connect; this pin is marked DNC in Figure 1-2. |
| 37 | PJ2 | bidirectional | Port J bit 2 is a bi-directional I/O with selectable internal pull-up, tri-stated at reset, and also serves PCINT26 and LCD segment SEG31. |
| 38 | PJ3 | bidirectional | Port J bit 3 is a bi-directional I/O with selectable internal pull-up, tri-stated at reset, and also serves PCINT27 and LCD segment SEG30. |
| 39 | PJ4 | bidirectional | Port J bit 4 is a bi-directional I/O with selectable internal pull-up, tri-stated at reset, and also serves PCINT28 and LCD segment SEG29. |
| 40 | PJ5 | bidirectional | Port J bit 5 is a bi-directional I/O with selectable internal pull-up, tri-stated at reset, and also serves PCINT29 and LCD segment SEG28. |
| 41 | PJ6 | bidirectional | Port J bit 6 is a bi-directional I/O with selectable internal pull-up, tri-stated at reset, and also serves PCINT30 and LCD segment SEG27. |
| 42 | DNC | unconnected | Do not connect; this pin is marked DNC in Figure 1-2. |
| 43 | PD0 | bidirectional | Port D bit 0 is a bi-directional I/O with selectable internal pull-up, tri-stated at reset, and also serves Timer/Counter1 input capture ICP1 and LCD segment SEG26. |
| 44 | PD1 | bidirectional | Port D bit 1 is a bi-directional I/O with selectable internal pull-up, tri-stated at reset, and also serves external interrupt INT0 and LCD segment SEG25. |
| 45 | PD2 | bidirectional | Port D bit 2 is a bi-directional I/O with selectable internal pull-up, tri-stated at reset, and also serves LCD segment SEG24. |
| 46 | PD3 | bidirectional | Port D bit 3 is a bi-directional I/O with selectable internal pull-up, tri-stated at reset, and also serves LCD segment SEG23. |
| 47 | PD4 | bidirectional | Port D bit 4 is a bi-directional I/O with selectable internal pull-up, tri-stated at reset, and also serves LCD segment SEG22. |
| 48 | PD5 | bidirectional | Port D bit 5 is a bi-directional I/O with selectable internal pull-up, tri-stated at reset, and also serves LCD segment SEG21. |
| 49 | PD6 | bidirectional | Port D bit 6 is a bi-directional I/O with selectable internal pull-up, tri-stated at reset, and also serves LCD segment SEG20. |
| 50 | PD7 | bidirectional | Port D bit 7 is a bi-directional I/O with selectable internal pull-up, tri-stated at reset, and also serves LCD segment SEG19. |
| 51 | AVCC | power_in | Supply voltage pin for the ADC and analog circuitry; the provided pages give no separate voltage limits. |
| 52 | AGND | power_in | Analog ground pin for the ADC and analog circuitry. |
| 53 | AREF | input | ADC analog reference input; the provided pages give no voltage limits for this pin. |
| 54 | PF0 (ADC0) | bidirectional | Port F bit 0 serves as ADC analog input ADC0 and as a bi-directional I/O with selectable pull-up when the ADC is not used, tri-stated at reset. |
| 55 | PF1 (ADC1) | bidirectional | Port F bit 1 serves as ADC analog input ADC1 and as a bi-directional I/O with selectable pull-up when the ADC is not used, tri-stated at reset. |
| 56 | PF2 (ADC2) | bidirectional | Port F bit 2 serves as ADC analog input ADC2 and as a bi-directional I/O with selectable pull-up when the ADC is not used, tri-stated at reset. |
| 57 | PF3 (ADC3) | bidirectional | Port F bit 3 serves as ADC analog input ADC3 and as a bi-directional I/O with selectable pull-up when the ADC is not used, tri-stated at reset. |
| 58 | PF4 (ADC4/TCK) | bidirectional | Port F bit 4 serves as ADC input ADC4 and JTAG TCK; its pull-up is enabled even during reset when JTAG is enabled. |
| 59 | PF5 (ADC5/TMS) | bidirectional | Port F bit 5 serves as ADC input ADC5 and JTAG TMS; its pull-up is enabled even during reset when JTAG is enabled. |
| 60 | PF6 (ADC6/TDO) | bidirectional | Port F bit 6 serves as ADC input ADC6 and JTAG TDO. |
| 61 | PF7 (ADC7/TDI) | bidirectional | Port F bit 7 serves as ADC input ADC7 and JTAG TDI; its pull-up is enabled even during reset when JTAG is enabled. |
| 62 | DNC | unconnected | Do not connect; this pin is marked DNC in Figure 1-2. |
| 63 | DNC | unconnected | Do not connect; this pin is marked DNC in Figure 1-2. |
| 64 | PH7 (PCINT23/SEG36) | bidirectional | Port H bit 7 is a bi-directional I/O with selectable internal pull-up, tri-stated at reset, and also serves PCINT23 and LCD segment SEG36. |
| 65 | PH6 (PCINT22/SEG37) | bidirectional | Port H bit 6 is a bi-directional I/O with selectable internal pull-up, tri-stated at reset, and also serves PCINT22 and LCD segment SEG37. |
| 66 | PH5 (PCINT21/SEG38) | bidirectional | Port H bit 5 is a bi-directional I/O with selectable internal pull-up, tri-stated at reset, and also serves PCINT21 and LCD segment SEG38. |
| 67 | PH4 (PCINT20/SEG39) | bidirectional | Port H bit 4 is a bi-directional I/O with selectable internal pull-up, tri-stated at reset, and also serves PCINT20 and LCD segment SEG39. |
| 68 | DNC | unconnected | Do not connect; this pin is marked DNC in Figure 1-2. |
| 69 | DNC | unconnected | Do not connect; this pin is marked DNC in Figure 1-2. |
| 70 | GND | power_in | Ground reference for the digital supply. |
| 71 | VCC | power_in | Digital supply voltage; the ATmega3290PV-10AU is rated 1.8 - 5.5V at 10 MHz. |
| 72 | DNC | unconnected | Do not connect; this pin is marked DNC in Figure 1-2. |
| 73 | PA0 (COM0) | bidirectional | Port A bit 0 is a bi-directional I/O with selectable internal pull-up, tri-stated at reset, and also serves LCD common output COM0. |
| 74 | PA1 (COM1) | bidirectional | Port A bit 1 is a bi-directional I/O with selectable internal pull-up, tri-stated at reset, and also serves LCD common output COM1. |
| 75 | PA2 (COM2) | bidirectional | Port A bit 2 is a bi-directional I/O with selectable internal pull-up, tri-stated at reset, and also serves LCD common output COM2. |
| 76 | PA3 (COM3) | bidirectional | Port A bit 3 is a bi-directional I/O with selectable internal pull-up, tri-stated at reset, and also serves LCD common output COM3. |
| 77 | PA4 (SEG0) | bidirectional | Port A bit 4 is a bi-directional I/O with selectable internal pull-up, tri-stated at reset, and also serves LCD segment SEG0. |
| 78 | PA5 (SEG1) | bidirectional | Port A bit 5 is a bi-directional I/O with selectable internal pull-up, tri-stated at reset, and also serves LCD segment SEG1. |
| 79 | PA6 (SEG2) | bidirectional | Port A bit 6 is a bi-directional I/O with selectable internal pull-up, tri-stated at reset, and also serves LCD segment SEG2. |
| 80 | PA7 (SEG3) | bidirectional | Port A bit 7 is a bi-directional I/O with selectable internal pull-up, tri-stated at reset, and also serves LCD segment SEG3. |
| 81 | PG2 (SEG4) | bidirectional | Port G bit 2 is a bi-directional I/O with selectable internal pull-up, tri-stated at reset, and also serves LCD segment SEG4. |
| 82 | PC7 (SEG5) | bidirectional | Port C bit 7 is a bi-directional I/O with selectable internal pull-up, tri-stated at reset, and also serves LCD segment SEG5. |
| 83 | PC6 (SEG6) | bidirectional | Port C bit 6 is a bi-directional I/O with selectable internal pull-up, tri-stated at reset, and also serves LCD segment SEG6. |
| 84 | DNC | unconnected | Do not connect; this pin is marked DNC in Figure 1-2. |
| 85 | PH3 (PCINT19/SEG7) | bidirectional | Port H bit 3 is a bi-directional I/O with selectable internal pull-up, tri-stated at reset, and also serves PCINT19 and LCD segment SEG7. |
| 86 | PH2 (PCINT18/SEG8) | bidirectional | Port H bit 2 is a bi-directional I/O with selectable internal pull-up, tri-stated at reset, and also serves PCINT18 and LCD segment SEG8. |
| 87 | PH1 (PCINT17/SEG9) | bidirectional | Port H bit 1 is a bi-directional I/O with selectable internal pull-up, tri-stated at reset, and also serves PCINT17 and LCD segment SEG9. |
| 88 | PH0 (PCINT16/SEG10) | bidirectional | Port H bit 0 is a bi-directional I/O with selectable internal pull-up, tri-stated at reset, and also serves PCINT16 and LCD segment SEG10. |
| 89 | DNC | unconnected | Do not connect; this pin is marked DNC in Figure 1-2. |
| 90 | DNC | unconnected | Do not connect; this pin is marked DNC in Figure 1-2. |
| 91 | DNC | unconnected | Do not connect; this pin is marked DNC in Figure 1-2. |
| 92 | DNC | unconnected | Do not connect; this pin is marked DNC in Figure 1-2. |
| 93 | PC5 (SEG11) | bidirectional | Port C bit 5 is a bi-directional I/O with selectable internal pull-up, tri-stated at reset, and also serves LCD segment SEG11. |
| 94 | PC4 (SEG12) | bidirectional | Port C bit 4 is a bi-directional I/O with selectable internal pull-up, tri-stated at reset, and also serves LCD segment SEG12. |
| 95 | PC3 (SEG13) | bidirectional | Port C bit 3 is a bi-directional I/O with selectable internal pull-up, tri-stated at reset, and also serves LCD segment SEG13. |
| 96 | PC2 (SEG14) | bidirectional | Port C bit 2 is a bi-directional I/O with selectable internal pull-up, tri-stated at reset, and also serves LCD segment SEG14. |
| 97 | PC1 (SEG15) | bidirectional | Port C bit 1 is a bi-directional I/O with selectable internal pull-up, tri-stated at reset, and also serves LCD segment SEG15. |
| 98 | PC0 (SEG16) | bidirectional | Port C bit 0 is a bi-directional I/O with selectable internal pull-up, tri-stated at reset, and also serves LCD segment SEG16. |
| 99 | PG1 (SEG17) | bidirectional | Port G bit 1 is a bi-directional I/O with selectable internal pull-up, tri-stated at reset, and also serves LCD segment SEG17. |
| 100 | PG0 (SEG18) | bidirectional | Port G bit 0 is a bi-directional I/O with selectable internal pull-up, tri-stated at reset, and also serves LCD segment SEG18. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | TQFP-100(14x14) |
| Category | Embedded Processors & Controllers |
| Pins | 100 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Power supply voltage (1.8-5.5 V range for the 10 MHz ordering code) | VCC | 1.8 | 5.5 | V | ATmega3290PV-10AU, speed 10 MHz, ordering table | 18 | |
| Speed grade (maximum clock frequency) | 10 | MHz | ATmega3290PV-10AU, power supply 1.8-5.5 V, ordering table | 18 | |||
| Operating temperature range (industrial) | -40 | 85 | °C | ATmega3290PV-10AU, Industrial operational range | 18 |
CAD (KiCad official)
- Symbol:
ATMEGA3290PV-10AU - Footprint:
Package_QFP:TQFP-100_14x14mm_P0.5mm - 3D model: TQFP-100(14x14) (KiCad packages3D, STEP)
- 3D model files:
atmega3290pv-10au-etched.step/atmega3290pv-10au-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);atmega3290pv-10au.step/atmega3290pv-10au.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Microchip Tech datasheet (25 pp, sha256
008c656ea98d75eb, retrieved 2026-10-30, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# ATMEGA3290PV-10AU
**Microchip Tech** · Pre-ordered MCUs · TQFP-100(14x14)
ATMEGA3290PV-10AU from Microchip Tech, in a TQFP-100(14x14). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | LCDCAP | passive | LCD controller capacitor connection; the provided pages name this pin in Figure 1-2 but do not state its electrical limits. |
| 2 | PE0 | bidirectional | Port E bit 0 is a bi-directional I/O with selectable internal pull-up, tri-stated at reset, and also serves RXD (USART receive) and PCINT0. |
| 3 | PE1 | bidirectional | Port E bit 1 is a bi-directional I/O with selectable internal pull-up, tri-stated at reset, and also serves TXD (USART transmit) and PCINT1. |
| 4 | PE2 | bidirectional | Port E bit 2 is a bi-directional I/O with selectable internal pull-up, tri-stated at reset, and also serves XCK, analog comparator input AIN0 and PCINT2. |
| 5 | PE3 | bidirectional | Port E bit 3 is a bi-directional I/O with selectable internal pull-up, tri-stated at reset, and also serves analog comparator input AIN1 and PCINT3. |
| 6 | PE4 | bidirectional | Port E bit 4 is a bi-directional I/O with selectable internal pull-up, tri-stated at reset, and also serves USI clock USCK/SCL and PCINT4. |
| 7 | PE5 | bidirectional | Port E bit 5 is a bi-directional I/O with selectable internal pull-up, tri-stated at reset, and also serves USI data input DI/SDA and PCINT5. |
| 8 | PE6 | bidirectional | Port E bit 6 is a bi-directional I/O with selectable internal pull-up, tri-stated at reset, and also serves USI data output DO and PCINT6. |
| 9 | PE7 | bidirectional | Port E bit 7 is a bi-directional I/O with selectable internal pull-up, tri-stated at reset, and also serves CLKO and PCINT7. |
| 10 | VCC | power_in | Digital supply voltage; the ATmega3290PV-10AU is rated 1.8 - 5.5V at 10 MHz. |
| 11 | GND | power_in | Ground reference for the digital supply. |
| 12 | DNC | unconnected | Do not connect; this pin is marked DNC in Figure 1-2. |
| 13 | PJ0 | bidirectional | Port J bit 0 is a bi-directional I/O with selectable internal pull-up, tri-stated at reset, and also serves PCINT24 and LCD segment SEG35. |
| 14 | PJ1 | bidirectional | Port J bit 1 is a bi-directional I/O with selectable internal pull-up, tri-stated at reset, and also serves PCINT25 and LCD segment SEG34. |
| 15 | DNC | unconnected | Do not connect; this pin is marked DNC in Figure 1-2. |
| 16 | DNC | unconnected | Do not connect; this pin is marked DNC in Figure 1-2. |
| 17 | DNC | unconnected | Do not connect; this pin is marked DNC in Figure 1-2. |
| 18 | DNC | unconnected | Do not connect; this pin is marked DNC in Figure 1-2. |
| 19 | PB0 | bidirectional | Port B bit 0 is a bi-directional I/O with selectable internal pull-up, tri-stated at reset, has better drive capability than other ports, and also serves SPI SS and PCINT8. |
| 20 | PB1 | bidirectional | Port B bit 1 is a bi-directional I/O with selectable internal pull-up, tri-stated at reset, has better drive capability than other ports, and also serves SPI SCK and PCINT9. |
| 21 | PB2 | bidirectional | Port B bit 2 is a bi-directional I/O with selectable internal pull-up, tri-stated at reset, has better drive capability than other ports, and also serves SPI MOSI and PCINT10. |
| 22 | PB3 | bidirectional | Port B bit 3 is a bi-directional I/O with selectable internal pull-up, tri-stated at reset, has better drive capability than other ports, and also serves SPI MISO and PCINT11. |
| 23 | PB4 | bidirectional | Port B bit 4 is a bi-directional I/O with selectable internal pull-up, tri-stated at reset, has better drive capability than other ports, and also serves Timer/Counter0 output OC0A and PCINT12. |
| 24 | PB5 | bidirectional | Port B bit 5 is a bi-directional I/O with selectable internal pull-up, tri-stated at reset, has better drive capability than other ports, and also serves Timer/Counter1 output OC1A and PCINT13. |
| 25 | PB6 | bidirectional | Port B bit 6 is a bi-directional I/O with selectable internal pull-up, tri-stated at reset, has better drive capability than other ports, and also serves Timer/Counter1 output OC1B and PCINT14. |
| 26 | PB7 | bidirectional | Port B bit 7 is a bi-directional I/O with selectable internal pull-up, tri-stated at reset, has better drive capability than other ports, and also serves Timer/Counter2 output OC2A and PCINT15. |
| 27 | DNC | unconnected | Do not connect; this pin is marked DNC in Figure 1-2. |
| 28 | PG3 | bidirectional | Port G bit 3 is a bi-directional I/O with selectable internal pull-up, tri-stated at reset, and also serves Timer/Counter1 clock input T1 and LCD segment SEG33. |
| 29 | PG4 | bidirectional | Port G bit 4 is a bi-directional I/O with selectable internal pull-up, tri-stated at reset, and also serves Timer/Counter0 clock input T0 and LCD segment SEG32. |
| 30 | RESET/PG5 | input | Shared reset pin and Port G bit 5; the provided pages do not state the reset input's electrical limits. |
| 31 | VCC | power_in | Digital supply voltage; the ATmega3290PV-10AU is rated 1.8 - 5.5V at 10 MHz. |
| 32 | GND | power_in | Ground reference for the digital supply. |
| 33 | XTAL2 | output | Crystal oscillator output (XTAL2), which also serves as the TOSC2 asynchronous timer oscillator connection; the provided pages give no further electrical limits. |
| 34 | XTAL1 | input | Crystal oscillator input (XTAL1), which also serves as the TOSC1 asynchronous timer oscillator connection; the provided pages give no further electrical limits. |
| 35 | DNC | unconnected | Do not connect; this pin is marked DNC in Figure 1-2. |
| 36 | DNC | unconnected | Do not connect; this pin is marked DNC in Figure 1-2. |
| 37 | PJ2 | bidirectional | Port J bit 2 is a bi-directional I/O with selectable internal pull-up, tri-stated at reset, and also serves PCINT26 and LCD segment SEG31. |
| 38 | PJ3 | bidirectional | Port J bit 3 is a bi-directional I/O with selectable internal pull-up, tri-stated at reset, and also serves PCINT27 and LCD segment SEG30. |
| 39 | PJ4 | bidirectional | Port J bit 4 is a bi-directional I/O with selectable internal pull-up, tri-stated at reset, and also serves PCINT28 and LCD segment SEG29. |
| 40 | PJ5 | bidirectional | Port J bit 5 is a bi-directional I/O with selectable internal pull-up, tri-stated at reset, and also serves PCINT29 and LCD segment SEG28. |
| 41 | PJ6 | bidirectional | Port J bit 6 is a bi-directional I/O with selectable internal pull-up, tri-stated at reset, and also serves PCINT30 and LCD segment SEG27. |
| 42 | DNC | unconnected | Do not connect; this pin is marked DNC in Figure 1-2. |
| 43 | PD0 | bidirectional | Port D bit 0 is a bi-directional I/O with selectable internal pull-up, tri-stated at reset, and also serves Timer/Counter1 input capture ICP1 and LCD segment SEG26. |
| 44 | PD1 | bidirectional | Port D bit 1 is a bi-directional I/O with selectable internal pull-up, tri-stated at reset, and also serves external interrupt INT0 and LCD segment SEG25. |
| 45 | PD2 | bidirectional | Port D bit 2 is a bi-directional I/O with selectable internal pull-up, tri-stated at reset, and also serves LCD segment SEG24. |
| 46 | PD3 | bidirectional | Port D bit 3 is a bi-directional I/O with selectable internal pull-up, tri-stated at reset, and also serves LCD segment SEG23. |
| 47 | PD4 | bidirectional | Port D bit 4 is a bi-directional I/O with selectable internal pull-up, tri-stated at reset, and also serves LCD segment SEG22. |
| 48 | PD5 | bidirectional | Port D bit 5 is a bi-directional I/O with selectable internal pull-up, tri-stated at reset, and also serves LCD segment SEG21. |
| 49 | PD6 | bidirectional | Port D bit 6 is a bi-directional I/O with selectable internal pull-up, tri-stated at reset, and also serves LCD segment SEG20. |
| 50 | PD7 | bidirectional | Port D bit 7 is a bi-directional I/O with selectable internal pull-up, tri-stated at reset, and also serves LCD segment SEG19. |
| 51 | AVCC | power_in | Supply voltage pin for the ADC and analog circuitry; the provided pages give no separate voltage limits. |
| 52 | AGND | power_in | Analog ground pin for the ADC and analog circuitry. |
| 53 | AREF | input | ADC analog reference input; the provided pages give no voltage limits for this pin. |
| 54 | PF0 (ADC0) | bidirectional | Port F bit 0 serves as ADC analog input ADC0 and as a bi-directional I/O with selectable pull-up when the ADC is not used, tri-stated at reset. |
| 55 | PF1 (ADC1) | bidirectional | Port F bit 1 serves as ADC analog input ADC1 and as a bi-directional I/O with selectable pull-up when the ADC is not used, tri-stated at reset. |
| 56 | PF2 (ADC2) | bidirectional | Port F bit 2 serves as ADC analog input ADC2 and as a bi-directional I/O with selectable pull-up when the ADC is not used, tri-stated at reset. |
| 57 | PF3 (ADC3) | bidirectional | Port F bit 3 serves as ADC analog input ADC3 and as a bi-directional I/O with selectable pull-up when the ADC is not used, tri-stated at reset. |
| 58 | PF4 (ADC4/TCK) | bidirectional | Port F bit 4 serves as ADC input ADC4 and JTAG TCK; its pull-up is enabled even during reset when JTAG is enabled. |
| 59 | PF5 (ADC5/TMS) | bidirectional | Port F bit 5 serves as ADC input ADC5 and JTAG TMS; its pull-up is enabled even during reset when JTAG is enabled. |
| 60 | PF6 (ADC6/TDO) | bidirectional | Port F bit 6 serves as ADC input ADC6 and JTAG TDO. |
| 61 | PF7 (ADC7/TDI) | bidirectional | Port F bit 7 serves as ADC input ADC7 and JTAG TDI; its pull-up is enabled even during reset when JTAG is enabled. |
| 62 | DNC | unconnected | Do not connect; this pin is marked DNC in Figure 1-2. |
| 63 | DNC | unconnected | Do not connect; this pin is marked DNC in Figure 1-2. |
| 64 | PH7 (PCINT23/SEG36) | bidirectional | Port H bit 7 is a bi-directional I/O with selectable internal pull-up, tri-stated at reset, and also serves PCINT23 and LCD segment SEG36. |
| 65 | PH6 (PCINT22/SEG37) | bidirectional | Port H bit 6 is a bi-directional I/O with selectable internal pull-up, tri-stated at reset, and also serves PCINT22 and LCD segment SEG37. |
| 66 | PH5 (PCINT21/SEG38) | bidirectional | Port H bit 5 is a bi-directional I/O with selectable internal pull-up, tri-stated at reset, and also serves PCINT21 and LCD segment SEG38. |
| 67 | PH4 (PCINT20/SEG39) | bidirectional | Port H bit 4 is a bi-directional I/O with selectable internal pull-up, tri-stated at reset, and also serves PCINT20 and LCD segment SEG39. |
| 68 | DNC | unconnected | Do not connect; this pin is marked DNC in Figure 1-2. |
| 69 | DNC | unconnected | Do not connect; this pin is marked DNC in Figure 1-2. |
| 70 | GND | power_in | Ground reference for the digital supply. |
| 71 | VCC | power_in | Digital supply voltage; the ATmega3290PV-10AU is rated 1.8 - 5.5V at 10 MHz. |
| 72 | DNC | unconnected | Do not connect; this pin is marked DNC in Figure 1-2. |
| 73 | PA0 (COM0) | bidirectional | Port A bit 0 is a bi-directional I/O with selectable internal pull-up, tri-stated at reset, and also serves LCD common output COM0. |
| 74 | PA1 (COM1) | bidirectional | Port A bit 1 is a bi-directional I/O with selectable internal pull-up, tri-stated at reset, and also serves LCD common output COM1. |
| 75 | PA2 (COM2) | bidirectional | Port A bit 2 is a bi-directional I/O with selectable internal pull-up, tri-stated at reset, and also serves LCD common output COM2. |
| 76 | PA3 (COM3) | bidirectional | Port A bit 3 is a bi-directional I/O with selectable internal pull-up, tri-stated at reset, and also serves LCD common output COM3. |
| 77 | PA4 (SEG0) | bidirectional | Port A bit 4 is a bi-directional I/O with selectable internal pull-up, tri-stated at reset, and also serves LCD segment SEG0. |
| 78 | PA5 (SEG1) | bidirectional | Port A bit 5 is a bi-directional I/O with selectable internal pull-up, tri-stated at reset, and also serves LCD segment SEG1. |
| 79 | PA6 (SEG2) | bidirectional | Port A bit 6 is a bi-directional I/O with selectable internal pull-up, tri-stated at reset, and also serves LCD segment SEG2. |
| 80 | PA7 (SEG3) | bidirectional | Port A bit 7 is a bi-directional I/O with selectable internal pull-up, tri-stated at reset, and also serves LCD segment SEG3. |
| 81 | PG2 (SEG4) | bidirectional | Port G bit 2 is a bi-directional I/O with selectable internal pull-up, tri-stated at reset, and also serves LCD segment SEG4. |
| 82 | PC7 (SEG5) | bidirectional | Port C bit 7 is a bi-directional I/O with selectable internal pull-up, tri-stated at reset, and also serves LCD segment SEG5. |
| 83 | PC6 (SEG6) | bidirectional | Port C bit 6 is a bi-directional I/O with selectable internal pull-up, tri-stated at reset, and also serves LCD segment SEG6. |
| 84 | DNC | unconnected | Do not connect; this pin is marked DNC in Figure 1-2. |
| 85 | PH3 (PCINT19/SEG7) | bidirectional | Port H bit 3 is a bi-directional I/O with selectable internal pull-up, tri-stated at reset, and also serves PCINT19 and LCD segment SEG7. |
| 86 | PH2 (PCINT18/SEG8) | bidirectional | Port H bit 2 is a bi-directional I/O with selectable internal pull-up, tri-stated at reset, and also serves PCINT18 and LCD segment SEG8. |
| 87 | PH1 (PCINT17/SEG9) | bidirectional | Port H bit 1 is a bi-directional I/O with selectable internal pull-up, tri-stated at reset, and also serves PCINT17 and LCD segment SEG9. |
| 88 | PH0 (PCINT16/SEG10) | bidirectional | Port H bit 0 is a bi-directional I/O with selectable internal pull-up, tri-stated at reset, and also serves PCINT16 and LCD segment SEG10. |
| 89 | DNC | unconnected | Do not connect; this pin is marked DNC in Figure 1-2. |
| 90 | DNC | unconnected | Do not connect; this pin is marked DNC in Figure 1-2. |
| 91 | DNC | unconnected | Do not connect; this pin is marked DNC in Figure 1-2. |
| 92 | DNC | unconnected | Do not connect; this pin is marked DNC in Figure 1-2. |
| 93 | PC5 (SEG11) | bidirectional | Port C bit 5 is a bi-directional I/O with selectable internal pull-up, tri-stated at reset, and also serves LCD segment SEG11. |
| 94 | PC4 (SEG12) | bidirectional | Port C bit 4 is a bi-directional I/O with selectable internal pull-up, tri-stated at reset, and also serves LCD segment SEG12. |
| 95 | PC3 (SEG13) | bidirectional | Port C bit 3 is a bi-directional I/O with selectable internal pull-up, tri-stated at reset, and also serves LCD segment SEG13. |
| 96 | PC2 (SEG14) | bidirectional | Port C bit 2 is a bi-directional I/O with selectable internal pull-up, tri-stated at reset, and also serves LCD segment SEG14. |
| 97 | PC1 (SEG15) | bidirectional | Port C bit 1 is a bi-directional I/O with selectable internal pull-up, tri-stated at reset, and also serves LCD segment SEG15. |
| 98 | PC0 (SEG16) | bidirectional | Port C bit 0 is a bi-directional I/O with selectable internal pull-up, tri-stated at reset, and also serves LCD segment SEG16. |
| 99 | PG1 (SEG17) | bidirectional | Port G bit 1 is a bi-directional I/O with selectable internal pull-up, tri-stated at reset, and also serves LCD segment SEG17. |
| 100 | PG0 (SEG18) | bidirectional | Port G bit 0 is a bi-directional I/O with selectable internal pull-up, tri-stated at reset, and also serves LCD segment SEG18. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | TQFP-100(14x14) |
| Category | Embedded Processors & Controllers |
| Pins | 100 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Power supply voltage (1.8-5.5 V range for the 10 MHz ordering code) | VCC | 1.8 | | 5.5 | V | ATmega3290PV-10AU, speed 10 MHz, ordering table | 18 |
| Speed grade (maximum clock frequency) | | | | 10 | MHz | ATmega3290PV-10AU, power supply 1.8-5.5 V, ordering table | 18 |
| Operating temperature range (industrial) | | -40 | | 85 | °C | ATmega3290PV-10AU, Industrial operational range | 18 |
## CAD (KiCad official)
- Symbol: `ATMEGA3290PV-10AU`
- Footprint: `Package_QFP:TQFP-100_14x14mm_P0.5mm`
- 3D model: TQFP-100(14x14) (KiCad packages3D, STEP)
- 3D model files: `atmega3290pv-10au-etched.step` / `atmega3290pv-10au-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `atmega3290pv-10au.step` / `atmega3290pv-10au.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Microchip Tech datasheet](https://ww1.microchip.com/downloads/en/DeviceDoc/Atmel-8021-AVR-ATmega329P-3290P_Summary.pdf) (25 pp, sha256 `008c656ea98d75eb`, retrieved 2026-10-30, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/atmega3290pv-10au-datasheet.pdf)