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ATMEGA328P-PU
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Microchip Tech ATMEL & AVR, DIP-28-300mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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ATMEGA328P-PU
Microchip Tech · ATMEL & AVR · DIP-28-300mil
ATMEGA328P-PU from Microchip Tech, in a DIP-28-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | PC6 (RESET/PCINT14) | bidirectional | Port C bit 6 is a reset input when the RSTDISBL fuse is unprogrammed, where a low level longer than the minimum pulse length generates a Reset and shorter pulses are not ensured to reset; with RSTDISBL programmed it is a normal I/O pin. |
| 2 | PD0 (RXD/PCINT16) | bidirectional | Port D bit 0 is the USART receive data input (RXD) when the USART receiver is enabled, and can also serve as pin change interrupt 16. |
| 3 | PD1 (TXD/PCINT17) | bidirectional | Port D bit 1 is the USART transmit data output (TXD), configured as an output regardless of DDD1 when the USART transmitter is enabled, and can also serve as pin change interrupt 17. |
| 4 | PD2 (INT0/PCINT18) | bidirectional | Port D bit 2 can serve as external interrupt source 0 (INT0) and as pin change interrupt 18. |
| 5 | PD3 | bidirectional | Port D bit 3 can serve as external interrupt source 1 (INT1), and as the Timer/Counter2 compare match B output (OC2B) when configured as an output; it can also serve as pin change interrupt 19. |
| 6 | PD4 | bidirectional | Port D bit 4 is the USART external clock input/output (XCK) and the Timer/Counter0 external counter input (T0), and can also serve as pin change interrupt 20. |
| 7 | VCC | power_in | Digital supply voltage. |
| 8 | GND | power_in | Ground. |
| 9 | PB6 (XTAL1/TOSC1/PCINT6) | input | Depending on clock selection fuse settings, PB6 is the input to the inverting oscillator amplifier (XTAL1) and to the internal clock circuit; when used as a clock pin it cannot be used as an I/O pin. |
| 10 | PB7 (XTAL2/TOSC2/PCINT7) | output | Depending on clock selection fuse settings, PB7 is the output of the inverting oscillator amplifier (XTAL2); when used as a clock pin it cannot be used as an I/O pin. |
| 11 | PD5 | bidirectional | Port D bit 5 is the Timer/Counter1 external counter input (T1), and the Timer/Counter0 compare match B output (OC0B) when configured as an output; it can also serve as pin change interrupt 21. |
| 12 | PD6 | bidirectional | Port D bit 6 is the analog comparator positive input (AIN0) and the Timer/Counter0 compare match A output (OC0A) when configured as an output; for AIN0 use, the pin should be configured as input with the pull-up off. |
| 13 | PD7 | bidirectional | Port D bit 7 is the analog comparator negative input (AIN1); configure it as an input with the internal pull-up switched off to avoid interference with the comparator. |
| 14 | PB0 | bidirectional | Port B bit 0 is the Timer/Counter1 input capture input (ICP1) and the divided system clock output (CLKO), and can also serve as pin change interrupt 0. |
| 15 | PB1 (OC1A/PCINT1) | bidirectional | Port B bit 1 is the Timer/Counter1 compare match A output (OC1A), which requires the pin to be configured as an output (DDB1 set), and can also serve as pin change interrupt 1. |
| 16 | PB2 (SS/OC1B/PCINT2) | bidirectional | Port B bit 2 is the SPI slave select input (SS) and the Timer/Counter1 compare match B output (OC1B, requires DDB2 set), and can also serve as pin change interrupt 2. |
| 17 | PB3 (MOSI/OC2A/PCINT3) | bidirectional | Port B bit 3 is the SPI master data output / slave data input (MOSI) and the Timer/Counter2 compare match A output (OC2A, requires DDB3 set), and can also serve as pin change interrupt 3. |
| 18 | PB4 (MISO/PCINT4) | bidirectional | Port B bit 4 is the SPI master data input / slave data output (MISO), and can also serve as pin change interrupt 4. |
| 19 | PB5 (SCK/PCINT5) | bidirectional | Port B bit 5 is the SPI master clock output / slave clock input (SCK), and can also serve as pin change interrupt 5. |
| 20 | AVCC | power_in | AVCC is the supply voltage pin for the A/D converter, PC3:0 and ADC7:6; it should be externally connected to VCC even if the ADC is not used, and connected through a low-pass filter if the ADC is used. |
| 21 | AREF | input | AREF is the analog reference pin for the A/D converter. |
| 22 | GND | power_in | Ground. |
| 23 | PC0 (ADC0/PCINT8) | bidirectional | Port C bit 0 can be used as ADC input channel 0 (uses analog power) and can also serve as pin change interrupt 8. |
| 24 | PC1 (ADC1/PCINT9) | bidirectional | Port C bit 1 can be used as ADC input channel 1 (uses analog power) and can also serve as pin change interrupt 9. |
| 25 | PC2 (ADC2/PCINT10) | bidirectional | Port C bit 2 can be used as ADC input channel 2 (uses analog power) and can also serve as pin change interrupt 10. |
| 26 | PC3 (ADC3/PCINT11) | bidirectional | Port C bit 3 can be used as ADC input channel 3 (uses analog power) and can also serve as pin change interrupt 11. |
| 27 | PC4 (ADC4/SDA/PCINT12) | bidirectional | Port C bit 4 is the 2-wire serial interface data I/O (SDA) when TWEN is set, can be used as ADC input channel 4 (uses digital power), and can also serve as pin change interrupt 12. |
| 28 | PC5 (ADC5/SCL/PCINT13) | bidirectional | Port C bit 5 is the 2-wire serial interface clock (SCL) when TWEN is set, can be used as ADC input channel 5 (uses digital power), and can also serve as pin change interrupt 13. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | DIP-28-300mil |
| Category | Embedded Processors & Controllers |
| Pins | 28 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Power Supply Current, Active mode | ICC | 0.3 | 0.5 | mA | Active 1MHz, VCC = 2V | 312 | |
| Power Supply Current, Active mode | ICC | 1.7 | 2.5 | mA | Active 4MHz, VCC = 3V | 312 | |
| Power Supply Current, Active mode | ICC | 5.2 | 9 | mA | Active 8MHz, VCC = 5V | 312 | |
| Power Supply Current, Idle mode | ICC | 0.04 | 0.15 | mA | Idle 1MHz, VCC = 2V | 312 | |
| Power Supply Current, Idle mode | ICC | 0.3 | 0.7 | mA | Idle 4MHz, VCC = 3V | 312 | |
| Power Supply Current, Idle mode | ICC | 1.2 | 2.7 | mA | Idle 8MHz, VCC = 5V | 312 | |
| Power Supply Current, Power-down mode | ICC | 4.2 | 8 | µA | WDT enabled, VCC = 3V | 312 | |
| Power Supply Current, Power-down mode | ICC | 0.1 | 2 | µA | WDT disabled, VCC = 3V | 312 | |
| Supply voltage range (VCC), Industrial operating range | VCC | 1.8 | 5.5 | V | ATmega328P-PU ordering table, Industrial (-40C to 85C) | 635 | |
| Maximum speed grade frequency | 20 | MHz | Speed grade for ATmega328P-PU, Power Supply 1.8 - 5.5 V; frequency vs VCC per Figure 29-1 | 635 | |||
| Operating Temperature | -55 | 125 | °C | 308 | |||
| Storage Temperature | -65 | 150 | °C | 308 | |||
| Voltage on any pin except RESET with respect to Ground | -0.5 | V | Maximum printed as VCC+0.5V | 308 | |||
| Voltage on RESET with respect to Ground | -0.5 | 13 | V | 308 | |||
| DC Current per I/O Pin | 40 | mA | 308 | ||||
| DC Current VCC and GND Pins | 200 | mA | 308 | ||||
| Power Supply Current, Power-save mode | ICC | 0.8 | µA | 32kHz TOSC enabled, VCC = 1.8V | 312 | ||
| Power Supply Current, Power-save mode | ICC | 0.9 | µA | 32kHz TOSC enabled, VCC = 3V | 312 |
CAD (KiCad official)
- Symbol:
ATMEGA328P-PU - Footprint:
Package_DIP:DIP-28_W7.62mm - 3D model: DIP-28-300mil (KiCad packages3D, STEP)
- 3D model files:
atmega328p-pu-etched.step/atmega328p-pu-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);atmega328p-pu.step/atmega328p-pu.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Microchip Tech datasheet (653 pp, sha256
b9b9d83cda56a95d, retrieved 2026-11-05, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# ATMEGA328P-PU
**Microchip Tech** · ATMEL & AVR · DIP-28-300mil
ATMEGA328P-PU from Microchip Tech, in a DIP-28-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | PC6 (RESET/PCINT14) | bidirectional | Port C bit 6 is a reset input when the RSTDISBL fuse is unprogrammed, where a low level longer than the minimum pulse length generates a Reset and shorter pulses are not ensured to reset; with RSTDISBL programmed it is a normal I/O pin. |
| 2 | PD0 (RXD/PCINT16) | bidirectional | Port D bit 0 is the USART receive data input (RXD) when the USART receiver is enabled, and can also serve as pin change interrupt 16. |
| 3 | PD1 (TXD/PCINT17) | bidirectional | Port D bit 1 is the USART transmit data output (TXD), configured as an output regardless of DDD1 when the USART transmitter is enabled, and can also serve as pin change interrupt 17. |
| 4 | PD2 (INT0/PCINT18) | bidirectional | Port D bit 2 can serve as external interrupt source 0 (INT0) and as pin change interrupt 18. |
| 5 | PD3 | bidirectional | Port D bit 3 can serve as external interrupt source 1 (INT1), and as the Timer/Counter2 compare match B output (OC2B) when configured as an output; it can also serve as pin change interrupt 19. |
| 6 | PD4 | bidirectional | Port D bit 4 is the USART external clock input/output (XCK) and the Timer/Counter0 external counter input (T0), and can also serve as pin change interrupt 20. |
| 7 | VCC | power_in | Digital supply voltage. |
| 8 | GND | power_in | Ground. |
| 9 | PB6 (XTAL1/TOSC1/PCINT6) | input | Depending on clock selection fuse settings, PB6 is the input to the inverting oscillator amplifier (XTAL1) and to the internal clock circuit; when used as a clock pin it cannot be used as an I/O pin. |
| 10 | PB7 (XTAL2/TOSC2/PCINT7) | output | Depending on clock selection fuse settings, PB7 is the output of the inverting oscillator amplifier (XTAL2); when used as a clock pin it cannot be used as an I/O pin. |
| 11 | PD5 | bidirectional | Port D bit 5 is the Timer/Counter1 external counter input (T1), and the Timer/Counter0 compare match B output (OC0B) when configured as an output; it can also serve as pin change interrupt 21. |
| 12 | PD6 | bidirectional | Port D bit 6 is the analog comparator positive input (AIN0) and the Timer/Counter0 compare match A output (OC0A) when configured as an output; for AIN0 use, the pin should be configured as input with the pull-up off. |
| 13 | PD7 | bidirectional | Port D bit 7 is the analog comparator negative input (AIN1); configure it as an input with the internal pull-up switched off to avoid interference with the comparator. |
| 14 | PB0 | bidirectional | Port B bit 0 is the Timer/Counter1 input capture input (ICP1) and the divided system clock output (CLKO), and can also serve as pin change interrupt 0. |
| 15 | PB1 (OC1A/PCINT1) | bidirectional | Port B bit 1 is the Timer/Counter1 compare match A output (OC1A), which requires the pin to be configured as an output (DDB1 set), and can also serve as pin change interrupt 1. |
| 16 | PB2 (SS/OC1B/PCINT2) | bidirectional | Port B bit 2 is the SPI slave select input (SS) and the Timer/Counter1 compare match B output (OC1B, requires DDB2 set), and can also serve as pin change interrupt 2. |
| 17 | PB3 (MOSI/OC2A/PCINT3) | bidirectional | Port B bit 3 is the SPI master data output / slave data input (MOSI) and the Timer/Counter2 compare match A output (OC2A, requires DDB3 set), and can also serve as pin change interrupt 3. |
| 18 | PB4 (MISO/PCINT4) | bidirectional | Port B bit 4 is the SPI master data input / slave data output (MISO), and can also serve as pin change interrupt 4. |
| 19 | PB5 (SCK/PCINT5) | bidirectional | Port B bit 5 is the SPI master clock output / slave clock input (SCK), and can also serve as pin change interrupt 5. |
| 20 | AVCC | power_in | AVCC is the supply voltage pin for the A/D converter, PC3:0 and ADC7:6; it should be externally connected to VCC even if the ADC is not used, and connected through a low-pass filter if the ADC is used. |
| 21 | AREF | input | AREF is the analog reference pin for the A/D converter. |
| 22 | GND | power_in | Ground. |
| 23 | PC0 (ADC0/PCINT8) | bidirectional | Port C bit 0 can be used as ADC input channel 0 (uses analog power) and can also serve as pin change interrupt 8. |
| 24 | PC1 (ADC1/PCINT9) | bidirectional | Port C bit 1 can be used as ADC input channel 1 (uses analog power) and can also serve as pin change interrupt 9. |
| 25 | PC2 (ADC2/PCINT10) | bidirectional | Port C bit 2 can be used as ADC input channel 2 (uses analog power) and can also serve as pin change interrupt 10. |
| 26 | PC3 (ADC3/PCINT11) | bidirectional | Port C bit 3 can be used as ADC input channel 3 (uses analog power) and can also serve as pin change interrupt 11. |
| 27 | PC4 (ADC4/SDA/PCINT12) | bidirectional | Port C bit 4 is the 2-wire serial interface data I/O (SDA) when TWEN is set, can be used as ADC input channel 4 (uses digital power), and can also serve as pin change interrupt 12. |
| 28 | PC5 (ADC5/SCL/PCINT13) | bidirectional | Port C bit 5 is the 2-wire serial interface clock (SCL) when TWEN is set, can be used as ADC input channel 5 (uses digital power), and can also serve as pin change interrupt 13. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | DIP-28-300mil |
| Category | Embedded Processors & Controllers |
| Pins | 28 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Power Supply Current, Active mode | ICC | | 0.3 | 0.5 | mA | Active 1MHz, VCC = 2V | 312 |
| Power Supply Current, Active mode | ICC | | 1.7 | 2.5 | mA | Active 4MHz, VCC = 3V | 312 |
| Power Supply Current, Active mode | ICC | | 5.2 | 9 | mA | Active 8MHz, VCC = 5V | 312 |
| Power Supply Current, Idle mode | ICC | | 0.04 | 0.15 | mA | Idle 1MHz, VCC = 2V | 312 |
| Power Supply Current, Idle mode | ICC | | 0.3 | 0.7 | mA | Idle 4MHz, VCC = 3V | 312 |
| Power Supply Current, Idle mode | ICC | | 1.2 | 2.7 | mA | Idle 8MHz, VCC = 5V | 312 |
| Power Supply Current, Power-down mode | ICC | | 4.2 | 8 | µA | WDT enabled, VCC = 3V | 312 |
| Power Supply Current, Power-down mode | ICC | | 0.1 | 2 | µA | WDT disabled, VCC = 3V | 312 |
| Supply voltage range (VCC), Industrial operating range | VCC | 1.8 | | 5.5 | V | ATmega328P-PU ordering table, Industrial (-40C to 85C) | 635 |
| Maximum speed grade frequency | | | | 20 | MHz | Speed grade for ATmega328P-PU, Power Supply 1.8 - 5.5 V; frequency vs VCC per Figure 29-1 | 635 |
| Operating Temperature | | -55 | | 125 | °C | | 308 |
| Storage Temperature | | -65 | | 150 | °C | | 308 |
| Voltage on any pin except RESET with respect to Ground | | -0.5 | | | V | Maximum printed as VCC+0.5V | 308 |
| Voltage on RESET with respect to Ground | | -0.5 | | 13 | V | | 308 |
| DC Current per I/O Pin | | | | 40 | mA | | 308 |
| DC Current VCC and GND Pins | | | | 200 | mA | | 308 |
| Power Supply Current, Power-save mode | ICC | | 0.8 | | µA | 32kHz TOSC enabled, VCC = 1.8V | 312 |
| Power Supply Current, Power-save mode | ICC | | 0.9 | | µA | 32kHz TOSC enabled, VCC = 3V | 312 |
## CAD (KiCad official)
- Symbol: `ATMEGA328P-PU`
- Footprint: `Package_DIP:DIP-28_W7.62mm`
- 3D model: DIP-28-300mil (KiCad packages3D, STEP)
- 3D model files: `atmega328p-pu-etched.step` / `atmega328p-pu-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `atmega328p-pu.step` / `atmega328p-pu.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Microchip Tech datasheet](https://ww1.microchip.com/downloads/en/DeviceDoc/ATmega48A-PA-88A-PA-168A-PA-328-P-DS-DS40002061B.pdf) (653 pp, sha256 `b9b9d83cda56a95d`, retrieved 2026-11-05, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/atmega328p-pu-datasheet.pdf)