component
ATMEGA328P-MUR
Public Made by Adomby adom
Microchip Tech Microcontrollers (MCU/MPU/SOC), VQFN-32(5x5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
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| docs | 7d ago |
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| atmega328p-mur-etched.step | 7d ago |
| atmega328p-mur-hero.glb | 7d ago |
| atmega328p-mur-hero.overlay.json | 7d ago |
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| README.md | 7d ago |
ATMEGA328P-MUR
Microchip Tech · Microcontrollers (MCU/MPU/SOC) · VQFN-32(5x5)
ATMEGA328P-MUR from Microchip Tech, in a VQFN-32(5x5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | PD3 | bidirectional | Port D bit 3 is a bidirectional I/O with internal pull-up; it can also serve as external interrupt INT1 and as the Timer/Counter2 OC2B output, which requires the pin to be configured as an output. |
| 2 | PD4 | bidirectional | Port D bit 4 is a bidirectional I/O with internal pull-up; it can also serve as the USART external clock XCK and Timer/Counter0 external counter input T0. |
| 3 | GND | power_in | Ground. |
| 4 | VCC | power_in | Digital supply voltage, 1.8 to 5.5 V operating range. |
| 5 | GND | power_in | Ground. |
| 6 | VCC | power_in | Digital supply voltage, 1.8 to 5.5 V operating range. |
| 7 | PB6 | bidirectional | Port B bit 6 is used as the XTAL1 chip-clock oscillator input or external clock input, in which case the pin cannot be used as I/O; otherwise it is a bidirectional I/O with internal pull-up. |
| 8 | PB7 | bidirectional | Port B bit 7 is used as the XTAL2 chip-clock oscillator output when a crystal is used, in which case the pin cannot be used as I/O; otherwise it is a bidirectional I/O with internal pull-up. |
| 9 | PD5 | bidirectional | Port D bit 5 is a bidirectional I/O with internal pull-up; it can also serve as Timer/Counter1 external counter input T1 and Timer/Counter0 OC0B output. |
| 10 | PD6 | bidirectional | Port D bit 6 is a bidirectional I/O with internal pull-up; as AIN0 it is the Analog Comparator positive input, for which the pull-up should be switched off. |
| 11 | PD7 | bidirectional | Port D bit 7 is a bidirectional I/O with internal pull-up; as AIN1 it is the Analog Comparator negative input, for which the pull-up should be switched off. |
| 12 | PB0 | bidirectional | Port B bit 0 is a bidirectional I/O with internal pull-up; it can also serve as Timer/Counter1 input capture ICP1 or divided system clock output CLKO. |
| 13 | PB1 | bidirectional | Port B bit 1 is a bidirectional I/O with internal pull-up; it can also serve as Timer/Counter1 output OC1A, which requires the pin to be configured as an output. |
| 14 | PB2 | bidirectional | Port B bit 2 is a bidirectional I/O with internal pull-up; it can also serve as SPI slave select SS or Timer/Counter1 output OC1B. |
| 15 | PB3 | bidirectional | Port B bit 3 is a bidirectional I/O with internal pull-up; it can also serve as SPI MOSI or Timer/Counter2 output OC2A. |
| 16 | PB4 | bidirectional | Port B bit 4 is a bidirectional I/O with internal pull-up; it can also serve as SPI MISO data line. |
| 17 | PB5 | bidirectional | Port B bit 5 is a bidirectional I/O with internal pull-up; it can also serve as SPI clock SCK. |
| 18 | AVCC | power_in | Supply voltage pin for the A/D Converter, PC3:0 and ADC7:6; it should be connected to VCC even if the ADC is not used, and through a low-pass filter if the ADC is used. |
| 19 | ADC6 | input | Analog input channel 6 of the 10-bit ADC, powered from the analog supply (TQFP and VQFN packages only). |
| 20 | AREF | input | Analog reference pin for the A/D Converter. |
| 21 | GND | power_in | Ground. |
| 22 | ADC7 | input | Analog input channel 7 of the 10-bit ADC, powered from the analog supply (TQFP and VQFN packages only). |
| 23 | PC0 (ADC0/PCINT8) | bidirectional | Port C bit 0 is a bidirectional I/O with internal pull-up and serves as ADC input channel 0, which uses analog power; it can also serve as pin change interrupt PCINT8. |
| 24 | PC1 (ADC1/PCINT9) | bidirectional | Port C bit 1 is a bidirectional I/O with internal pull-up and serves as ADC input channel 1, which uses analog power; it can also serve as pin change interrupt PCINT9. |
| 25 | PC2 (ADC2/PCINT10) | bidirectional | Port C bit 2 is a bidirectional I/O with internal pull-up and serves as ADC input channel 2, which uses analog power; it can also serve as pin change interrupt PCINT10. |
| 26 | PC3 (ADC3/PCINT11) | bidirectional | Port C bit 3 is a bidirectional I/O with internal pull-up and serves as ADC input channel 3, which uses analog power; it can also serve as pin change interrupt PCINT11. |
| 27 | PC4 (ADC4/SDA/PCINT12) | bidirectional | Port C bit 4 is a bidirectional I/O with internal pull-up; as ADC4 it uses digital power, and when the 2-wire interface is enabled it is the SDA serial data line (open-drain, with spike filter). |
| 28 | PC5 (ADC5/SCL/PCINT13) | bidirectional | Port C bit 5 is a bidirectional I/O with internal pull-up; as ADC5 it uses digital power, and when the 2-wire interface is enabled it is the SCL serial clock line (open-drain, with spike filter). |
| 29 | PC6 (RESET/PCINT14) | input | Active-low Reset input when the RSTDISBL fuse is unprogrammed, where a low level longer than the minimum pulse length generates a reset; if RSTDISBL is programmed it operates as a normal I/O pin with different electrical characteristics. |
| 30 | PD0 (RXD/PCINT16) | bidirectional | Port D bit 0 is a bidirectional I/O with internal pull-up; it is the USART receive data input RXD when the USART receiver is enabled, and can also serve as pin change interrupt PCINT16. |
| 31 | PD1 (TXD/PCINT17) | bidirectional | Port D bit 1 is a bidirectional I/O with internal pull-up; it is the USART transmit data output TXD when the USART transmitter is enabled, and can also serve as pin change interrupt PCINT17. |
| 32 | PD2 (INT0/PCINT18) | bidirectional | Port D bit 2 is a bidirectional I/O with internal pull-up; it can also serve as external interrupt source INT0 and pin change interrupt PCINT18. |
| 33 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | VQFN-32(5x5) |
| Category | Embedded Processors & Controllers |
| Pins | 33 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Operating Temperature (absolute maximum) | -55 | 125 | °C | 308 | |||
| Storage Temperature | -65 | 150 | °C | 308 | |||
| Voltage on any pin except RESET with respect to Ground | -0.5 | V | Upper limit printed as VCC+0.5V | 308 | |||
| Voltage on RESET with respect to Ground | -0.5 | 13 | V | 308 | |||
| DC Current per I/O Pin | 40 | mA | 308 | ||||
| DC Current VCC and GND Pins | 200 | mA | 308 | ||||
| Power Supply Current, Active mode | ICC | 0.3 | 0.5 | mA | Active 1MHz, VCC = 2V | 312 | |
| Power Supply Current, Active mode | ICC | 1.7 | 2.5 | mA | Active 4MHz, VCC = 3V | 312 | |
| Power Supply Current, Active mode | ICC | 5.2 | 9 | mA | Active 8MHz, VCC = 5V | 312 | |
| Power Supply Current, Idle mode | ICC | 0.04 | 0.15 | mA | Idle 1MHz, VCC = 2V | 312 | |
| Power Supply Current, Idle mode | ICC | 0.3 | 0.7 | mA | Idle 4MHz, VCC = 3V | 312 | |
| Power Supply Current, Idle mode | ICC | 1.2 | 2.7 | mA | Idle 8MHz, VCC = 5V | 312 | |
| Power Supply Current, Power-down mode | ICC | 4.2 | 8 | µA | Power-down mode, WDT enabled, VCC = 3V | 312 | |
| Power Supply Current, Power-down mode | ICC | 0.1 | 2 | µA | Power-down mode, WDT disabled, VCC = 3V | 312 | |
| Supply Voltage (VCC) | VCC | 1.8 | 5.5 | V | Industrial grade, per ordering table for ATmega328P-MUR (also header of Table 29-8) | 635 | |
| Speed grade (maximum frequency) | 20 | MHz | Frequency depends on VCC; see Figure 29-1 | 635 | |||
| Operating Temperature (Industrial) | -40 | 85 | °C | Industrial range for ATmega328P-MUR (32M1-A package) | 635 |
CAD (KiCad official)
- Symbol:
ATMEGA328P-MUR - Footprint:
Package_DFN_QFN:QFN-32-1EP_5x5mm_P0.5mm_EP3.3x3.3mm - 3D model: VQFN-32(5x5) (KiCad packages3D, STEP)
- 3D model files:
atmega328p-mur-etched.step/atmega328p-mur-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);atmega328p-mur.step/atmega328p-mur.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Microchip Tech datasheet (653 pp, sha256
7699c7d2d6d12492, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).