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ATMEGA324PV-10MU

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Microchip Tech Pre-ordered MCUs, VQFN-44(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentembedded processors & controllersatmega324pv-10mufactory-2.0.0extractor-text

Verified ATMEGA324PV-10MU

by Ray · last 30 Oct 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

30 Oct 2026RayPublished by the parts factory: tier mfr, 45 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: ATMEGA324PV-10MU · VQFN-44(7x7) · 45 pins
  • ✓copper: 45 copper pads, none touching another net
  • ✓datasheet: all 45 pin names found in the 496-page datasheet
  • ✓distributor: lcsc C1340397, digikey ATMEGA324PV-10MU-ND, mouser 556-ATMEGA324PV10MU
  • ✓family: QFN-44-1EP_7x7mm_P0.5mm_EP5.15x5.15mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-e5qofz0h/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • •package_fit (skip): no component.package_dims on the page: the model is unchecked against the datasheet drawing
  • ✓pads: 45 pins = 45 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 45 pins agree
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ atmega324pv-10mu.kicad_sym✓ atmega324pv-10mu.kicad_mod✓ atmega324pv-10mu.step
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ATMEGA324PV-10MU

Microchip Tech · Pre-ordered MCUs · VQFN-44(7x7)

ATMEGA324PV-10MU from Microchip Tech, in a VQFN-44(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 PB5 bidirectional Port B bit 5 bi-directional I/O with selectable pull-up; alternate functions MOSI (SPI) and PCINT13.
2 PB6 bidirectional Port B bit 6 bi-directional I/O with selectable pull-up; alternate functions MISO (SPI) and PCINT14.
3 PB7 bidirectional Port B bit 7 bi-directional I/O with selectable pull-up; alternate functions SCK (SPI) and PCINT15.
4 RESET input Active-low reset input; a low level longer than the minimum pulse length generates a reset even if the clock is not running.
5 VCC power_in Digital supply voltage (1.8V-5.5V for ATmega324PV).
6 GND power_in Ground.
7 XTAL2 output Output from the inverting oscillator amplifier.
8 XTAL1 input Input to the inverting oscillator amplifier and to the internal clock operating circuit.
9 PD0 bidirectional Port D bit 0 bi-directional I/O with selectable pull-up; alternate functions RXD0 (USART0 receive) and PCINT24.
10 PD1 bidirectional Port D bit 1 bi-directional I/O with selectable pull-up; alternate functions TXD0 (USART0 transmit) and PCINT25.
11 PD2 bidirectional Port D bit 2 bi-directional I/O with selectable pull-up; alternate functions RXD1 (USART1 receive), INT0 and PCINT26.
12 PD3 bidirectional Port D bit 3 bi-directional I/O with selectable pull-up; alternate functions TXD1 (USART1 transmit), INT1 and PCINT27.
13 PD4 bidirectional Port D bit 4 bi-directional I/O with selectable pull-up; alternate functions OC1B, XCK1 (USART1 external clock) and PCINT28.
14 PD5 bidirectional Port D bit 5 bi-directional I/O with selectable pull-up; alternate functions OC1A and PCINT29.
15 PD6 bidirectional Port D bit 6 bi-directional I/O with selectable pull-up; alternate functions ICP1 (Timer1 input capture), OC2B and PCINT30.
16 PD7 bidirectional Port D bit 7 bi-directional I/O with selectable pull-up; alternate functions OC2A and PCINT31.
17 VCC power_in Digital supply voltage (1.8V-5.5V for ATmega324PV).
18 GND power_in Ground.
19 PC0 bidirectional Port C bit 0 bi-directional I/O with selectable pull-up; alternate functions SCL (2-wire interface) and PCINT16.
20 PC1 bidirectional Port C bit 1 bi-directional I/O with selectable pull-up; alternate functions SDA (2-wire interface) and PCINT17.
21 PC2 bidirectional Port C bit 2 bi-directional I/O with selectable pull-up; alternate functions TCK (JTAG) and PCINT18.
22 PC3 bidirectional Port C bit 3 bi-directional I/O with selectable pull-up; alternate functions TMS (JTAG) and PCINT19.
23 PC4 bidirectional Port C bit 4 bi-directional I/O with selectable pull-up; alternate functions TDO (JTAG) and PCINT20.
24 PC5 bidirectional Port C bit 5 bi-directional I/O with selectable pull-up; alternate functions TDI (JTAG) and PCINT21.
25 PC6 bidirectional Port C bit 6 bi-directional I/O with selectable pull-up; alternate functions TOSC1 (Timer/Counter2 oscillator) and PCINT22.
26 PC7 bidirectional Port C bit 7 bi-directional I/O with selectable pull-up; alternate functions TOSC2 (Timer/Counter2 oscillator) and PCINT23.
27 AVCC power_in Supply voltage for Port A and the ADC; must be connected to VCC even if the ADC is unused, through a low-pass filter if the ADC is used.
28 GND power_in Ground.
29 AREF input Analog reference pin for the A/D converter.
30 PA7 bidirectional Port A bit 7 bi-directional I/O with selectable pull-up and ADC7 analog input; alternate function PCINT7.
31 PA6 bidirectional Port A bit 6 bi-directional I/O with selectable pull-up and ADC6 analog input; alternate function PCINT6.
32 PA5 bidirectional Port A bit 5 bi-directional I/O with selectable pull-up and ADC5 analog input; alternate function PCINT5.
33 PA4 bidirectional Port A bit 4 bi-directional I/O with selectable pull-up and ADC4 analog input; alternate function PCINT4.
34 PA3 bidirectional Port A bit 3 bi-directional I/O with selectable pull-up and ADC3 analog input; alternate function PCINT3.
35 PA2 bidirectional Port A bit 2 bi-directional I/O with selectable pull-up and ADC2 analog input; alternate function PCINT2.
36 PA1 bidirectional Port A bit 1 bi-directional I/O with selectable pull-up and ADC1 analog input; alternate function PCINT1.
37 PA0 bidirectional Port A bit 0 bi-directional I/O with selectable pull-up and ADC0 analog input; alternate function PCINT0.
38 VCC power_in Digital supply voltage (1.8V-5.5V for ATmega324PV).
39 GND power_in Ground.
40 PB0 bidirectional Port B bit 0 bi-directional I/O with selectable pull-up; alternate functions T0, XCK0 (USART0 external clock) and PCINT8.
41 PB1 bidirectional Port B bit 1 bi-directional I/O with selectable pull-up; alternate functions T1, CLKO (divided system clock output) and PCINT9.
42 PB2 bidirectional Port B bit 2 bi-directional I/O with selectable pull-up; alternate functions AIN0 (comparator positive input), INT2 and PCINT10.
43 PB3 bidirectional Port B bit 3 bi-directional I/O with selectable pull-up; alternate functions AIN1 (comparator negative input), OC0A and PCINT11.
44 PB4 bidirectional Port B bit 4 bi-directional I/O with selectable pull-up; alternate functions SS (SPI slave select), OC0B and PCINT12.
45 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Microchip Tech
Package VQFN-44(7x7)
Category Embedded Processors & Controllers
Pins 45

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage (operating range) VCC 1.8 5.5 V ATmega324PV-10MU, industrial -40°C to 85°C; ordering table 10 MHz speed grade 484
Maximum speed grade 10 MHz Power supply 1.8V - 5.5V (ATmega324PV-10MU) 484
Operating temperature range (industrial) TA -40 85 °C Industrial operating range, ATmega324PV-10MU 484
Power Supply Current, Active mode ICC 0.42 0.5 mA Active 1 MHz, VCC = 2V; TA = -40°C to 85°C, VCC = 1.8V to 5.5V 324
Power Supply Current, Active mode ICC 2.4 2.7 mA Active 4 MHz, VCC = 3V; TA = -40°C to 85°C, VCC = 1.8V to 5.5V 324
Power Supply Current, Active mode ICC 8 9 mA Active 8 MHz, VCC = 5V; TA = -40°C to 85°C, VCC = 1.8V to 5.5V 324
Power Supply Current, Idle mode ICC 0.13 0.15 mA Idle 1 MHz, VCC = 2V; TA = -40°C to 85°C, VCC = 1.8V to 5.5V 324
Power Supply Current, Idle mode ICC 0.6 0.7 mA Idle 4 MHz, VCC = 3V; TA = -40°C to 85°C, VCC = 1.8V to 5.5V 324
Power Supply Current, Idle mode ICC 2.3 5 mA Idle 8 MHz, VCC = 5V; TA = -40°C to 85°C, VCC = 1.8V to 5.5V 324
Input Low Voltage, except XTAL1 and RESET pin VIL -0.5 V VCC = 1.8V - 2.4V; max printed as 0.2VCC 322
Input Low Voltage, XTAL1 pin VIL1 -0.5 V VCC = 1.8V - 5.5V; max printed as 0.1VCC 322
Input Low Voltage, RESET pin VIL2 -0.5 V VCC = 1.8V - 5.5V; max printed as 0.1VCC 322
Output Low Voltage VOL 0.9 V IOL = 20 mA, VCC = 5V 322
Output Low Voltage VOL 0.6 V IOL = 10 mA, VCC = 3V 322
Output High Voltage VOH 4.2 V IOH = -20 mA, VCC = 5V 322
Output High Voltage VOH 2.3 V IOH = -10 mA, VCC = 3V 322
Input Leakage Current I/O Pin (low) IIL 1 µA VCC = 5.5V, pin low (absolute value) 322
Input Leakage Current I/O Pin (high) IIH 1 µA VCC = 5.5V, pin high (absolute value) 322
Reset Pull-up Resistor RRST 30 60 kΩ 322
I/O Pin Pull-up Resistor RPU 20 50 kΩ 322
Analog Comparator Input Offset Voltage VACIO 40 mV VCC = 5V, Vin = VCC/2 323
Analog Comparator Input Leakage Current IACLK -50 50 nA VCC = 5V, Vin = VCC/2 323
Operating Temperature -55 125 °C 322
Storage Temperature -65 150 °C 322
Voltage on any pin except RESET with respect to Ground -0.5 V With respect to Ground; upper limit printed as VCC+0.5V 322
Voltage on RESET with respect to Ground -0.5 13 V With respect to Ground 322
DC Current per I/O Pin 40 mA 322

CAD (KiCad official)

  • Symbol: ATMEGA324PV-10MU
  • Footprint: Package_DFN_QFN:QFN-44-1EP_7x7mm_P0.5mm_EP5.15x5.15mm
  • 3D model: VQFN-44(7x7) (KiCad packages3D, STEP)
  • 3D model files: atmega324pv-10mu-etched.step / atmega324pv-10mu-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); atmega324pv-10mu.step / atmega324pv-10mu.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Microchip Tech datasheet (496 pp, sha256 5edda0efd505127f, retrieved 2026-10-30, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF