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Contents

README

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ATMEGA324PA-AU

Microchip Tech · Microcontrollers (MCU/MPU/SOC) · TQFP-44(10x10)

ATMEGA324PA-AU from Microchip Tech, in a TQFP-44(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 PB5 bidirectional Port B bit 5 bi-directional I/O with selectable pull-up; alternate functions MOSI (SPI) and PCINT13.
2 PB6 bidirectional Port B bit 6 bi-directional I/O with selectable pull-up; alternate functions MISO (SPI) and PCINT14.
3 PB7 bidirectional Port B bit 7 bi-directional I/O with selectable pull-up; alternate functions SCK (SPI) and PCINT15.
4 RESET input Reset input; a low level longer than the minimum pulse length generates a reset even if the clock is not running.
5 VCC power_in Digital supply voltage.
6 GND power_in Ground.
7 XTAL2 output Output from the inverting oscillator amplifier.
8 XTAL1 input Input to the inverting oscillator amplifier and input to the internal clock operating circuit.
9 PD0 bidirectional Port D bit 0 bi-directional I/O with selectable pull-up; alternate functions RXD0 (USART0 receive) and PCINT24.
10 PD1 bidirectional Port D bit 1 bi-directional I/O with selectable pull-up; alternate functions TXD0 (USART0 transmit) and PCINT25.
11 PD2 bidirectional Port D bit 2 bi-directional I/O with selectable pull-up; alternate functions RXD1 (USART1 receive), INT0 and PCINT26.
12 PD3 bidirectional Port D bit 3 bi-directional I/O with selectable pull-up; alternate functions TXD1 (USART1 transmit), INT1 and PCINT27.
13 PD4 bidirectional Port D bit 4 bi-directional I/O with selectable pull-up; alternate functions XCK1, OC1B and PCINT28.
14 PD5 bidirectional Port D bit 5 bi-directional I/O with selectable pull-up; alternate functions OC1A and PCINT29.
15 PD6 bidirectional Port D bit 6 bi-directional I/O with selectable pull-up; alternate functions OC2B, ICP1 and PCINT30.
16 PD7 bidirectional Port D bit 7 bi-directional I/O with selectable pull-up; alternate functions OC2A and PCINT31.
17 VCC power_in Digital supply voltage.
18 GND power_in Ground.
19 PC0 bidirectional Port C bit 0 bi-directional I/O with selectable pull-up; alternate functions SCL (two-wire serial clock) and PCINT16.
20 PC1 bidirectional Port C bit 1 bi-directional I/O with selectable pull-up; alternate functions SDA (two-wire serial data) and PCINT17.
21 PC2 bidirectional Port C bit 2 bi-directional I/O with selectable pull-up; alternate functions TCK (JTAG test clock) and PCINT18.
22 PC3 bidirectional Port C bit 3 bi-directional I/O with selectable pull-up; alternate functions TMS (JTAG test mode select) and PCINT19.
23 PC4 bidirectional Port C bit 4 bi-directional I/O with selectable pull-up; alternate functions TDO (JTAG test data output) and PCINT20.
24 PC5 bidirectional Port C bit 5 bi-directional I/O with selectable pull-up; alternate functions TDI (JTAG test data input) and PCINT21.
25 PC6 bidirectional Port C bit 6 bi-directional I/O with selectable pull-up; alternate functions TOSC1 (timer oscillator pin 1) and PCINT22.
26 PC7 bidirectional Port C bit 7 bi-directional I/O with selectable pull-up; alternate functions TOSC2 (timer oscillator pin 2) and PCINT23.
27 AVCC power_in Supply voltage pin for Port A and the ADC; must be connected to VCC even if the ADC is unused, through a low-pass filter if the ADC is used.
28 GND power_in Ground.
29 AREF input Analog reference pin for the Analog-to-digital Converter.
30 PA7 bidirectional Port A bit 7 bi-directional I/O with selectable pull-up; ADC input channel 7 and PCINT7.
31 PA6 bidirectional Port A bit 6 bi-directional I/O with selectable pull-up; ADC input channel 6 and PCINT6.
32 PA5 bidirectional Port A bit 5 bi-directional I/O with selectable pull-up; ADC input channel 5 and PCINT5.
33 PA4 bidirectional Port A bit 4 bi-directional I/O with selectable pull-up; ADC input channel 4 and PCINT4.
34 PA3 bidirectional Port A bit 3 bi-directional I/O with selectable pull-up; ADC input channel 3 and PCINT3.
35 PA2 bidirectional Port A bit 2 bi-directional I/O with selectable pull-up; ADC input channel 2 and PCINT2.
36 PA1 bidirectional Port A bit 1 bi-directional I/O with selectable pull-up; ADC input channel 1 and PCINT1.
37 PA0 bidirectional Port A bit 0 bi-directional I/O with selectable pull-up; ADC input channel 0 and PCINT0.
38 VCC power_in Digital supply voltage.
39 GND power_in Ground.
40 PB0 bidirectional Port B bit 0 bi-directional I/O with selectable pull-up; alternate functions XCK0, T0 and PCINT8.
41 PB1 bidirectional Port B bit 1 bi-directional I/O with selectable pull-up; alternate functions T1, CLKO (divided system clock output) and PCINT9.
42 PB2 bidirectional Port B bit 2 bi-directional I/O with selectable pull-up; alternate functions AIN0 (comparator positive input), INT2 and PCINT10.
43 PB3 bidirectional Port B bit 3 bi-directional I/O with selectable pull-up; alternate functions AIN1 (comparator negative input), OC0A and PCINT11.
44 PB4 bidirectional Port B bit 4 bi-directional I/O with selectable pull-up; alternate functions SS (SPI slave select), OC0B and PCINT12.

Key specifications

Parameter Value
Manufacturer Microchip Tech
Package TQFP-44(10x10)
Category Embedded Processors & Controllers
Pins 44

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Power Supply 1.8 5.5 V ATmega324PA-AU, Ordering Information table (speed 20 MHz row); speed versus VCC per Speed Grades p.401 not in excerpt 12
Speed 20 MHz ATmega324PA-AU, Industrial operational range; Ordering Information table 12
Operational Range (Industrial) -40 85 °C ATmega324PA-AU, Industrial (-40°C to 85°C) 12

CAD (KiCad official)

  • Symbol: ATMEGA324PA-AU
  • Footprint: Package_QFP:TQFP-44_10x10mm_P0.8mm
  • 3D model: TQFP-44(10x10) (KiCad packages3D, STEP)
  • 3D model files: atmega324pa-au-etched.step / atmega324pa-au-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); atmega324pa-au.step / atmega324pa-au.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Microchip Tech datasheet (450 pp, sha256 bf06aad0267aa3f5, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF