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ATMEGA3209-MFR

Microchip Tech · Microcontroller Units (MCUs/MPUs/SOCs) · UQFN-48(6x6)

ATMEGA3209-MFR from Microchip Tech, in a UQFN-48(6x6). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 PA5 bidirectional Port A bit 5 I/O with alternate functions USART0 RxD (alternate position), SPI0 MISO and TCA0 WO5 (alternate position), and it can be used as an event input and external interrupt source.
2 PA6 bidirectional Port A bit 6 I/O with alternate functions USART0 XCK (alternate position), SPI0 SCK and CCL LUT0 OUT (alternate position), and it can be used as an event input and external interrupt source.
3 PA7 bidirectional Port A bit 7 I/O with alternate functions CLKOUT, AC0 OUT, USART0 XDIR (alternate position), SPI0 SS and EVOUTA (alternate position).
4 PB0 bidirectional Port B bit 0 I/O with alternate functions USART3 TxD and TCA0 WO0 (alternate position).
5 PB1 bidirectional Port B bit 1 I/O with alternate functions USART3 RxD and TCA0 WO1 (alternate position).
6 PB2 bidirectional Port B bit 2 I/O with alternate functions USART3 XCK, TCA0 WO2 (alternate position) and EVOUTB.
7 PB3 bidirectional Port B bit 3 I/O with alternate functions USART3 XDIR and TCA0 WO3 (alternate position).
8 PB4 bidirectional Port B bit 4 I/O with alternate functions USART3 TxD (alternate position), TCA0 WO4 (alternate position) and TCB2 WO (alternate position).
9 PB5 bidirectional Port B bit 5 I/O with alternate functions USART3 RxD (alternate position), TCA0 WO5 (alternate position) and TCB3 WO.
10 PC0 bidirectional Port C bit 0 I/O with alternate functions USART1 TxD, SPI0 MOSI (alternate position), TCA0 WO0 (alternate position), TCB2 WO and CCL LUT1 IN0.
11 PC1 bidirectional Port C bit 1 I/O with alternate functions USART1 RxD, SPI0 MISO (alternate position), TCA0 WO1 (alternate position), TCB3 WO (alternate position) and CCL LUT1 IN1.
12 PC2 bidirectional Port C bit 2 I/O with alternate functions TWI0 SDA (alternate position), USART1 XCK, SPI0 SCK (alternate position), TCA0 WO2 (alternate position), EVOUTC and CCL LUT1 IN2.
13 PC3 bidirectional Port C bit 3 I/O with alternate functions TWI0 SCL (alternate position), USART1 XDIR, SPI0 SS (alternate position), TCA0 WO3 (alternate position) and CCL LUT1 OUT.
14 VDD power_in Supply voltage for the VDD power domain; the device supply range is 1.8-5.5V per the Ordering Information table.
15 GND power_in Ground reference for the device.
16 PC4 bidirectional Port C bit 4 I/O with alternate functions USART1 TxD (alternate position) and TCA0 WO4 (alternate position).
17 PC5 bidirectional Port C bit 5 I/O with alternate functions USART1 RxD (alternate position) and TCA0 WO5 (alternate position).
18 PC6 bidirectional Port C bit 6 I/O with alternate functions USART1 XCK (alternate position) and CCL LUT1 OUT (alternate position).
19 PC7 bidirectional Port C bit 7 I/O with alternate functions USART1 XDIR (alternate position) and EVOUTC (alternate position).
20 PD0 bidirectional Port D bit 0 I/O with analog input AIN0, TCA0 WO0 (alternate position) and CCL LUT2 IN0.
21 PD1 bidirectional Port D bit 1 I/O with analog input AIN1, AC0 positive input P3, and TCA0 WO1 (alternate position).
22 PD2 bidirectional Port D bit 2 I/O with analog input AIN2, AC0 positive input P0, TCA0 WO2 (alternate position), EVOUTD and CCL LUT2 IN2.
23 PD3 bidirectional Port D bit 3 I/O with analog input AIN3, AC0 negative input N0, TCA0 WO3 (alternate position) and CCL LUT2 OUT.
24 PD4 bidirectional Port D bit 4 I/O with analog input AIN4, AC0 positive input P1 and TCA0 WO4 (alternate position).
25 PD5 bidirectional Port D bit 5 I/O with analog input AIN5, AC0 negative input N1 and TCA0 WO5 (alternate position).
26 PD6 bidirectional Port D bit 6 I/O with analog input AIN6, AC0 positive input P2 and CCL LUT2 OUT (alternate position).
27 PD7 bidirectional Port D bit 7 I/O with analog input AIN7, external voltage reference VREFA, AC0 negative input N2 and EVOUTD (alternate position).
28 AVDD power_in Supply for the AVDD power domain, which feeds the analog functions and the GPIO pins on that domain.
29 GND power_in Ground reference for the device.
30 PE0 bidirectional Port E bit 0 I/O with analog input AIN8, SPI0 MOSI (alternate position) and TCA0 WO0 (alternate position).
31 PE1 bidirectional Port E bit 1 I/O with analog input AIN9, SPI0 MISO (alternate position) and TCA0 WO1 (alternate position).
32 PE2 bidirectional Port E bit 2 I/O with analog input AIN10, SPI0 SCK (alternate position), TCA0 WO2 (alternate position) and EVOUTE.
33 PE3 bidirectional Port E bit 3 I/O with analog input AIN11, SPI0 SS (alternate position) and TCA0 WO3 (alternate position).
34 PF0 bidirectional Port F bit 0 I/O; also the TOSC1 crystal oscillator pin, with USART2 TxD, TCA0 WO0 (alternate position) and CCL LUT3 IN0.
35 PF1 bidirectional Port F bit 1 I/O; also the TOSC2 crystal oscillator pin, with USART2 RxD, TCA0 WO1 (alternate position) and CCL LUT3 IN1.
36 PF2 bidirectional Port F bit 2 I/O with TWI0 SDA (alternate position), analog input AIN12, USART2 XCK, TCA0 WO2 (alternate position), EVOUTF and CCL LUT3 IN2.
37 PF3 bidirectional Port F bit 3 I/O with TWI0 SCL (alternate position), analog input AIN13, USART2 XDIR, TCA0 WO3 (alternate position) and CCL LUT3 OUT.
38 PF4 bidirectional Port F bit 4 I/O with analog input AIN14, USART2 TxD (alternate position), TCA0 WO4 (alternate position) and TCB0 WO (alternate position).
39 PF5 bidirectional Port F bit 5 I/O with analog input AIN15, USART2 RxD (alternate position), TCA0 WO5 (alternate position) and TCB1 WO (alternate position).
40 PF6 bidirectional Port F bit 6 I/O that is configured as the RESET pin when SYSCFG0.RSTPINCFG is set to RESET; also USART2 XCK (alternate position) and CCL LUT3 OUT (alternate position).
41 UPDI bidirectional Unified Program and Debug Interface pin used for programming and debugging.
42 VDD power_in Supply voltage for the VDD power domain; the device supply range is 1.8-5.5V per the Ordering Information table.
43 GND power_in Ground reference for the device.
44 PA0 bidirectional Port A bit 0 I/O with EXTCLK external clock input, USART0 TxD, TCA0 WO0 and CCL LUT0 IN0.
45 PA1 bidirectional Port A bit 1 I/O with USART0 RxD, TCA0 WO1 and CCL LUT0 IN1.
46 PA2 bidirectional Port A bit 2 I/O with TWI0 SDA (master/slave), USART0 XCK, TCA0 WO2, TCB0 WO, EVOUTA and CCL LUT0 IN2.
47 PA3 bidirectional Port A bit 3 I/O with TWI0 SCL (master/slave), USART0 XDIR, TCA0 WO3, TCB1 WO and CCL LUT0 OUT.
48 PA4 bidirectional Port A bit 4 I/O with USART0 TxD (alternate position), SPI0 MOSI and TCA0 WO4 (alternate position).
49 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Microchip Tech
Package UQFN-48(6x6)
Category Single Chip Microcomputer/Microcontroller
Pins 49

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply Voltage 1.8 5.5 V ATmega3209-MF (48 UQFN), per Table 34-1 Available Product Numbers 518
Temperature Range -40 125 °C ATmega3209-MF (48 UQFN, -MF = -40°C to +125°C), per Table 34-1 518
Max. CPU Speed 20 MHz ATmega3209-MF (48 UQFN), per Table 34-1 518

CAD (KiCad official)

  • Symbol: ATMEGA3209-MFR
  • Footprint: Package_DFN_QFN:QFN-48-1EP_6x6mm_P0.4mm_EP4.2x4.2mm
  • 3D model: UQFN-48(6x6), generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 0.9 mm nominal QFN height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)
  • 3D model files: atmega3209-mfr-etched.step / atmega3209-mfr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); atmega3209-mfr.step / atmega3209-mfr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Microchip Tech datasheet (547 pp, sha256 8964762f5bd2fdc0, retrieved 2026-10-30, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF