component
ATMEGA3208-AU
Public Made by Adomby adom
Microchip Tech Pre-ordered MCUs, TQFP-32(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
Open in new tab ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.
Symbol & Footprint
Schematic Symbol
Open full view ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
PCB Footprint
Open full view ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
Datasheet
Open in new tab ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
README
markdownATMEGA3208-AU
Microchip Tech · Pre-ordered MCUs · TQFP-32(7x7)
ATMEGA3208-AU from Microchip Tech, in a TQFP-32(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model). Symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | PA3 | bidirectional | General-purpose I/O pin PA3 that can also carry TWI0 SCL (master), USART0 XDIR, TCA0 WO3, TCB1 WO and CCL LUT0 OUT, as listed in the I/O multiplexing table. |
| 2 | PA4 | bidirectional | General-purpose I/O pin PA4 that can also carry USART0 TxD (alternate position), SPI0 MOSI and TCA0 WO4, as listed in the I/O multiplexing table. |
| 3 | PA5 | bidirectional | General-purpose I/O pin PA5 that can also carry USART0 RxD (alternate position), SPI0 MISO and TCA0 WO5, as listed in the I/O multiplexing table. |
| 4 | PA6 | bidirectional | General-purpose I/O pin PA6 that can also carry USART0 XCK (alternate position), SPI0 SCK and CCL LUT0 OUT (alternate position), and provides full asynchronous pin-change interrupt detection. |
| 5 | PA7 | bidirectional | General-purpose I/O pin PA7 that can also carry CLKOUT, AC0 OUT, USART0 XDIR (alternate position), SPI0 SS and EVSYS output EVOUTA (alternate position). |
| 6 | PC0 | bidirectional | General-purpose I/O pin PC0 that can also carry USART1 TxD, SPI0 MOSI (alternate), TCA0 WO0 (alternate), TCB2 WO and CCL LUT1 IN0. |
| 7 | PC1 | bidirectional | General-purpose I/O pin PC1 that can also carry USART1 RxD, SPI0 MISO (alternate), TCA0 WO1 (alternate), TCB3 WO (alternate) and CCL LUT1 IN1. |
| 8 | PC2 | bidirectional | General-purpose I/O pin PC2 that can also carry TWI0 SDA (master, alternate), USART1 XCK, SPI0 SCK (alternate), TCA0 WO2 (alternate), EVSYS output EVOUTC and CCL LUT1 IN2. |
| 9 | PC3 | bidirectional | General-purpose I/O pin PC3 that can also carry TWI0 SCL (master, alternate), USART1 XDIR, SPI0 SS (alternate), TCA0 WO3 (alternate) and CCL LUT1 OUT. |
| 10 | PD0 | bidirectional | General-purpose I/O pin PD0 that can also be ADC0 analog input AIN0, AC0 input (alternate TCA0 WO0 output) and CCL LUT2 IN0. |
| 11 | PD1 | bidirectional | General-purpose I/O pin PD1 that can also be ADC0 analog input AIN1, AC0 positive input P3, TCA0 WO1 (alternate) and CCL LUT2 IN1. |
| 12 | PD2 | bidirectional | General-purpose I/O pin PD2 that can also be ADC0 analog input AIN2, AC0 positive input P0, TCA0 WO2 (alternate), EVSYS output EVOUTD and CCL LUT2 IN2; it provides full asynchronous pin-change interrupt detection. |
| 13 | PD3 | bidirectional | General-purpose I/O pin PD3 that can also be ADC0 analog input AIN3, AC0 negative input N0, TCA0 WO3 (alternate) and CCL LUT2 OUT. |
| 14 | PD4 | bidirectional | General-purpose I/O pin PD4 that can also be ADC0 analog input AIN4, AC0 positive input P1 and TCA0 WO4 (alternate). |
| 15 | PD5 | bidirectional | General-purpose I/O pin PD5 that can also be ADC0 analog input AIN5, AC0 negative input N1 and TCA0 WO5 (alternate). |
| 16 | PD6 | bidirectional | General-purpose I/O pin PD6 that can also be ADC0 analog input AIN6, AC0 positive input P2 and CCL LUT2 OUT (alternate); it provides full asynchronous pin-change interrupt detection. |
| 17 | PD7 | bidirectional | General-purpose I/O pin PD7 that can also be the external voltage reference input VREFA, ADC0 analog input AIN7, AC0 negative input N2 and EVSYS output EVOUTD (alternate). |
| 18 | AVDD | power_in | Analog supply pin for the analog peripherals, including the ADC, which takes its input from VDD, VREF or the external VREFA reference as configured. |
| 19 | GND | power_in | Ground reference pin for the device. |
| 20 | PF0 | bidirectional | General-purpose I/O pin PF0 that is the TOSC1 crystal oscillator input and can also carry USART2 TxD, TCA0 WO0 (alternate) and CCL LUT3 IN0. |
| 21 | PF1 | bidirectional | General-purpose I/O pin PF1 that is the TOSC2 crystal oscillator output and can also carry USART2 RxD, TCA0 WO1 (alternate) and CCL LUT3 IN1. |
| 22 | PF2 | bidirectional | General-purpose I/O pin PF2 that can also carry TWI0 SDA (slave, alternate), ADC0 analog input AIN12, USART2 XCK, TCA0 WO2 (alternate), EVSYS output EVOUTF and CCL LUT3 IN2; it provides full asynchronous pin-change interrupt detection. |
| 23 | PF3 | bidirectional | General-purpose I/O pin PF3 that can also carry TWI0 SCL (slave, alternate), ADC0 analog input AIN13, USART2 XDIR, TCA0 WO3 (alternate) and CCL LUT3 OUT. |
| 24 | PF4 | bidirectional | General-purpose I/O pin PF4 that can also be ADC0 analog input AIN14, USART2 TxD (alternate), TCA0 WO4 (alternate) and TCB0 WO (alternate). |
| 25 | PF5 | bidirectional | General-purpose I/O pin PF5 that can also be ADC0 analog input AIN15, USART2 RxD (alternate), TCA0 WO5 (alternate) and TCB1 WO (alternate). |
| 26 | PF6 | bidirectional | General-purpose I/O pin PF6 that can also be the RESET pin (selected by RSTPINCFG), USART2 XCK (alternate) and CCL LUT3 OUT (alternate); it provides full asynchronous pin-change interrupt detection. |
| 27 | UPDI | bidirectional | Unified Program and Debug Interface pin used for programming and debugging the device. |
| 28 | VDD | power_in | Main supply pin; the device operates from 1.8V to 5.5V per the ordering information. |
| 29 | GND | power_in | Ground reference pin for the device. |
| 30 | PA0 | bidirectional | General-purpose I/O pin PA0 that can also be the EXTCLK external clock input, USART0 TxD (alternate), TCA0 WO0 and CCL LUT0 IN0. |
| 31 | PA1 | bidirectional | General-purpose I/O pin PA1 that can also carry USART0 RxD, TCA0 WO1 and CCL LUT0 IN1. |
| 32 | PA2 | bidirectional | General-purpose I/O pin PA2 that can also carry TWI0 SDA (master), USART0 XCK, TCA0 WO2, TCB0 WO, EVSYS output EVOUTA and CCL LUT0 IN2; it provides full asynchronous pin-change interrupt detection. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | TQFP-32(7x7) |
| Category | Embedded Processors & Controllers |
| Pins | 32 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage (ATmega3208-AU) | 1.8 | 5.5 | V | ATmega3208-AU, Table 34-1 Supply Voltage | 518 | ||
| Temperature range (ATmega3208-AU) | -40 | 85 | °C | ATmega3208-AU, Table 34-1 Temperature Range (-40°C to +85°C) | 518 | ||
| Max. CPU speed (ATmega3208-AU) | 20 | MHz | ATmega3208-AU, Table 34-1 Max. CPU Speed | 518 |
CAD (KiCad official)
- Symbol:
ATMEGA3208-AU - Footprint:
Package_QFP:TQFP-32_7x7mm_P0.8mm - 3D model: TQFP-32(7x7) (KiCad packages3D, STEP)
- 3D model files:
atmega3208-au-etched.step/atmega3208-au-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);atmega3208-au.step/atmega3208-au.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Microchip Tech datasheet (547 pp, sha256
8964762f5bd2fdc0, retrieved 2026-11-13, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).