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ATMEGA2560-16AUR

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Microchip Tech Microcontrollers (MCU/MPU/SOC), TQFP-100(14x14). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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Contents

README

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ATMEGA2560-16AUR

Microchip Tech · Microcontrollers (MCU/MPU/SOC) · TQFP-100(14x14)

ATMEGA2560-16AUR from Microchip Tech, in a TQFP-100(14x14). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 PG5 bidirectional Port G bit 5 I/O with internal pull-up; alternate function OC0B (Timer/Counter0 output compare B / PWM).
2 PE0 bidirectional Port E bit 0 I/O with internal pull-up; alternate functions RXD0 (USART0 receive) and PCINT8.
3 PE1 bidirectional Port E bit 1 I/O with internal pull-up; alternate function TXD0 (USART0 transmit).
4 PE2 bidirectional Port E bit 2 I/O with internal pull-up; alternate functions XCK0 (USART0 external clock) and AIN0 (analog comparator input).
5 PE3 bidirectional Port E bit 3 I/O with internal pull-up; alternate functions OC3A (Timer3 output compare A) and AIN1.
6 PE4 bidirectional Port E bit 4 I/O with internal pull-up; alternate functions OC3B and INT4 external interrupt.
7 PE5 bidirectional Port E bit 5 I/O with internal pull-up; alternate functions OC3C and INT5 external interrupt.
8 PE6 bidirectional Port E bit 6 I/O with internal pull-up; alternate functions T3 (Timer3 clock input) and INT6 external interrupt.
9 PE7 bidirectional Port E bit 7 I/O with internal pull-up; alternate functions CLKO (system clock output), ICP3 (Timer3 input capture) and INT7.
10 VCC power_in Digital supply voltage.
11 GND power_in Ground.
12 PH0 bidirectional Port H bit 0 I/O with internal pull-up; alternate function RXD2 (USART2 receive).
13 PH1 bidirectional Port H bit 1 I/O with internal pull-up; alternate function TXD2 (USART2 transmit).
14 PH2 bidirectional Port H bit 2 I/O with internal pull-up; alternate function XCK2 (USART2 external clock).
15 PH3 bidirectional Port H bit 3 I/O with internal pull-up; alternate function OC4A (Timer4 output compare A / PWM).
16 PH4 bidirectional Port H bit 4 I/O with internal pull-up; alternate function OC4B (Timer4 output compare B / PWM).
17 PH5 bidirectional Port H bit 5 I/O with internal pull-up; alternate function OC4C (Timer4 output compare C / PWM).
18 PH6 bidirectional Port H bit 6 I/O with internal pull-up; alternate function OC2B (Timer2 output compare B / PWM).
19 PB0 bidirectional Port B bit 0 I/O with internal pull-up; alternate functions SS (SPI slave select input) and PCINT0.
20 PB1 bidirectional Port B bit 1 I/O with internal pull-up; alternate functions SCK (SPI clock) and PCINT1.
21 PB2 bidirectional Port B bit 2 I/O with internal pull-up; alternate functions MOSI (SPI master out/slave in) and PCINT2.
22 PB3 bidirectional Port B bit 3 I/O with internal pull-up; alternate functions MISO (SPI master in/slave out) and PCINT3.
23 PB4 bidirectional Port B bit 4 I/O with internal pull-up; alternate functions OC2A (Timer2 output compare A) and PCINT4.
24 PB5 bidirectional Port B bit 5 I/O with internal pull-up; alternate functions OC1A (Timer1 output compare A) and PCINT5.
25 PB6 bidirectional Port B bit 6 I/O with internal pull-up; alternate functions OC1B (Timer1 output compare B) and PCINT6.
26 PB7 bidirectional Port B bit 7 I/O with internal pull-up; alternate functions OC0A, OC1C (output compares) and PCINT7.
27 PH7 bidirectional Port H bit 7 I/O with internal pull-up; alternate function T4 (Timer4 clock input).
28 PG3 bidirectional Port G bit 3 I/O with internal pull-up; alternate function TOSC2 (timer oscillator pin 2, inverting oscillator output when AS2 is set).
29 PG4 bidirectional Port G bit 4 I/O with internal pull-up; alternate function TOSC1 (timer oscillator pin 1, inverting oscillator amplifier input when AS2 is set).
30 RESET input Active-low reset input; a low level on this pin resets the device (also used with 11.5V-12.5V for parallel programming entry).
31 VCC power_in Digital supply voltage.
32 GND power_in Ground.
33 XTAL2 output Output of the inverting oscillator amplifier for the crystal/resonator.
34 XTAL1 input Input to the inverting oscillator amplifier and to the internal clock operating circuit.
35 PL0 bidirectional Port L bit 0 I/O with internal pull-up; alternate function ICP4 (Timer4 input capture).
36 PL1 bidirectional Port L bit 1 I/O with internal pull-up; alternate function ICP5 (Timer5 input capture).
37 PL2 bidirectional Port L bit 2 I/O with internal pull-up; alternate function T5 (Timer5 clock input).
38 PL3 bidirectional Port L bit 3 I/O with internal pull-up; alternate function OC5A (Timer5 output compare A / PWM).
39 PL4 bidirectional Port L bit 4 I/O with internal pull-up; alternate function OC5B (Timer5 output compare B / PWM).
40 PL5 bidirectional Port L bit 5 I/O with internal pull-up; alternate function OC5C (Timer5 output compare C / PWM).
41 PL6 bidirectional Port L bit 6 general-purpose I/O with internal pull-up; no alternate function listed.
42 PL7 bidirectional Port L bit 7 general-purpose I/O with internal pull-up; no alternate function listed.
43 PD0 bidirectional Port D bit 0 I/O with internal pull-up; alternate functions SCL (TWI clock) and INT0 external interrupt.
44 PD1 bidirectional Port D bit 1 I/O with internal pull-up; alternate functions SDA (TWI data) and INT1 external interrupt.
45 PD2 bidirectional Port D bit 2 I/O with internal pull-up; alternate functions RXD1 (USART1 receive) and INT2.
46 PD3 bidirectional Port D bit 3 I/O with internal pull-up; alternate functions TXD1 (USART1 transmit) and INT3.
47 PD4 bidirectional Port D bit 4 I/O with internal pull-up; alternate function ICP1 (Timer1 input capture).
48 PD5 bidirectional Port D bit 5 I/O with internal pull-up; alternate function XCK1 (USART1 external clock).
49 PD6 bidirectional Port D bit 6 I/O with internal pull-up; alternate function T1 (Timer1 clock input).
50 PD7 bidirectional Port D bit 7 I/O with internal pull-up; alternate function T0 (Timer0 clock input).
51 PG0 bidirectional Port G bit 0 I/O with internal pull-up; alternate function WR (external memory write strobe).
52 PG1 bidirectional Port G bit 1 I/O with internal pull-up; alternate function RD (external memory read strobe).
53 PC0 bidirectional Port C bit 0 I/O with internal pull-up; alternate function A8 (external memory address bit 8).
54 PC1 bidirectional Port C bit 1 I/O with internal pull-up; alternate function A9 (external memory address bit 9).
55 PC2 bidirectional Port C bit 2 I/O with internal pull-up; alternate function A10 (external memory address bit 10).
56 PC3 bidirectional Port C bit 3 I/O with internal pull-up; alternate function A11 (external memory address bit 11).
57 PC4 bidirectional Port C bit 4 I/O with internal pull-up; alternate function A12 (external memory address bit 12).
58 PC5 bidirectional Port C bit 5 I/O with internal pull-up; alternate function A13 (external memory address bit 13).
59 PC6 bidirectional Port C bit 6 I/O with internal pull-up; alternate function A14 (external memory address bit 14).
60 PC7 bidirectional Port C bit 7 I/O with internal pull-up; alternate function A15 (external memory address bit 15).
61 VCC power_in Digital supply voltage.
62 GND power_in Ground.
63 PJ0 bidirectional Port J bit 0 I/O with internal pull-up; alternate functions RXD3 (USART3 receive) and PCINT9.
64 PJ1 bidirectional Port J bit 1 I/O with internal pull-up; alternate functions TXD3 (USART3 transmit) and PCINT10.
65 PJ2 bidirectional Port J bit 2 I/O with internal pull-up; alternate functions XCK3 (USART3 external clock) and PCINT11.
66 PJ3 bidirectional Port J bit 3 I/O with internal pull-up; alternate function PCINT12 pin change interrupt.
67 PJ4 bidirectional Port J bit 4 I/O with internal pull-up; alternate function PCINT13 pin change interrupt.
68 PJ5 bidirectional Port J bit 5 I/O with internal pull-up; alternate function PCINT14 pin change interrupt.
69 PJ6 bidirectional Port J bit 6 I/O with internal pull-up; alternate function PCINT15 pin change interrupt.
70 PG2 bidirectional Port G bit 2 I/O with internal pull-up; alternate function ALE (external memory address latch enable).
71 PA7 bidirectional Port A bit 7 I/O with internal pull-up; alternate function AD7 (external memory address/data bit 7).
72 PA6 bidirectional Port A bit 6 I/O with internal pull-up; alternate function AD6 (external memory address/data bit 6).
73 PA5 bidirectional Port A bit 5 I/O with internal pull-up; alternate function AD5 (external memory address/data bit 5).
74 PA4 bidirectional Port A bit 4 I/O with internal pull-up; alternate function AD4 (external memory address/data bit 4).
75 PA3 bidirectional Port A bit 3 I/O with internal pull-up; alternate function AD3 (external memory address/data bit 3).
76 PA2 bidirectional Port A bit 2 I/O with internal pull-up; alternate function AD2 (external memory address/data bit 2).
77 PA1 bidirectional Port A bit 1 I/O with internal pull-up; alternate function AD1 (external memory address/data bit 1).
78 PA0 bidirectional Port A bit 0 I/O with internal pull-up; alternate function AD0 (external memory address/data bit 0).
79 PJ7 bidirectional Port J bit 7 general-purpose I/O with internal pull-up; no alternate function listed.
80 VCC power_in Digital supply voltage.
81 GND power_in Ground.
82 PK7 bidirectional Port K bit 7 I/O; alternate functions ADC15 (ADC input channel 15) and PCINT23.
83 PK6 bidirectional Port K bit 6 I/O; alternate functions ADC14 (ADC input channel 14) and PCINT22.
84 PK5 bidirectional Port K bit 5 I/O; alternate functions ADC13 (ADC input channel 13) and PCINT21.
85 PK4 bidirectional Port K bit 4 I/O; alternate functions ADC12 (ADC input channel 12) and PCINT20.
86 PK3 bidirectional Port K bit 3 I/O; alternate functions ADC11 (ADC input channel 11) and PCINT19.
87 PK2 bidirectional Port K bit 2 I/O; alternate functions ADC10 (ADC input channel 10) and PCINT18.
88 PK1 bidirectional Port K bit 1 I/O; alternate functions ADC9 (ADC input channel 9) and PCINT17.
89 PK0 bidirectional Port K bit 0 I/O; alternate functions ADC8 (ADC input channel 8) and PCINT16.
90 PF7 bidirectional Port F bit 7; ADC7 analog input channel 7 or JTAG TDI (test data in); pull-up active when JTAG is enabled.
91 PF6 bidirectional Port F bit 6; ADC6 analog input channel 6 or JTAG TDO (test data out, tri-stated unless shifting data).
92 PF5 bidirectional Port F bit 5; ADC5 analog input channel 5 or JTAG TMS (test mode select); pull-up active when JTAG is enabled.
93 PF4 bidirectional Port F bit 4; ADC4 analog input channel 4 or JTAG TCK (test clock); pull-up active when JTAG is enabled.
94 PF3 bidirectional Port F bit 3; ADC3 analog input channel 3.
95 PF2 bidirectional Port F bit 2; ADC2 analog input channel 2.
96 PF1 bidirectional Port F bit 1; ADC1 analog input channel 1.
97 PF0 bidirectional Port F bit 0; ADC0 analog input channel 0.
98 AREF input Analog reference pin for the A/D converter.
99 GND power_in Ground.
100 AVCC power_in Supply voltage pin for the A/D converter (Port F).

Key specifications

Parameter Value
Manufacturer Microchip Tech
Package TQFP-100(14x14)
Category Embedded Processors & Controllers
Pins 100

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage (VCC) for 16 MHz speed grade VCC 4.5 5.5 V Speed 16 MHz, ATmega2560-16AU(R) ordering row 410
Operating temperature range (industrial) -40 85 C Industrial (-40C to 85C) operation range 410
AVCC supply voltage range AVCC 1.8 5.5 V Note under serial programming circuit: AVCC should always be within 1.8V - 5.5V 339

CAD (KiCad official)

  • Symbol: ATMEGA2560-16AUR
  • Footprint: Package_QFP:TQFP-100_14x14mm_P0.5mm
  • 3D model: TQFP-100(14x14) (KiCad packages3D, STEP)
  • 3D model files: atmega2560-16aur-etched.step / atmega2560-16aur-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); atmega2560-16aur.step / atmega2560-16aur.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Microchip Tech datasheet (436 pp, sha256 978a018098bc1a13, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF