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ATMEGA16U2-MU

Microchip Tech · ATMEL & AVR · QFN-32-EP(5x5)

ATMEGA16U2-MU from Microchip Tech, in a QFN-32-EP(5x5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 XTAL1 input Input to the inverting oscillator amplifier and input to the internal clock operating circuit.
2 XTAL2/PC0 bidirectional Output from the inverting oscillator amplifier if enabled by fuse, also serves as generic I/O PC0.
3 GND power_in Ground.
4 VCC power_in Digital supply voltage (2.7 - 5.5V operating range).
5 PC2 bidirectional Port C bit 2 bi-directional I/O with internal pull-up, alternate function PCINT11 pin change interrupt (also marked AIN2 in the pinout).
6 PD0 bidirectional Port D bit 0 bi-directional I/O with internal pull-up, alternate functions INT0 external interrupt and OC0B Timer/Counter0 output compare B.
7 PD1 bidirectional Port D bit 1 bi-directional I/O with internal pull-up, alternate functions INT1 external interrupt and AIN0 analog comparator positive input.
8 PD2 bidirectional Port D bit 2 bi-directional I/O with internal pull-up, alternate functions INT2, AIN1 analog comparator negative input and RXD1 USART1 receive data.
9 PD3 bidirectional Port D bit 3 bi-directional I/O with internal pull-up, alternate functions INT3 external interrupt and TXD1 USART1 transmit data.
10 PD4 bidirectional Port D bit 4 bi-directional I/O with internal pull-up, alternate function INT5 external interrupt (also marked AIN3 in the pinout).
11 PD5 bidirectional Port D bit 5 bi-directional I/O with internal pull-up, alternate functions XCK1 USART1 external clock and PCINT12 pin change interrupt (also marked AIN4 in the pinout).
12 PD6 bidirectional Port D bit 6 bi-directional I/O with internal pull-up, alternate functions INT6 external interrupt and RTS USART1 receiver flow control (also marked AIN5 in the pinout).
13 PD7 bidirectional Port D bit 7 bi-directional I/O with internal pull-up, alternate functions HWB hardware boot, T0 Timer/Counter0 clock source, INT7 external interrupt and CTS USART1 transmitter flow control (also marked AIN6 in the pinout).
14 PB0 bidirectional Port B bit 0 bi-directional I/O with internal pull-up, alternate functions SS SPI slave select input and PCINT0 pin change interrupt.
15 PB1 bidirectional Port B bit 1 bi-directional I/O with internal pull-up, alternate functions SCLK SPI serial clock (also serial programming clock) and PCINT1 pin change interrupt.
16 PB2 bidirectional Port B bit 2 bi-directional I/O with internal pull-up, alternate functions PDI serial programming data input, MOSI SPI data and PCINT2 pin change interrupt.
17 PB3 bidirectional Port B bit 3 bi-directional I/O with internal pull-up, alternate functions PDO serial programming data output, MISO SPI data and PCINT3 pin change interrupt.
18 PB4 bidirectional Port B bit 4 bi-directional I/O with internal pull-up, alternate functions T1 Timer/Counter1 clock source and PCINT4 pin change interrupt.
19 PB5 bidirectional Port B bit 5 bi-directional I/O with internal pull-up, alternate function PCINT5 pin change interrupt.
20 PB6 bidirectional Port B bit 6 bi-directional I/O with internal pull-up, alternate function PCINT6 pin change interrupt.
21 PB7 bidirectional Port B bit 7 bi-directional I/O with internal pull-up, alternate functions OC0A, OC1C output compare outputs and PCINT7 pin change interrupt.
22 PC7 bidirectional Port C bit 7 bi-directional I/O with internal pull-up, alternate functions ICP1 input capture, INT4 external interrupt and CLKO clock output if enabled by fuse.
23 PC6 bidirectional Port C bit 6 bi-directional I/O with internal pull-up, alternate functions OC1A output compare A and PCINT8 pin change interrupt.
24 RESET/PC1/dW bidirectional Active-low reset input (a low level longer than the minimum pulse length generates a reset), alternatively debugWIRE channel or generic I/O depending on fuses RSTDISBL and DWEN.
25 PC5 bidirectional Port C bit 5 bi-directional I/O with internal pull-up, alternate functions OC1B output compare B and PCINT9 pin change interrupt.
26 PC4 bidirectional Port C bit 4 bi-directional I/O with internal pull-up, alternate function PCINT10 pin change interrupt.
27 UCAP power_out USB pads internal regulator output supply voltage, to be connected to an external 1 µF capacitor.
28 UGND power_in USB ground.
29 D+ bidirectional USB full speed positive data upstream port.
30 D- bidirectional USB full speed negative data upstream port.
31 UVCC power_in USB pads internal regulator input supply voltage.
32 AVCC power_in Supply voltage input for all analog features (analog comparator, PLL), to be externally connected to VCC through a low-pass filter.
33 EP power_in Large center pad underneath the QFN package, to be soldered to ground on the board for good mechanical stability.

Key specifications

Parameter Value
Manufacturer Microchip Tech
Package QFN-32-EP(5x5)
Category Embedded Processors & Controllers
Pins 33

CAD (KiCad official)

  • Symbol: ATMEGA16U2-MU
  • Footprint: Package_DFN_QFN:QFN-32-1EP_5x5mm_P0.5mm_EP3.3x3.3mm
  • 3D model: QFN-32-EP(5x5) (KiCad packages3D, STEP)
  • 3D model files: atmega16u2-mu-etched.step / atmega16u2-mu-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); atmega16u2-mu.step / atmega16u2-mu.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Microchip Tech datasheet (310 pp, sha256 182d44b383463202, retrieved 2026-10-28, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF