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ATMEGA169P-16AU
Public Made by Adomby adom
Microchip Tech Pre-ordered MCUs, TQFP-64(14x14). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
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ATMEGA169P-16AU
Microchip Tech · Pre-ordered MCUs · TQFP-64(14x14)
ATMEGA169P-16AU from Microchip Tech, in a TQFP-64(14x14). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | LCDCAP | passive | LCD power supply capacitor pin; the on-chip LCD supply needs only one external capacitor here. |
| 2 | PE0 | bidirectional | Port E bit 0, bi-directional I/O with selectable pull-up; alternate functions RXD (USART receive) and PCINT0. |
| 3 | PE1 | bidirectional | Port E bit 1, bi-directional I/O with selectable pull-up; alternate functions TXD (USART transmit) and PCINT1. |
| 4 | PE2 | bidirectional | Port E bit 2, bi-directional I/O with selectable pull-up; alternate functions XCK, AIN0 and PCINT2. |
| 5 | PE3 | bidirectional | Port E bit 3, bi-directional I/O with selectable pull-up; alternate functions AIN1 and PCINT3. |
| 6 | PE4 | bidirectional | Port E bit 4, bi-directional I/O with selectable pull-up; alternate functions USCK/SCL (USI clock) and PCINT4. |
| 7 | PE5 | bidirectional | Port E bit 5, bi-directional I/O with selectable pull-up; alternate functions DI/SDA (USI data input) and PCINT5. |
| 8 | PE6 | bidirectional | Port E bit 6, bi-directional I/O with selectable pull-up; alternate functions DO (USI data output) and PCINT6. |
| 9 | PE7 | bidirectional | Port E bit 7, bi-directional I/O with selectable pull-up; alternate functions CLKO (system clock output via CKOUT fuse) and PCINT7. |
| 10 | PB0 | bidirectional | Port B bit 0, bi-directional I/O with selectable pull-up; alternate functions SS (SPI slave select input) and PCINT8. |
| 11 | PB1 | bidirectional | Port B bit 1, bi-directional I/O with selectable pull-up; alternate functions SCK (SPI clock) and PCINT9. |
| 12 | PB2 | bidirectional | Port B bit 2, bi-directional I/O with selectable pull-up; alternate functions MOSI (SPI master out/slave in) and PCINT10. |
| 13 | PB3 | bidirectional | Port B bit 3, bi-directional I/O with selectable pull-up; alternate functions MISO (SPI master in/slave out) and PCINT11. |
| 14 | PB4 | bidirectional | Port B bit 4, bi-directional I/O with selectable pull-up; alternate functions OC0A (Timer/Counter0 output compare/PWM) and PCINT12. |
| 15 | PB5 | bidirectional | Port B bit 5, bi-directional I/O with selectable pull-up; alternate functions OC1A (Timer/Counter1 output compare/PWM) and PCINT13. |
| 16 | PB6 | bidirectional | Port B bit 6, bi-directional I/O with selectable pull-up; alternate functions OC1B (Timer/Counter1 output compare/PWM) and PCINT14. |
| 17 | PB7 | bidirectional | Port B bit 7, bi-directional I/O with selectable pull-up; alternate functions OC2A (Timer/Counter2 output compare/PWM) and PCINT15. |
| 18 | PG3 | bidirectional | Port G bit 3, bi-directional I/O with selectable pull-up; alternate functions T1 (Timer/Counter1 clock input) and SEG24 (LCD front plane 24). |
| 19 | PG4 | bidirectional | Port G bit 4, bi-directional I/O with selectable pull-up; alternate functions T0 (Timer/Counter0 clock input) and SEG23 (LCD front plane 23). |
| 20 | RESET/PG5 | input | Reset input where a low level longer than the minimum pulse length generates a reset; with RSTDISBL programmed it is the input-only PG5 with pull-up always on. |
| 21 | VCC | power_in | Digital supply voltage. |
| 22 | GND | power_in | Ground. |
| 23 | XTAL2 | output | Output from the inverting oscillator amplifier; also TOSC2 for the asynchronous timer oscillator. |
| 24 | XTAL1 | input | Input to the inverting oscillator amplifier and to the internal clock operating circuit; also TOSC1. |
| 25 | PD0 | bidirectional | Port D bit 0, bi-directional I/O with selectable pull-up; alternate functions ICP1 (Timer/Counter1 input capture) and SEG22 (LCD front plane 22). |
| 26 | PD1 | bidirectional | Port D bit 1, bi-directional I/O with selectable pull-up; alternate functions INT0 (external interrupt 0) and SEG21 (LCD front plane 21). |
| 27 | PD2 | bidirectional | Port D bit 2, bi-directional I/O with selectable pull-up; alternate function SEG20 (LCD front plane 20). |
| 28 | PD3 | bidirectional | Port D bit 3, bi-directional I/O with selectable pull-up; alternate function SEG19 (LCD front plane 19). |
| 29 | PD4 | bidirectional | Port D bit 4, bi-directional I/O with selectable pull-up; alternate function SEG18 (LCD front plane 18). |
| 30 | PD5 | bidirectional | Port D bit 5, bi-directional I/O with selectable pull-up; alternate function SEG17 (LCD front plane 17). |
| 31 | PD6 | bidirectional | Port D bit 6, bi-directional I/O with selectable pull-up; alternate function SEG16 (LCD front plane 16). |
| 32 | PD7 | bidirectional | Port D bit 7, bi-directional I/O with selectable pull-up; alternate function SEG15 (LCD front plane 15). |
| 33 | PG0 | bidirectional | Port G bit 0, bi-directional I/O with selectable pull-up; alternate function SEG14 (LCD front plane 14). |
| 34 | PG1 | bidirectional | Port G bit 1, bi-directional I/O with selectable pull-up; alternate function SEG13 (LCD segment driver 13). |
| 35 | PC0 | bidirectional | Port C bit 0, bi-directional I/O with selectable pull-up; alternate function SEG12 (LCD front plane 12). |
| 36 | PC1 | bidirectional | Port C bit 1, bi-directional I/O with selectable pull-up; alternate function SEG11 (LCD front plane 11). |
| 37 | PC2 | bidirectional | Port C bit 2, bi-directional I/O with selectable pull-up; alternate function SEG10 (LCD front plane 10). |
| 38 | PC3 | bidirectional | Port C bit 3, bi-directional I/O with selectable pull-up; alternate function SEG9 (LCD front plane 9). |
| 39 | PC4 | bidirectional | Port C bit 4, bi-directional I/O with selectable pull-up; alternate function SEG8 (LCD front plane 8). |
| 40 | PC5 | bidirectional | Port C bit 5, bi-directional I/O with selectable pull-up; alternate function SEG7 (LCD front plane 7). |
| 41 | PC6 | bidirectional | Port C bit 6, bi-directional I/O with selectable pull-up; alternate function SEG6 (LCD front plane 6). |
| 42 | PC7 | bidirectional | Port C bit 7, bi-directional I/O with selectable pull-up; alternate function SEG5 (LCD front plane 5). |
| 43 | PG2 | bidirectional | Port G bit 2, bi-directional I/O with selectable pull-up; alternate function SEG4 (LCD front plane 4). |
| 44 | PA7 | bidirectional | Port A bit 7, bi-directional I/O with selectable pull-up; alternate function SEG3 (LCD front plane 3). |
| 45 | PA6 | bidirectional | Port A bit 6, bi-directional I/O with selectable pull-up; alternate function SEG2 (LCD front plane 2). |
| 46 | PA5 | bidirectional | Port A bit 5, bi-directional I/O with selectable pull-up; alternate function SEG1 (LCD front plane 1). |
| 47 | PA4 | bidirectional | Port A bit 4, bi-directional I/O with selectable pull-up; alternate function SEG0 (LCD front plane 0). |
| 48 | PA3 | bidirectional | Port A bit 3, bi-directional I/O with selectable pull-up; alternate function COM3 (LCD back plane 3). |
| 49 | PA2 | bidirectional | Port A bit 2, bi-directional I/O with selectable pull-up; alternate function COM2 (LCD back plane 2). |
| 50 | PA1 | bidirectional | Port A bit 1, bi-directional I/O with selectable pull-up; alternate function COM1 (LCD back plane 1). |
| 51 | PA0 | bidirectional | Port A bit 0, bi-directional I/O with selectable pull-up; alternate function COM0 (LCD back plane 0). |
| 52 | VCC | power_in | Digital supply voltage. |
| 53 | GND | power_in | Ground. |
| 54 | PF7 | bidirectional | Port F bit 7, ADC7 analog input or I/O; JTAG TDI, with the pull-up active when JTAG is enabled even during reset. |
| 55 | PF6 | bidirectional | Port F bit 6, ADC6 analog input or I/O; JTAG TDO serial data output, unusable as I/O when JTAG is enabled. |
| 56 | PF5 | bidirectional | Port F bit 5, ADC5 analog input or I/O; JTAG TMS test mode select, with the pull-up active when JTAG is enabled even during reset. |
| 57 | PF4 | bidirectional | Port F bit 4, ADC4 analog input or I/O; JTAG TCK test clock, with the pull-up active when JTAG is enabled even during reset. |
| 58 | PF3 | bidirectional | Port F bit 3, ADC3 analog input to the A/D converter, or I/O when the ADC is not used. |
| 59 | PF2 | bidirectional | Port F bit 2, ADC2 analog input to the A/D converter, or I/O when the ADC is not used. |
| 60 | PF1 | bidirectional | Port F bit 1, ADC1 analog input to the A/D converter, or I/O when the ADC is not used. |
| 61 | PF0 | bidirectional | Port F bit 0, ADC0 analog input to the A/D converter, or I/O when the ADC is not used. |
| 62 | AREF | input | Analog reference pin of the A/D converter; the supplied text gives no further description. |
| 63 | GND | power_in | Ground. |
| 64 | AVCC | power_in | Supply voltage pin for Port F and the A/D converter; connect externally to VCC even if the ADC is unused, through a low-pass filter if the ADC is used. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | TQFP-64(14x14) |
| Category | Embedded Processors & Controllers |
| Pins | 64 |
CAD (KiCad official)
- Symbol:
ATMEGA169P-16AU - Footprint:
Package_QFP:TQFP-64_14x14mm_P0.8mm - 3D model: TQFP-64(14x14) (KiCad packages3D, STEP)
- 3D model files:
atmega169p-16au-etched.step/atmega169p-16au-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);atmega169p-16au.step/atmega169p-16au.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Microchip Tech datasheet (395 pp, sha256
7f2b18065af019bf, retrieved 2026-10-28, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).