component
ATMEGA168P-20MU
Public Made by Adomby adom
Microchip Tech Pre-ordered MCUs, VQFN-32(5x5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
ATMEGA168P-20MU
Microchip Tech · Pre-ordered MCUs · VQFN-32(5x5)
ATMEGA168P-20MU from Microchip Tech, in a VQFN-32(5x5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | PD3 | bidirectional | Port D bit 3 is a bi-directional I/O pin with internal pull-up; it serves as external interrupt INT1 and as OC2B Timer/Counter2 compare output, which requires DDD3 to be set as output. |
| 2 | PD4 | bidirectional | Port D bit 4 is a bi-directional I/O pin with internal pull-up; it can serve as USART external clock XCK, Timer/Counter0 external counter input T0, or pin change interrupt PCINT20. |
| 3 | GND | power_in | Ground. |
| 4 | VCC | power_in | Digital supply voltage; the ATmega168P operating voltage is 2.7 - 5.5 V. |
| 5 | GND | power_in | Ground. |
| 6 | VCC | power_in | Digital supply voltage; the ATmega168P operating voltage is 2.7 - 5.5 V. |
| 7 | PB6 | bidirectional | Port B bit 6 is a bi-directional I/O pin with internal pull-up; when a crystal or external clock is selected it is used as XTAL1 oscillator input, and then cannot be used as an I/O pin. |
| 8 | PB7 | bidirectional | Port B bit 7 is a bi-directional I/O pin with internal pull-up; when a crystal clock is selected it is used as XTAL2 oscillator output, and then cannot be used as an I/O pin. |
| 9 | PD5 | bidirectional | Port D bit 5 is a bi-directional I/O pin with internal pull-up; it can serve as Timer/Counter1 external counter input T1, Timer/Counter0 compare output OC0B, or pin change interrupt PCINT21. |
| 10 | PD6 | bidirectional | Port D bit 6 is a bi-directional I/O pin with internal pull-up; as AIN0 it is the analog comparator positive input and should be configured as input with pull-up off, and it can also serve as OC0A output or PCINT22. |
| 11 | PD7 | bidirectional | Port D bit 7 is a bi-directional I/O pin with internal pull-up; as AIN1 it is the analog comparator negative input and should be configured as input with pull-up off, and it can also serve as PCINT23. |
| 12 | PB0 | bidirectional | Port B bit 0 is a bi-directional I/O pin with internal pull-up; it can serve as Timer/Counter1 input capture ICP1, divided system clock output CLKO, or pin change interrupt PCINT0. |
| 13 | PB1 (OC1A/PCINT1) | bidirectional | Port B bit 1 is a bi-directional I/O pin with internal pull-up; it can serve as Timer/Counter1 compare match A output OC1A, which requires DDB1 set as output, or pin change interrupt PCINT1. |
| 14 | PB2 (SS/OC1B/PCINT2) | bidirectional | Port B bit 2 is a bi-directional I/O pin with internal pull-up; it serves as SPI slave select SS (input when SPI is slave), Timer/Counter1 compare output OC1B, or pin change interrupt PCINT2. |
| 15 | PB3 (MOSI/OC2A/PCINT3) | bidirectional | Port B bit 3 is a bi-directional I/O pin with internal pull-up; it serves as SPI MOSI data line, Timer/Counter2 compare output OC2A, or pin change interrupt PCINT3. |
| 16 | PB4 (MISO/PCINT4) | bidirectional | Port B bit 4 is a bi-directional I/O pin with internal pull-up; it serves as SPI MISO data line or pin change interrupt PCINT4. |
| 17 | PB5 (SCK/PCINT5) | bidirectional | Port B bit 5 is a bi-directional I/O pin with internal pull-up; it serves as SPI clock SCK or pin change interrupt PCINT5. |
| 18 | AVCC | power_in | Supply voltage pin for the A/D converter, PC3:0 and ADC7:6; it should be connected to VCC even if the ADC is not used, and through a low-pass filter if the ADC is used. |
| 19 | ADC6 | input | Analog input channel 6 of the 10-bit ADC, powered from the analog supply (available in TQFP and QFN/MLF packages only). |
| 20 | AREF | input | Analog reference pin for the A/D converter. |
| 21 | GND | power_in | Ground. |
| 22 | ADC7 | input | Analog input channel 7 of the 10-bit ADC, powered from the analog supply (available in TQFP and QFN/MLF packages only). |
| 23 | PC0 (ADC0/PCINT8) | bidirectional | Port C bit 0 is a bi-directional I/O pin with internal pull-up that can also be used as ADC input channel 0 on analog power, or as pin change interrupt PCINT8. |
| 24 | PC1 (ADC1/PCINT9) | bidirectional | Port C bit 1 is a bi-directional I/O pin with internal pull-up that can also be used as ADC input channel 1 on analog power, or as pin change interrupt PCINT9. |
| 25 | PC2 (ADC2/PCINT10) | bidirectional | Port C bit 2 is a bi-directional I/O pin with internal pull-up that can also be used as ADC input channel 2 on analog power, or as pin change interrupt PCINT10. |
| 26 | PC3 (ADC3/PCINT11) | bidirectional | Port C bit 3 is a bi-directional I/O pin with internal pull-up that can also be used as ADC input channel 3 on analog power, or as pin change interrupt PCINT11. |
| 27 | PC4 (ADC4/SDA/PCINT12) | bidirectional | Port C bit 4 is a bi-directional I/O pin with internal pull-up; when TWEN is set it is the 2-wire serial data line SDA, and it can also be ADC input channel 4 on digital power or PCINT12. |
| 28 | PC5 (ADC5/SCL/PCINT13) | bidirectional | Port C bit 5 is a bi-directional I/O pin with internal pull-up; when TWEN is set it is the 2-wire serial clock line SCL, and it can also be ADC input channel 5 on digital power or PCINT13. |
| 29 | PC6 (RESET/PCINT14) | bidirectional | With the RSTDISBL fuse unprogrammed, PC6 is the reset input and a low level longer than the minimum pulse length (Table 29-3) generates a reset, while with RSTDISBL programmed it is a normal I/O pin (or PCINT14). |
| 30 | PD0 (RXD/PCINT16) | bidirectional | Port D bit 0 is a bi-directional I/O pin with internal pull-up; when the USART receiver is enabled it is the receive data input RXD, or it can serve as PCINT16. |
| 31 | PD1 (TXD/PCINT17) | bidirectional | Port D bit 1 is a bi-directional I/O pin with internal pull-up; when the USART transmitter is enabled it is the transmit data output TXD regardless of DDD1, or it can serve as PCINT17. |
| 32 | PD2 (INT0/PCINT18) | bidirectional | Port D bit 2 is a bi-directional I/O pin with internal pull-up; it can serve as external interrupt source INT0 or pin change interrupt PCINT18. |
| 33 | GND | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | VQFN-32(5x5) |
| Category | Embedded Processors & Controllers |
| Pins | 33 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Operating Temperature | -55 | 125 | °C | 324 | |||
| Storage Temperature | -65 | 150 | °C | 324 | |||
| Voltage on any pin except RESET | -0.5 | V | with respect to Ground; max printed as VCC+0.5V | 324 | |||
| Voltage on RESET | -0.5 | 13 | V | with respect to Ground | 324 | ||
| Maximum Operating Voltage | 6 | V | 324 | ||||
| DC Current per I/O Pin | 40 | mA | 324 | ||||
| DC Current VCC and GND Pins | 200 | mA | 324 | ||||
| Input Low Voltage, except XTAL1 and RESET pin | VIL | -0.5 | V | VCC = 2.4V - 5.5V; max printed as 0.3VCC | 324 | ||
| Input Low Voltage, XTAL1 pin | VIL1 | -0.5 | V | VCC = 1.8V - 5.5V; max printed as 0.1VCC | 324 | ||
| Input Low Voltage, RESET pin | VIL2 | -0.5 | V | VCC = 1.8V - 5.5V; max printed as 0.1VCC | 324 | ||
| Input Low Voltage, RESET pin as I/O | VIL3 | -0.5 | V | VCC = 2.4V - 5.5V; max printed as 0.3VCC | 324 | ||
| Output Low Voltage (except RESET pin) | VOL | 0.9 | V | IOL = 20 mA, VCC = 5V | 324 | ||
| Output Low Voltage (except RESET pin) | VOL | 0.6 | V | IOL = 10 mA, VCC = 3V | 324 | ||
| Output High Voltage (except Reset pin) | VOH | 4.2 | V | IOH = -20 mA, VCC = 5V | 324 | ||
| Output High Voltage (except Reset pin) | VOH | 2.3 | V | IOH = -10 mA, VCC = 3V | 324 | ||
| Input Leakage Current I/O Pin, pin low | IIL | 1 | µA | VCC = 5.5V, pin low (absolute value) | 324 | ||
| Input Leakage Current I/O Pin, pin high | IIH | 1 | µA | VCC = 5.5V, pin high (absolute value) | 324 | ||
| Reset Pull-up Resistor | RRST | 30 | 60 | k | 325 | ||
| I/O Pin Pull-up Resistor | RPU | 20 | 50 | k | 325 | ||
| Analog Comparator Input Offset Voltage | VACIO | 40 | mV | VCC = 5V, Vin = VCC/2 | 325 | ||
| Analog Comparator Input Leakage Current | IACLK | -50 | 50 | nA | VCC = 5V, Vin = VCC/2 | 325 | |
| Analog Comparator Propagation Delay | tACID | 750 | ns | VCC = 2.7V | 325 | ||
| Analog Comparator Propagation Delay | tACID | 500 | ns | VCC = 4.0V | 325 | ||
| Power Supply Current, Active mode | ICC | 1.8 | 2.5 | mA | Active 4 MHz, VCC = 3V | 327 | |
| Power Supply Current, Active mode | ICC | 6.7 | 9 | mA | Active 8 MHz, VCC = 5V | 327 | |
| Power Supply Current, Idle mode | ICC | 0.4 | 0.7 | mA | Idle 4 MHz, VCC = 3V | 327 | |
| Power Supply Current, Idle mode | ICC | 1.7 | 2.7 | mA | Idle 8 MHz, VCC = 5V | 327 | |
| Power Supply Current, Power-save mode | ICC | 0.9 | 2.6 | µA | 32 kHz TOSC enabled, VCC = 3V | 327 | |
| Power Supply Current, Power-down mode | ICC | 4.6 | 8 | µA | WDT enabled, VCC = 3V | 327 | |
| Power Supply Current, Power-down mode | ICC | 0.1 | 2 | µA | WDT disabled, VCC = 3V | 327 | |
| External Clock Oscillator Frequency | 1/tCLCL | 0 | 10 | MHz | VCC = 2.7-5.5V | 329 | |
| External Clock Period | tCLCL | 100 | ns | VCC = 2.7-5.5V | 329 | ||
| External Clock High Time | tCHCX | 40 | ns | VCC = 2.7-5.5V | 329 | ||
| External Clock Low Time | tCLCX | 40 | ns | VCC = 2.7-5.5V | 329 | ||
| External Clock Rise Time | tCLCH | 1.6 | µs | VCC = 2.7-5.5V | 329 | ||
| External Clock Fall Time | tCHCL | 1.6 | µs | VCC = 2.7-5.5V | 329 | ||
| Change in period from one clock cycle to the next | tCLCL | 2 | % | VCC = 2.7-5.5V | 329 | ||
| Calibrated Internal RC Oscillator accuracy, factory calibration | -10 | 10 | % | 8.0 MHz, VCC = 3V, 25C | 329 | ||
| Calibrated Internal RC Oscillator accuracy, user calibration | -1 | 1 | % | VCC = 2.7-5.5V, -40C to 85C | 329 | ||
| Power-on Reset Threshold Voltage (rising) | VPOT | 1.1 | 1.4 | 1.6 | V | 330 | |
| Power-on Reset Threshold Voltage (falling) | VPOT | 0.6 | 1.3 | 1.6 | V | 330 | |
| Power-on Slope Rate | SRON | 0.01 | 10 | V/ms | 330 | ||
| Minimum pulse width on RESET Pin | tRST | 2.5 | µs | 330 | |||
| Brown-out Detection threshold VBOT, BODLEVEL 110 | VBOT | 1.7 | 1.8 | 2 | V | BODLEVEL = 110 | 330 |
| Brown-out Detection threshold VBOT, BODLEVEL 101 | VBOT | 2.5 | 2.7 | 2.9 | V | BODLEVEL = 101 | 330 |
| Brown-out Detection threshold VBOT, BODLEVEL 100 | VBOT | 4.1 | 4.3 | 4.5 | V | BODLEVEL = 100 | 330 |
| Min Pulse Width on Brown-out Reset | tBOD | 2 | µs | 330 | |||
| Bandgap reference voltage | VBG | 1 | 1.1 | 1.2 | V | VCC = 2.7, TA = 25°C | 330 |
| Bandgap reference start-up time | tBG | 40 | 70 | µs | VCC = 2.7, TA = 25°C | 330 | |
| ADC clock frequency | 50 | 1000 | kHz | 335 | |||
| ADC conversion time | 13 | 260 | µs | Free Running Conversion | 335 | ||
| Internal Voltage Reference | VINT | 1 | 1.1 | 1.2 | V | 335 | |
| ADC absolute accuracy | 2 | LSB | VREF = 4V, VCC = 4V, ADC clock = 200 kHz | 335 | |||
| ADC absolute accuracy | 4.5 | LSB | VREF = 4V, VCC = 4V, ADC clock = 1 MHz | 335 | |||
| Brown-out Detector Hysteresis | VHYST | 50 | mV | 330 | |||
| Bandgap reference current consumption | IBG | 10 | µA | VCC = 2.7, TA = 25°C | 330 |
CAD (KiCad official)
- Symbol:
ATMEGA168P-20MU - Footprint:
Package_DFN_QFN:QFN-32-1EP_5x5mm_P0.5mm_EP3.3x3.3mm - 3D model: VQFN-32(5x5) (KiCad packages3D, STEP)
- 3D model files:
atmega168p-20mu-etched.step/atmega168p-20mu-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);atmega168p-20mu.step/atmega168p-20mu.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Microchip Tech datasheet (436 pp, sha256
aab081a362918ab9, retrieved 2026-10-30, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# ATMEGA168P-20MU
**Microchip Tech** · Pre-ordered MCUs · VQFN-32(5x5)
ATMEGA168P-20MU from Microchip Tech, in a VQFN-32(5x5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | PD3 | bidirectional | Port D bit 3 is a bi-directional I/O pin with internal pull-up; it serves as external interrupt INT1 and as OC2B Timer/Counter2 compare output, which requires DDD3 to be set as output. |
| 2 | PD4 | bidirectional | Port D bit 4 is a bi-directional I/O pin with internal pull-up; it can serve as USART external clock XCK, Timer/Counter0 external counter input T0, or pin change interrupt PCINT20. |
| 3 | GND | power_in | Ground. |
| 4 | VCC | power_in | Digital supply voltage; the ATmega168P operating voltage is 2.7 - 5.5 V. |
| 5 | GND | power_in | Ground. |
| 6 | VCC | power_in | Digital supply voltage; the ATmega168P operating voltage is 2.7 - 5.5 V. |
| 7 | PB6 | bidirectional | Port B bit 6 is a bi-directional I/O pin with internal pull-up; when a crystal or external clock is selected it is used as XTAL1 oscillator input, and then cannot be used as an I/O pin. |
| 8 | PB7 | bidirectional | Port B bit 7 is a bi-directional I/O pin with internal pull-up; when a crystal clock is selected it is used as XTAL2 oscillator output, and then cannot be used as an I/O pin. |
| 9 | PD5 | bidirectional | Port D bit 5 is a bi-directional I/O pin with internal pull-up; it can serve as Timer/Counter1 external counter input T1, Timer/Counter0 compare output OC0B, or pin change interrupt PCINT21. |
| 10 | PD6 | bidirectional | Port D bit 6 is a bi-directional I/O pin with internal pull-up; as AIN0 it is the analog comparator positive input and should be configured as input with pull-up off, and it can also serve as OC0A output or PCINT22. |
| 11 | PD7 | bidirectional | Port D bit 7 is a bi-directional I/O pin with internal pull-up; as AIN1 it is the analog comparator negative input and should be configured as input with pull-up off, and it can also serve as PCINT23. |
| 12 | PB0 | bidirectional | Port B bit 0 is a bi-directional I/O pin with internal pull-up; it can serve as Timer/Counter1 input capture ICP1, divided system clock output CLKO, or pin change interrupt PCINT0. |
| 13 | PB1 (OC1A/PCINT1) | bidirectional | Port B bit 1 is a bi-directional I/O pin with internal pull-up; it can serve as Timer/Counter1 compare match A output OC1A, which requires DDB1 set as output, or pin change interrupt PCINT1. |
| 14 | PB2 (SS/OC1B/PCINT2) | bidirectional | Port B bit 2 is a bi-directional I/O pin with internal pull-up; it serves as SPI slave select SS (input when SPI is slave), Timer/Counter1 compare output OC1B, or pin change interrupt PCINT2. |
| 15 | PB3 (MOSI/OC2A/PCINT3) | bidirectional | Port B bit 3 is a bi-directional I/O pin with internal pull-up; it serves as SPI MOSI data line, Timer/Counter2 compare output OC2A, or pin change interrupt PCINT3. |
| 16 | PB4 (MISO/PCINT4) | bidirectional | Port B bit 4 is a bi-directional I/O pin with internal pull-up; it serves as SPI MISO data line or pin change interrupt PCINT4. |
| 17 | PB5 (SCK/PCINT5) | bidirectional | Port B bit 5 is a bi-directional I/O pin with internal pull-up; it serves as SPI clock SCK or pin change interrupt PCINT5. |
| 18 | AVCC | power_in | Supply voltage pin for the A/D converter, PC3:0 and ADC7:6; it should be connected to VCC even if the ADC is not used, and through a low-pass filter if the ADC is used. |
| 19 | ADC6 | input | Analog input channel 6 of the 10-bit ADC, powered from the analog supply (available in TQFP and QFN/MLF packages only). |
| 20 | AREF | input | Analog reference pin for the A/D converter. |
| 21 | GND | power_in | Ground. |
| 22 | ADC7 | input | Analog input channel 7 of the 10-bit ADC, powered from the analog supply (available in TQFP and QFN/MLF packages only). |
| 23 | PC0 (ADC0/PCINT8) | bidirectional | Port C bit 0 is a bi-directional I/O pin with internal pull-up that can also be used as ADC input channel 0 on analog power, or as pin change interrupt PCINT8. |
| 24 | PC1 (ADC1/PCINT9) | bidirectional | Port C bit 1 is a bi-directional I/O pin with internal pull-up that can also be used as ADC input channel 1 on analog power, or as pin change interrupt PCINT9. |
| 25 | PC2 (ADC2/PCINT10) | bidirectional | Port C bit 2 is a bi-directional I/O pin with internal pull-up that can also be used as ADC input channel 2 on analog power, or as pin change interrupt PCINT10. |
| 26 | PC3 (ADC3/PCINT11) | bidirectional | Port C bit 3 is a bi-directional I/O pin with internal pull-up that can also be used as ADC input channel 3 on analog power, or as pin change interrupt PCINT11. |
| 27 | PC4 (ADC4/SDA/PCINT12) | bidirectional | Port C bit 4 is a bi-directional I/O pin with internal pull-up; when TWEN is set it is the 2-wire serial data line SDA, and it can also be ADC input channel 4 on digital power or PCINT12. |
| 28 | PC5 (ADC5/SCL/PCINT13) | bidirectional | Port C bit 5 is a bi-directional I/O pin with internal pull-up; when TWEN is set it is the 2-wire serial clock line SCL, and it can also be ADC input channel 5 on digital power or PCINT13. |
| 29 | PC6 (RESET/PCINT14) | bidirectional | With the RSTDISBL fuse unprogrammed, PC6 is the reset input and a low level longer than the minimum pulse length (Table 29-3) generates a reset, while with RSTDISBL programmed it is a normal I/O pin (or PCINT14). |
| 30 | PD0 (RXD/PCINT16) | bidirectional | Port D bit 0 is a bi-directional I/O pin with internal pull-up; when the USART receiver is enabled it is the receive data input RXD, or it can serve as PCINT16. |
| 31 | PD1 (TXD/PCINT17) | bidirectional | Port D bit 1 is a bi-directional I/O pin with internal pull-up; when the USART transmitter is enabled it is the transmit data output TXD regardless of DDD1, or it can serve as PCINT17. |
| 32 | PD2 (INT0/PCINT18) | bidirectional | Port D bit 2 is a bi-directional I/O pin with internal pull-up; it can serve as external interrupt source INT0 or pin change interrupt PCINT18. |
| 33 | GND | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | VQFN-32(5x5) |
| Category | Embedded Processors & Controllers |
| Pins | 33 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Operating Temperature | | -55 | | 125 | °C | | 324 |
| Storage Temperature | | -65 | | 150 | °C | | 324 |
| Voltage on any pin except RESET | | -0.5 | | | V | with respect to Ground; max printed as VCC+0.5V | 324 |
| Voltage on RESET | | -0.5 | | 13 | V | with respect to Ground | 324 |
| Maximum Operating Voltage | | | | 6 | V | | 324 |
| DC Current per I/O Pin | | | | 40 | mA | | 324 |
| DC Current VCC and GND Pins | | | | 200 | mA | | 324 |
| Input Low Voltage, except XTAL1 and RESET pin | VIL | -0.5 | | | V | VCC = 2.4V - 5.5V; max printed as 0.3VCC | 324 |
| Input Low Voltage, XTAL1 pin | VIL1 | -0.5 | | | V | VCC = 1.8V - 5.5V; max printed as 0.1VCC | 324 |
| Input Low Voltage, RESET pin | VIL2 | -0.5 | | | V | VCC = 1.8V - 5.5V; max printed as 0.1VCC | 324 |
| Input Low Voltage, RESET pin as I/O | VIL3 | -0.5 | | | V | VCC = 2.4V - 5.5V; max printed as 0.3VCC | 324 |
| Output Low Voltage (except RESET pin) | VOL | | | 0.9 | V | IOL = 20 mA, VCC = 5V | 324 |
| Output Low Voltage (except RESET pin) | VOL | | | 0.6 | V | IOL = 10 mA, VCC = 3V | 324 |
| Output High Voltage (except Reset pin) | VOH | 4.2 | | | V | IOH = -20 mA, VCC = 5V | 324 |
| Output High Voltage (except Reset pin) | VOH | 2.3 | | | V | IOH = -10 mA, VCC = 3V | 324 |
| Input Leakage Current I/O Pin, pin low | IIL | | | 1 | µA | VCC = 5.5V, pin low (absolute value) | 324 |
| Input Leakage Current I/O Pin, pin high | IIH | | | 1 | µA | VCC = 5.5V, pin high (absolute value) | 324 |
| Reset Pull-up Resistor | RRST | 30 | | 60 | k | | 325 |
| I/O Pin Pull-up Resistor | RPU | 20 | | 50 | k | | 325 |
| Analog Comparator Input Offset Voltage | VACIO | | | 40 | mV | VCC = 5V, Vin = VCC/2 | 325 |
| Analog Comparator Input Leakage Current | IACLK | -50 | | 50 | nA | VCC = 5V, Vin = VCC/2 | 325 |
| Analog Comparator Propagation Delay | tACID | | | 750 | ns | VCC = 2.7V | 325 |
| Analog Comparator Propagation Delay | tACID | | | 500 | ns | VCC = 4.0V | 325 |
| Power Supply Current, Active mode | ICC | | 1.8 | 2.5 | mA | Active 4 MHz, VCC = 3V | 327 |
| Power Supply Current, Active mode | ICC | | 6.7 | 9 | mA | Active 8 MHz, VCC = 5V | 327 |
| Power Supply Current, Idle mode | ICC | | 0.4 | 0.7 | mA | Idle 4 MHz, VCC = 3V | 327 |
| Power Supply Current, Idle mode | ICC | | 1.7 | 2.7 | mA | Idle 8 MHz, VCC = 5V | 327 |
| Power Supply Current, Power-save mode | ICC | | 0.9 | 2.6 | µA | 32 kHz TOSC enabled, VCC = 3V | 327 |
| Power Supply Current, Power-down mode | ICC | | 4.6 | 8 | µA | WDT enabled, VCC = 3V | 327 |
| Power Supply Current, Power-down mode | ICC | | 0.1 | 2 | µA | WDT disabled, VCC = 3V | 327 |
| External Clock Oscillator Frequency | 1/tCLCL | 0 | | 10 | MHz | VCC = 2.7-5.5V | 329 |
| External Clock Period | tCLCL | 100 | | | ns | VCC = 2.7-5.5V | 329 |
| External Clock High Time | tCHCX | 40 | | | ns | VCC = 2.7-5.5V | 329 |
| External Clock Low Time | tCLCX | 40 | | | ns | VCC = 2.7-5.5V | 329 |
| External Clock Rise Time | tCLCH | | | 1.6 | µs | VCC = 2.7-5.5V | 329 |
| External Clock Fall Time | tCHCL | | | 1.6 | µs | VCC = 2.7-5.5V | 329 |
| Change in period from one clock cycle to the next | tCLCL | | | 2 | % | VCC = 2.7-5.5V | 329 |
| Calibrated Internal RC Oscillator accuracy, factory calibration | | -10 | | 10 | % | 8.0 MHz, VCC = 3V, 25C | 329 |
| Calibrated Internal RC Oscillator accuracy, user calibration | | -1 | | 1 | % | VCC = 2.7-5.5V, -40C to 85C | 329 |
| Power-on Reset Threshold Voltage (rising) | VPOT | 1.1 | 1.4 | 1.6 | V | | 330 |
| Power-on Reset Threshold Voltage (falling) | VPOT | 0.6 | 1.3 | 1.6 | V | | 330 |
| Power-on Slope Rate | SRON | 0.01 | | 10 | V/ms | | 330 |
| Minimum pulse width on RESET Pin | tRST | 2.5 | | | µs | | 330 |
| Brown-out Detection threshold VBOT, BODLEVEL 110 | VBOT | 1.7 | 1.8 | 2 | V | BODLEVEL = 110 | 330 |
| Brown-out Detection threshold VBOT, BODLEVEL 101 | VBOT | 2.5 | 2.7 | 2.9 | V | BODLEVEL = 101 | 330 |
| Brown-out Detection threshold VBOT, BODLEVEL 100 | VBOT | 4.1 | 4.3 | 4.5 | V | BODLEVEL = 100 | 330 |
| Min Pulse Width on Brown-out Reset | tBOD | 2 | | | µs | | 330 |
| Bandgap reference voltage | VBG | 1 | 1.1 | 1.2 | V | VCC = 2.7, TA = 25°C | 330 |
| Bandgap reference start-up time | tBG | | 40 | 70 | µs | VCC = 2.7, TA = 25°C | 330 |
| ADC clock frequency | | 50 | | 1000 | kHz | | 335 |
| ADC conversion time | | | 13 | 260 | µs | Free Running Conversion | 335 |
| Internal Voltage Reference | VINT | 1 | 1.1 | 1.2 | V | | 335 |
| ADC absolute accuracy | | | | 2 | LSB | VREF = 4V, VCC = 4V, ADC clock = 200 kHz | 335 |
| ADC absolute accuracy | | | | 4.5 | LSB | VREF = 4V, VCC = 4V, ADC clock = 1 MHz | 335 |
| Brown-out Detector Hysteresis | VHYST | | 50 | | mV | | 330 |
| Bandgap reference current consumption | IBG | | 10 | | µA | VCC = 2.7, TA = 25°C | 330 |
## CAD (KiCad official)
- Symbol: `ATMEGA168P-20MU`
- Footprint: `Package_DFN_QFN:QFN-32-1EP_5x5mm_P0.5mm_EP3.3x3.3mm`
- 3D model: VQFN-32(5x5) (KiCad packages3D, STEP)
- 3D model files: `atmega168p-20mu-etched.step` / `atmega168p-20mu-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `atmega168p-20mu.step` / `atmega168p-20mu.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Microchip Tech datasheet](https://ww1.microchip.com/downloads/en/DeviceDoc/ATmega48P_88P_168P-DS40002065A.pdf) (436 pp, sha256 `aab081a362918ab9`, retrieved 2026-10-30, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/atmega168p-20mu-datasheet.pdf)