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ATMEGA1609-AUR

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Microchip Tech Microcontroller Units (MCUs/MPUs/SOCs), TQFP-48(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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ATMEGA1609-AUR

Microchip Tech · Microcontroller Units (MCUs/MPUs/SOCs) · TQFP-48(7x7)

ATMEGA1609-AUR from Microchip Tech, in a TQFP-48(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 PA5 bidirectional I/O pin PA5 with alternates USART0 RxD (alternate position), SPI0 MISO and TCA0 WO5.
2 PA6 bidirectional I/O pin PA6 with alternates USART0 XCK (alternate position) and SPI0 SCK.
3 PA7 bidirectional I/O pin PA7 with alternates CLKOUT, AC0 OUT, USART0 XDIR (alternate position), SPI0 SS and EVSYS EVOUTA (alternate position).
4 PB0 bidirectional I/O pin PB0 with alternates USART3 TxD and TCA0 WO0 (alternate position).
5 PB1 bidirectional I/O pin PB1 with alternates USART3 RxD and TCA0 WO1 (alternate position).
6 PB2 bidirectional I/O pin PB2 with alternates USART3 XCK, TCA0 WO2 (alternate position) and EVSYS EVOUTB.
7 PB3 bidirectional I/O pin PB3 with alternates USART3 XDIR and TCA0 WO3 (alternate position).
8 PB4 bidirectional I/O pin PB4 with alternates USART3 TxD (alternate position), TCA0 WO4 (alternate position) and TCB2 WO (alternate position).
9 PB5 bidirectional I/O pin PB5 with alternates USART3 RxD (alternate position), TCA0 WO5 (alternate position) and TCB3 WO.
10 PC0 bidirectional I/O pin PC0 with alternates USART1 TxD, SPI0 MOSI (alternate position), TCA0 WO0 (alternate position), TCB2 WO and CCL IN0.
11 PC1 bidirectional I/O pin PC1 with alternates USART1 RxD, SPI0 MISO (alternate position), TCA0 WO1 (alternate position), TCB3 WO (alternate position) and CCL IN1.
12 PC2 bidirectional I/O pin PC2 with alternates TWI SDA (master, alternate position), USART1 XCK, SPI0 SCK (alternate position), TCA0 WO2 (alternate position), EVSYS EVOUTC and CCL IN2.
13 PC3 bidirectional I/O pin PC3 with alternates TWI SCL (master, alternate position), USART1 XDIR, SPI0 SS (alternate position), TCA0 WO3 (alternate position) and CCL OUT1.
14 VDD power_in Supply voltage for the digital I/O and core; operating range 1.8V to 5.5V per the ordering table.
15 GND power_in Ground reference for the device.
16 PC4 bidirectional I/O pin PC4 with alternates USART1 TxD (alternate position) and TCA0 WO4 (alternate position).
17 PC5 bidirectional I/O pin PC5 with alternates USART1 RxD (alternate position) and TCA0 WO5 (alternate position).
18 PC6 bidirectional I/O pin PC6 with alternates USART1 XCK (alternate position) and CCL OUT (alternate position).
19 PC7 bidirectional I/O pin PC7 with alternates USART1 XDIR (alternate position) and EVSYS EVOUTC (alternate position).
20 PD0 bidirectional I/O pin PD0 with alternates AIN0 (ADC0 analog input), TCA0 WO0 (alternate position) and CCL IN0.
21 PD1 bidirectional I/O pin PD1 with alternates AIN1 (ADC0 analog input), AC0 positive input P3, TCA0 WO1 (alternate position) and CCL IN1.
22 PD2 bidirectional I/O pin PD2 with alternates AIN2 (ADC0 analog input), AC0 positive input P0, TCA0 WO2 (alternate position), EVSYS EVOUTD and CCL IN2.
23 PD3 bidirectional I/O pin PD3 with alternates AIN3 (ADC0 analog input), AC0 negative input N0, TCA0 WO3 (alternate position) and CCL OUT.
24 PD4 bidirectional I/O pin PD4 with alternates AIN4 (ADC0 analog input), AC0 positive input P1 and TCA0 WO4 (alternate position).
25 PD5 bidirectional I/O pin PD5 with alternates AIN5 (ADC0 analog input), AC0 negative input N1 and TCA0 WO5 (alternate position).
26 PD6 bidirectional I/O pin PD6 with alternates AIN6 (ADC0 analog input), AC0 positive input P2 and CCL OUT (alternate position).
27 PD7 bidirectional I/O pin PD7 with alternates VREFA, AIN7 (ADC0 analog input), AC0 negative input N2 and EVSYS EVOUTD (alternate position).
28 AVDD power_in Analog supply voltage for the ADC, analog comparator and related analog circuitry.
29 GND power_in Ground reference for the device.
30 PE0 bidirectional I/O pin PE0 with alternates AIN8 (ADC0 analog input), SPI0 MOSI (alternate position) and TCA0 WO0 (alternate position).
31 PE1 bidirectional I/O pin PE1 with alternates AIN9 (ADC0 analog input), SPI0 MISO (alternate position) and TCA0 WO1 (alternate position).
32 PE2 bidirectional I/O pin PE2 with alternates AIN10 (ADC0 analog input), SPI0 SCK (alternate position), TCA0 WO2 (alternate position) and EVSYS EVOUTE.
33 PE3 bidirectional I/O pin PE3 with alternates AIN11 (ADC0 analog input), SPI0 SS (alternate position) and TCA0 WO3 (alternate position).
34 PF0 bidirectional I/O pin PF0 with alternate function TOSC1 (32.768 kHz crystal input), USART2 TxD, TCA0 WO0 (alternate position) and CCL IN0.
35 PF1 bidirectional I/O pin PF1 with alternate function TOSC2 (32.768 kHz crystal output), USART2 RxD, TCA0 WO1 (alternate position) and CCL IN1.
36 PF2 bidirectional I/O pin PF2 with alternates TWI SDA (slave, alternate position), AIN12 (ADC0 analog input), USART2 XCK, TCA0 WO2 (alternate position), EVSYS EVOUTF and CCL IN2.
37 PF3 bidirectional I/O pin PF3 with alternates TWI SCL (slave, alternate position), AIN13 (ADC0 analog input), USART2 XDIR, TCA0 WO3 (alternate position) and CCL OUT.
38 PF4 bidirectional I/O pin PF4 with alternates AIN14 (ADC0 analog input), USART2 TxD (alternate position) and TCA0 WO4 (alternate position).
39 PF5 bidirectional I/O pin PF5 with alternates AIN15 (ADC0 analog input), USART2 RxD (alternate position) and TCA0 WO5 (alternate position).
40 PF6 input I/O pin PF6 that is configured as the RESET pin (RSTPINCFG fuse), with alternates USART2 XCK (alternate position) and CCL OUT (alternate position).
41 UPDI bidirectional Unified Program and Debug Interface pin used for programming and debugging the device.
42 VDD power_in Supply voltage for the digital I/O and core; operating range 1.8V to 5.5V per the ordering table.
43 GND power_in Ground reference for the device.
44 PA0 bidirectional I/O pin PA0 with alternates EXTCLK external clock input, USART0 TxD, TCA0 WO0 and CCL IN0.
45 PA1 bidirectional I/O pin PA1 with alternates USART0 RxD, TCA0 WO1 and CCL IN1.
46 PA2 bidirectional I/O pin PA2 with alternates TWI SDA (master), USART0 XCK, TCA0 WO2, TCB0 WO (alternate position), EVSYS EVOUTA and CCL IN2.
47 PA3 bidirectional I/O pin PA3 with alternates TWI SCL (master), USART0 XDIR, TCA0 WO3, TCB1 WO and CCL OUT.
48 PA4 bidirectional I/O pin PA4 with alternates USART0 TxD (alternate position), SPI0 MOSI and TCA0 WO4.

Key specifications

Parameter Value
Manufacturer Microchip Tech
Package TQFP-48(7x7)
Category Single Chip Microcomputer/Microcontroller
Pins 48

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage 1.8 5.5 V 521
Operating temperature range -40 85 °C 521

CAD (KiCad official)

  • Symbol: ATMEGA1609-AUR
  • Footprint: Package_QFP:TQFP-48_7x7mm_P0.5mm
  • 3D model: TQFP-48(7x7) (KiCad packages3D, STEP)
  • 3D model files: atmega1609-aur-etched.step / atmega1609-aur-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); atmega1609-aur.step / atmega1609-aur.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Microchip Tech datasheet (552 pp, sha256 e4bbeee766cda6b4, retrieved 2026-10-27, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF