component
ATMEGA1608-MU
Public Made by Adomby adom
Microchip Tech Microcontrollers (MCU/MPU/SOC), VQFN-32-EP(5x5). Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
main
Ray
atmega1608-mu: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding)
d078b37
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{
"schema_version": 1,
"type": "component",
"slug": "atmega1608-mu",
"title": "ATMEGA1608-MU",
"brief": "Microchip Tech Microcontrollers (MCU/MPU/SOC), VQFN-32-EP(5x5). Pinout extracted from the datasheet, KiCad symbol/footprint/3D.",
"version": "0.1.0",
"license": "CC-BY-SA-4.0",
"tags": [
"component",
"embedded processors & controllers",
"atmega1608-mu"
],
"component": {
"mpn": "ATMEGA1608-MU",
"manufacturer": "Microchip Tech",
"package": "VQFN-32-EP(5x5)",
"pin_count": 33,
"category": "Embedded Processors & Controllers",
"subcategory": "Microcontrollers (MCU/MPU/SOC)",
"datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588943153210933248",
"parts": {
"symbol": "atmega1608-mu.kicad_sym",
"footprint": "atmega1608-mu.kicad_mod",
"model_3d": "atmega1608-mu-etched.glb",
"model_3d_plain": "atmega1608-mu.glb",
"model_3d_step": "atmega1608-mu-etched.step",
"model_3d_step_plain": "atmega1608-mu.step",
"lbr": "atmega1608-mu.lbr"
},
"distributor_links": {},
"pins": [
{
"number": "1",
"name": "PA3",
"type": "bidirectional",
"description": "PORT A bit 3. GPIO on VDD domain. Alt functions: TWI0 (SCL master-slave alt), USART0 XDIR, TCA0 WO3, TCB1 WO, CCL LUT0-OUT."
},
{
"number": "2",
"name": "PA4",
"type": "bidirectional",
"description": "PORT A bit 4. GPIO on VDD domain. Alt functions: USART0 TxD (alt), SPI0 MOSI, TCA0 WO4."
},
{
"number": "3",
"name": "PA5",
"type": "bidirectional",
"description": "PORT A bit 5. GPIO on VDD domain. Alt functions: USART0 RxD (alt), SPI0 MISO, TCA0 WO5."
},
{
"number": "4",
"name": "PA6",
"type": "bidirectional",
"description": "PORT A bit 6. GPIO on VDD domain. Alt functions: USART0 XCK (alt), SPI0 SCK, AC0 OUT (alt)."
},
{
"number": "5",
"name": "PA7",
"type": "bidirectional",
"description": "PORT A bit 7. GPIO on VDD domain. Alt functions: CLKOUT, AC0 OUT, USART0 XDIR (alt), SPI0 SS, EVOUTA (alt)."
},
{
"number": "6",
"name": "PC0",
"type": "bidirectional",
"description": "PORT C bit 0. GPIO on VDD domain. Alt functions: USART1 TxD, SPI0 MOSI (alt), TCA0 WO0 (alt), TCB2 WO, CCL LUT1-IN0."
},
{
"number": "7",
"name": "PC1",
"type": "bidirectional",
"description": "PORT C bit 1. GPIO on VDD domain. Alt functions: USART1 RxD, SPI0 MISO (alt), TCA0 WO1 (alt), CCL LUT1-IN1."
},
{
"number": "8",
"name": "PC2",
"type": "bidirectional",
"description": "PORT C bit 2. GPIO on VDD domain. Alt functions: TWI0 (SCK/SDA master-slave alt), USART1 XCK, SPI0 SCK (alt), TCA0 WO2 (alt), EVOUTC, CCL LUT1-IN2."
},
{
"number": "9",
"name": "PC3",
"type": "bidirectional",
"description": "PORT C bit 3. GPIO on VDD domain. Alt functions: TWI0 (SCL master-slave alt), USART1 XDIR, SPI0 SS (alt), TCA0 WO3 (alt), CCL LUT1-OUT."
},
{
"number": "10",
"name": "PD0",
"type": "bidirectional",
"description": "PORT D bit 0. GPIO on AVDD (analog) domain. Alt functions: ADC0 AIN0, TCA0 WO0 (alt), CCL LUT2-IN0."
},
{
"number": "11",
"name": "PD1",
"type": "bidirectional",
"description": "PORT D bit 1. GPIO on AVDD (analog) domain. Alt functions: ADC0 AIN1, AC0 P3, TCA0 WO1 (alt), CCL LUT2-IN1."
},
{
"number": "12",
"name": "PD2",
"type": "bidirectional",
"description": "PORT D bit 2. GPIO on AVDD (analog) domain. Alt functions: ADC0 AIN2, AC0 P0, TCA0 WO2 (alt), EVOUTD, CCL LUT2-IN2."
},
{
"number": "13",
"name": "PD3",
"type": "bidirectional",
"description": "PORT D bit 3. GPIO on AVDD (analog) domain. Alt functions: ADC0 AIN3, AC0 N0, TCA0 WO3 (alt), CCL LUT2-OUT."
},
{
"number": "14",
"name": "PD4",
"type": "bidirectional",
"description": "PORT D bit 4. GPIO on AVDD (analog) domain. Alt functions: ADC0 AIN4, AC0 P1, TCA0 WO4 (alt)."
},
{
"number": "15",
"name": "PD5",
"type": "bidirectional",
"description": "PORT D bit 5. GPIO on AVDD (analog) domain. Alt functions: ADC0 AIN5, AC0 N1, TCA0 WO5 (alt)."
},
{
"number": "16",
"name": "PD6",
"type": "bidirectional",
"description": "PORT D bit 6. GPIO on AVDD (analog) domain. Alt functions: ADC0 AIN6, TCB2 WO (alt)."
},
{
"number": "17",
"name": "PD7",
"type": "bidirectional",
"description": "PORT D bit 7. GPIO on AVDD (analog) domain. Alt functions: VREFA external voltage reference input, ADC0 AIN7, AC0 N2, EVOUTD (alt)."
},
{
"number": "18",
"name": "AVDD",
"type": "power_in",
"description": "Analog supply voltage (1.8-5.5 V). Must be tied to the same rail as VDD; supplies the ADC, AC and PORT-D/F analog domain. Decouple with a 100 nF ceramic close to the pin."
},
{
"number": "19",
"name": "GND",
"type": "power_in",
"description": "Ground reference for the analog and digital supply. All GND pins must be connected to the board's ground plane."
},
{
"number": "20",
"name": "PF0/TOSC1",
"type": "bidirectional",
"description": "PORT F bit 0 / TOSC1 32.768 kHz crystal input for the RTC. Alt functions: USART2 TxD, TCA0 WO0 (alt), CCL LUT3-IN0."
},
{
"number": "21",
"name": "PF1/TOSC2",
"type": "bidirectional",
"description": "PORT F bit 1 / TOSC2 32.768 kHz crystal output for the RTC. Alt functions: USART2 RxD, TCA0 WO1 (alt), CCL LUT3-IN1."
},
{
"number": "22",
"name": "PF2",
"type": "bidirectional",
"description": "PORT F bit 2. Alt functions: TWI0 SDA (slave alt), ADC0 AIN12, USART2 XCK, TCA0 WO2 (alt), EVOUTF, CCL LUT3-IN2."
},
{
"number": "23",
"name": "PF3",
"type": "bidirectional",
"description": "PORT F bit 3. Alt functions: TWI0 SCL (slave alt), ADC0 AIN13, USART2 XDIR, TCA0 WO3 (alt), CCL LUT3-OUT."
},
{
"number": "24",
"name": "PF4",
"type": "bidirectional",
"description": "PORT F bit 4. Alt functions: ADC0 AIN14, USART2 TxD (alt), TCA0 WO4 (alt), TCB0 WO (alt)."
},
{
"number": "25",
"name": "PF5",
"type": "bidirectional",
"description": "PORT F bit 5. Alt functions: ADC0 AIN15, USART2 RxD (alt), TCA0 WO5 (alt), TCB1 WO (alt)."
},
{
"number": "26",
"name": "PF6/RESET",
"type": "bidirectional",
"description": "PORT F bit 6 / external RESET input (active-low). Function selected by the RSTPINCFG fuse: default is GPIO input; when configured as RESET, drive low to reset the device (internal pull-up present). Alt functions: USART2 XCK (alt), CCL LUT3-OUT (alt)."
},
{
"number": "27",
"name": "UPDI",
"type": "bidirectional",
"description": "Unified Program and Debug Interface. Single-wire bidirectional pin used by the UPDI programmer/debugger; keep accessible on a programming header (e.g. 4.7 kΩ series to protect against contention)."
},
{
"number": "28",
"name": "VDD",
"type": "power_in",
"description": "Digital supply voltage (1.8-5.5 V). Decouple with a 100 nF ceramic close to the pin; supplies the CPU core, PORT A/C/F digital domain and peripherals."
},
{
"number": "29",
"name": "GND",
"type": "power_in",
"description": "Ground reference for the digital supply. Tie to the board's ground plane together with pin 19."
},
{
"number": "30",
"name": "PA0/EXTCLK",
"type": "bidirectional",
"description": "PORT A bit 0 / external clock input (EXTCLK). Alt functions: USART0 TxD, TCA0 WO0, CCL LUT0-IN0."
},
{
"number": "31",
"name": "PA1",
"type": "bidirectional",
"description": "PORT A bit 1. GPIO on VDD domain. Alt functions: USART0 RxD, TCA0 WO1, CCL LUT0-IN1."
},
{
"number": "32",
"name": "PA2",
"type": "bidirectional",
"description": "PORT A bit 2. GPIO on VDD domain. Alt functions: TWI0 SDA (master-slave default), USART0 XCK, TCA0 WO2, TCB0 WO, EVOUTA, CCL LUT0-IN2."
},
{
"number": "EP",
"name": "EP",
"type": "passive",
"description": "Exposed thermal pad on the underside of the VQFN package. Datasheet states it may be left electrically unconnected but must be soldered or glued for mechanical stability; commonly tied to GND for best thermal/EMI performance."
}
],
"provenance": {
"extractor": "ds2sf",
"datasheet": {
"url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588943153210933248",
"pages": null,
"sha256": "11b98b7b422fa15b",
"source_tier": "lcsc"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 33,
"described": 33,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
"viewers": {
"symbol": "viewers/symbol.html",
"footprint": "viewers/footprint.html"
},
"models_3d": [
{
"file": "atmega1608-mu.step",
"role": "plain",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
5,
5,
0.875
],
"zmin_mm": 0,
"centre_offset_mm": 0,
"footprint_binding": "identity",
"sha256": "5fa713ea46b36980895812ed853577889b7cb06d275041a39b99bc0be305dc79",
"checked": "2026-10-07",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
},
{
"file": "atmega1608-mu-etched.step",
"role": "eda",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
5,
5,
0.875
],
"zmin_mm": 0,
"centre_offset_mm": 0,
"footprint_binding": "identity",
"sha256": "a4113b80c5ac86756c8302e20abfb6255efeb3c78b9c5820ce294d7947f77302",
"checked": "2026-10-07",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
}
]
},
"metadata": {
"specs": {
"Manufacturer": "Microchip Tech",
"Package": "VQFN-32-EP(5x5)",
"Category": "Embedded Processors & Controllers",
"Pins": "33"
}
},
"variants": [
{
"mpn": "ATMEGA1608-MU",
"kind": "packaging"
},
{
"mpn": "ATMEGA1608-MUR",
"kind": "packaging"
},
{
"mpn": "ATMEGA1608-MUMF",
"kind": "packaging"
},
{
"mpn": "ATMEGA1608-MUMFR",
"kind": "packaging"
},
{
"mpn": "ATMEGA1608-MUAU",
"kind": "packaging"
},
{
"mpn": "ATMEGA1608-MUAUR",
"kind": "packaging"
},
{
"mpn": "ATMEGA1608-MUAF",
"kind": "packaging"
},
{
"mpn": "ATMEGA1608-MUAFR",
"kind": "packaging"
},
{
"mpn": "ATMEGA1608-MUXU",
"kind": "packaging"
},
{
"mpn": "ATMEGA1608-MUXUR",
"kind": "packaging"
},
{
"mpn": "ATMEGA1608-MUXF",
"kind": "packaging"
},
{
"mpn": "ATMEGA1608-MUXFR",
"kind": "packaging"
}
],
"sections": [
"hero",
"viewers",
"readme",
"breadcrumbs",
"info"
],
"discovery_triggers": [
"atmega1608-mu"
],
"discovery_pitch": "ATMEGA1608-MU (Microchip Tech) component page with datasheet-verified CAD.",
"author": {
"name": "Ray"
},
"dependencies": {},
"hero": {
"type": "image",
"path": "docs/hero.png"
},
"files": [
"page.json",
"README.md",
"atmega1608-mu.kicad_sym",
"atmega1608-mu.kicad_mod",
"atmega1608-mu.glb",
"atmega1608-mu.step",
"atmega1608-mu.lbr",
"docs/hero.png",
"docs/atmega1608-mu-datasheet.pdf",
"viewers/symbol.html",
"viewers/footprint.html"
],
"visibility": {
"public": true
},
"updated_at": "2026-09-24T17:17:21.523Z"
}