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ATMEGA1281-16AU

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Microchip Tech ATMEL & AVR, TQFP-64(14x14). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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ATMEGA1281-16AU

Microchip Tech · ATMEL & AVR · TQFP-64(14x14)

ATMEGA1281-16AU from Microchip Tech, in a TQFP-64(14x14). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 PG5 bidirectional Port G bit 5, I/O with selectable internal pull-up; alternate function OC0B.
2 PE0 bidirectional Port E bit 0, I/O with selectable internal pull-up; alternate functions RXD0/PCINT8/PDI.
3 PE1 bidirectional Port E bit 1, I/O with selectable internal pull-up; alternate functions TXD0/PDO.
4 PE2 bidirectional Port E bit 2, I/O with selectable internal pull-up; alternate functions XCK0/AIN0.
5 PE3 bidirectional Port E bit 3, I/O with selectable internal pull-up; alternate functions OC3A/AIN1.
6 PE4 bidirectional Port E bit 4, I/O with selectable internal pull-up; alternate functions OC3B/INT4.
7 PE5 bidirectional Port E bit 5, I/O with selectable internal pull-up; alternate functions OC3C/INT5.
8 PE6 bidirectional Port E bit 6, I/O with selectable internal pull-up; alternate functions T3/INT6.
9 PE7 bidirectional Port E bit 7, I/O with selectable internal pull-up; alternate functions ICP3/CLKO/INT7.
10 PB0 bidirectional Port B bit 0, I/O with selectable internal pull-up and higher drive capability than other ports; alternate functions SS/PCINT0.
11 PB1 bidirectional Port B bit 1, I/O with selectable internal pull-up and higher drive capability than other ports; alternate functions SCK/PCINT1.
12 PB2 bidirectional Port B bit 2, I/O with selectable internal pull-up and higher drive capability than other ports; alternate functions MOSI/PCINT2.
13 PB3 bidirectional Port B bit 3, I/O with selectable internal pull-up and higher drive capability than other ports; alternate functions MISO/PCINT3.
14 PB4 bidirectional Port B bit 4, I/O with selectable internal pull-up and higher drive capability than other ports; alternate functions OC2A/PCINT4.
15 PB5 bidirectional Port B bit 5, I/O with selectable internal pull-up and higher drive capability than other ports; alternate functions OC1A/PCINT5.
16 PB6 bidirectional Port B bit 6, I/O with selectable internal pull-up and higher drive capability than other ports; alternate functions OC1B/PCINT6.
17 PB7 bidirectional Port B bit 7, I/O with selectable internal pull-up and higher drive capability than other ports; alternate functions OC0A/OC1C/PCINT7.
18 PG3 bidirectional Port G bit 3, I/O with selectable internal pull-up; alternate function TOSC2.
19 PG4 bidirectional Port G bit 4, I/O with selectable internal pull-up; alternate function TOSC1.
20 RESET input Reset input pin (shown on the pinout figure; its description is not in the provided pages).
21 VCC power_in Digital supply voltage.
22 GND power_in Ground.
23 XTAL2 output Crystal oscillator amplifier output pin (description not in the provided pages).
24 XTAL1 input Crystal oscillator amplifier / external clock input pin (description not in the provided pages).
25 PD0 bidirectional Port D bit 0, I/O with selectable internal pull-up; alternate functions SCL/INT0.
26 PD1 bidirectional Port D bit 1, I/O with selectable internal pull-up; alternate functions SDA/INT1.
27 PD2 bidirectional Port D bit 2, I/O with selectable internal pull-up; alternate functions RXD1/INT2.
28 PD3 bidirectional Port D bit 3, I/O with selectable internal pull-up; alternate functions TXD1/INT3.
29 PD4 bidirectional Port D bit 4, I/O with selectable internal pull-up; alternate function ICP1.
30 PD5 bidirectional Port D bit 5, I/O with selectable internal pull-up; alternate function XCK1.
31 PD6 bidirectional Port D bit 6, I/O with selectable internal pull-up; alternate function T1.
32 PD7 bidirectional Port D bit 7, I/O with selectable internal pull-up; alternate function T0.
33 PG0 bidirectional Port G bit 0, I/O with selectable internal pull-up; alternate function WR.
34 PG1 bidirectional Port G bit 1, I/O with selectable internal pull-up; alternate function RD.
35 PC0 bidirectional Port C bit 0, I/O with selectable internal pull-up; alternate function A8.
36 PC1 bidirectional Port C bit 1, I/O with selectable internal pull-up; alternate function A9.
37 PC2 bidirectional Port C bit 2, I/O with selectable internal pull-up; alternate function A10.
38 PC3 bidirectional Port C bit 3, I/O with selectable internal pull-up; alternate function A11.
39 PC4 bidirectional Port C bit 4, I/O with selectable internal pull-up; alternate function A12.
40 PC5 bidirectional Port C bit 5, I/O with selectable internal pull-up; alternate function A13.
41 PC6 bidirectional Port C bit 6, I/O with selectable internal pull-up; alternate function A14.
42 PC7 bidirectional Port C bit 7, I/O with selectable internal pull-up; alternate function A15.
43 PG2 bidirectional Port G bit 2, I/O with selectable internal pull-up; alternate function ALE.
44 PA7 bidirectional Port A bit 7, I/O with selectable internal pull-up; alternate function AD7.
45 PA6 bidirectional Port A bit 6, I/O with selectable internal pull-up; alternate function AD6.
46 PA5 bidirectional Port A bit 5, I/O with selectable internal pull-up; alternate function AD5.
47 PA4 bidirectional Port A bit 4, I/O with selectable internal pull-up; alternate function AD4.
48 PA3 bidirectional Port A bit 3, I/O with selectable internal pull-up; alternate function AD3.
49 PA2 bidirectional Port A bit 2, I/O with selectable internal pull-up; alternate function AD2.
50 PA1 bidirectional Port A bit 1, I/O with selectable internal pull-up; alternate function AD1.
51 PA0 bidirectional Port A bit 0, I/O with selectable internal pull-up; alternate function AD0.
52 VCC power_in Digital supply voltage.
53 GND power_in Ground.
54 PF7 bidirectional Port F bit 7, analog input to the A/D Converter (ADC7) or I/O; JTAG TDI, pull-up active when JTAG is enabled even during reset.
55 PF6 bidirectional Port F bit 6, analog input to the A/D Converter (ADC6) or I/O; JTAG TDO.
56 PF5 bidirectional Port F bit 5, analog input to the A/D Converter (ADC5) or I/O; JTAG TMS, pull-up active when JTAG is enabled even during reset.
57 PF4 bidirectional Port F bit 4, analog input to the A/D Converter (ADC4) or I/O; JTAG TCK, pull-up active when JTAG is enabled even during reset.
58 PF3 bidirectional Port F bit 3, analog input to the A/D Converter (ADC3) or I/O.
59 PF2 bidirectional Port F bit 2, analog input to the A/D Converter (ADC2) or I/O.
60 PF1 bidirectional Port F bit 1, analog input to the A/D Converter (ADC1) or I/O.
61 PF0 bidirectional Port F bit 0, analog input to the A/D Converter (ADC0) or I/O.
62 AREF input Analog reference pin for the A/D Converter (description not in the provided pages).
63 GND power_in Ground.
64 AVCC power_in Supply voltage pin for the A/D Converter (description not in the provided pages).

Key specifications

Parameter Value
Manufacturer Microchip Tech
Package TQFP-64(14x14)
Category Embedded Processors & Controllers
Pins 64

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Operating temperature range (Industrial) -40 85 °C Industrial 21
Power supply voltage (16 MHz speed grade, ordering table) VCC 2.7 5.5 V ATmega1281-16AU ordering information 21
Clock frequency at 4.5V - 5.5V 0 16 MHz 4.5V - 5.5V 1
Clock frequency at 2.7V - 5.5V 0 8 MHz 2.7V - 5.5V 1

CAD (KiCad official)

  • Symbol: ATMEGA1281-16AU
  • Footprint: Package_QFP:TQFP-64_14x14mm_P0.8mm
  • 3D model: TQFP-64(14x14) (KiCad packages3D, STEP)
  • 3D model files: atmega1281-16au-etched.step / atmega1281-16au-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); atmega1281-16au.step / atmega1281-16au.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Microchip Tech datasheet (34 pp, sha256 8ee216d27cb2f273, retrieved 2026-10-22, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF