component

ATM9435PPA

Public Made by Adom

by adom

Agertech MOSFETs, SOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componenttransistorsatm9435ppafactory-2.0.0extractor-text

Verified ATM9435PPA

by Ray · last 12 Nov 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

12 Nov 2026RayPublished by the parts factory: tier lcsc, 8 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: ATM9435PPA · SOP-8 · 8 pins
  • ✓copper: 8 copper pads, none touching another net
  • ✓datasheet: all 8 pin names found in the 5-page datasheet
  • •distributor (warn): no ['digikey', 'mouser'] number
  • ✓family: SOIC-8_3.9x4.9mm_P1.27mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-5wbdkaon/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • ✓package_fit: height and body within the datasheet's package drawing (datasheet p.5)
  • ✓pads: 8 pins = 8 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 8 pins agree
  • ✓symbol_text: no pin names collide
  • ✓viewers: viewers/footprint.html 24 kB, viewers/symbol.html 10 kB
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ atm9435ppa.kicad_sym✓ atm9435ppa.kicad_mod✓ atm9435ppa.step
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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray
viewers atm9435ppa: viewers rendered from the public page · Ray
atm9435ppa-etched.glb Publish 0.1.0 · Ray
atm9435ppa-etched.step atm9435ppa: factory component page (tier=lcsc) · Ray
atm9435ppa-hero.glb atm9435ppa: hero GLB from the etched model (keeps the MPN mark) · Ray
atm9435ppa-hero.overlay.json atm9435ppa: hero GLB from the etched model (keeps the MPN mark) · Ray
atm9435ppa.glb Publish 0.1.0 · Ray
atm9435ppa.kicad_mod Publish 0.1.0 · Ray
atm9435ppa.kicad_sym Publish 0.1.0 · Ray
atm9435ppa.lbr Publish 0.1.0 · Ray
atm9435ppa.step Publish 0.1.0 · Ray
package.json Publish 0.1.0 · Ray
page.json Set visibility: public · Ray
README.md Publish 0.1.0 · Ray
verification.json Verified: Published by the parts factory: tier lcsc, 8 pins · Ray

ATM9435PPA

Agertech · MOSFETs · SOP-8

ATM9435PPA from Agertech, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 S passive Source of the P-channel MOSFET, pin 1 at the bottom-left of the top view, tied to the other source pins.
2 S passive Source of the P-channel MOSFET, tied to the other source pins.
3 S passive Source of the P-channel MOSFET, tied to the other source pins.
4 G input Gate input, with a maximum gate-source voltage of ±20 V and a threshold of -1.0 to -2.0 V.
5 D passive Drain of the P-channel MOSFET, rated for VDS of -30 V and continuous ID of -6.0 A at TA=25°C.
6 D passive Drain of the P-channel MOSFET, tied to the other drain pins.
7 D passive Drain of the P-channel MOSFET, tied to the other drain pins.
8 D passive Drain of the P-channel MOSFET, tied to the other drain pins.

Key specifications

Parameter Value
Manufacturer Agertech
Package SOP-8
Category Transistors
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Drain-Source Voltage VDS -30 V 1
Gate-Source Voltage VGS -20 20 V 1
Continuous Drain Current ID -6 A TA=25°C 1
Continuous Drain Current ID -4.7 A TA=70°C 1
Pulsed Drain Current IDM -50 A 1
Power Dissipation PD 2.7 W TA=25°C 1
Power Dissipation PD 1.7 W TA=70°C 1
Junction and Storage Temperature Range TJ, TSTG -55 150 °C 1
Maximum Junction-to-Ambient RθJA 37 46 °C/W t≤ 10s 1
Maximum Junction-to-Ambient (Steady-State) RθJA 62 77 °C/W Steady-State 1
Maximum Junction-to-Lead RθJL 16.5 22 °C/W Steady-State 1
Drain-Source Breakdown Voltage BVDSS -30 V ID=-250µA, VGS=0V 2
Zero Gate Voltage Drain Current IDSS -1 µA VDS=-24V, VGS=0V 2
Gate-Body leakage current IGSS -100 100 nA VDS=0V, VGS=±20V 2
Gate Threshold Voltage VGS(th) -1 -1.5 -2 V VDS=VGS, ID=-250µA 2
Static Drain-Source On-Resistance RDS(ON) 35 48 mΩ VGS=-10V, ID=-4.6A 2
Static Drain-Source On-Resistance RDS(ON) 45 55 mΩ VGS=-6.0V, ID=-4.1A 2
Static Drain-Source On-Resistance RDS(ON) 56 78 mΩ VGS=-4.5V, ID=-3.7A 2
Diode Forward Voltage VSD -0.8 -1.2 V IS=-1.0A, VGS=0V 2

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
housing PPA Figure 5: On-Resistance vs Gate-Source Figure 6: Body-Diode Characteristics ATM9435PPA 3

CAD (KiCad official)

  • Symbol: ATM9435PPA
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOP-8 (KiCad packages3D, STEP)
  • 3D model files: atm9435ppa-etched.step / atm9435ppa-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); atm9435ppa.step / atm9435ppa.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Agertech datasheet (5 pp, sha256 ab5944580e8170be, retrieved 2026-11-12, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF