component

ATECC608C-SSHDA-T

Public Made by Adom

by adom

Microchip Tech Security Verification / Encryption ICs, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentinterfaceatecc608c-sshda-tfactory-2.0.0extractor-text
Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity
main
atecc608c-sshda-t / README.md
History Download
Ray Publish 0.1.0 15ea2d8 17d ago

ATECC608C-SSHDA-T

Microchip Tech · Security Verification / Encryption ICs · SOIC-8

ATECC608C-SSHDA-T from Microchip Tech, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 NC unconnected No internal connection; leave this pin unconnected.
2 NC unconnected No internal connection; leave this pin unconnected.
3 NC unconnected No internal connection; leave this pin unconnected.
4 GND power_in Ground reference for the device.
5 SDA bidirectional Serial data line for the 1 MHz standard I2C interface.
6 SCL input Serial clock input for the 1 MHz standard I2C interface.
7 NC unconnected No internal connection; leave this pin unconnected.
8 VCC power_in Power supply input; the datasheet specifies a 2.0 V to 5.5 V supply with 1.8 V to 5.5 V I/O levels.

Key specifications

Parameter Value
Manufacturer Microchip Tech
Package SOIC-8
Category Interface
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Operating Temperature (absolute maximum) -40 100 °C 10
Storage Temperature -65 150 °C 10
Maximum Operating Voltage 6 V 10
DC Output Current 5 mA 10
Voltage on any pin -0.5 V Upper limit printed as VCC + 0.5V 10
ESD Human Body Model (HBM) 4 kV Printed as >4 kV 10
ESD Charge Device Model (CDM) 1 kV Printed as >1 kV 10
Ambient Operating Temperature (Standard Industrial Range, H grade) TA -40 85 °C Standard Industrial Temperature Range 13
Power Supply Voltage VCC 2 5.5 V 13
Active Power Supply Current ICC 2 3 mA Waiting for I/O during I/O transfers or execution of non-ECC commands. Independent of Clock Divider value. 13
Active Power Supply Current during ECC command ICC 14 mA During ECC command execution. Clock divider = 0x0 13
Active Power Supply Current during ECC command ICC 6 mA During ECC command execution. Clock divider = 0x5 13
Active Power Supply Current during ECC command ICC 3 mA During ECC command execution. Clock divider = 0xD 13
Sleep Current ISLEEP 30 150 nA When device is in Sleep mode, VCC ≤ 3.6V, VSDA and VSCL < 0.4V or > VCC, 0.4, TA ≤ +55°C 13
Sleep Current ISLEEP 2 µA When device is in Sleep mode. Over full VCC range and -40°C to 85°C temperature range. 13
Output Low Voltage VOL 0.4 V When device is in Active mode, VCC = 2.5 to 5.5V 14
Output Low Current IOL 4 mA When device is in Active mode, VCC = 2.5 to 5.5V, VOL = 0.4V 14
Input Low Voltage VIL -0.5 0.5 V When device is active and TTLenable bit in Configuration memory is zero; otherwise, see above. 14
Input High Voltage VIH 1.5 V When device is active and TTLenable bit in Configuration memory is zero; otherwise, see above. Upper limit printed as VCC + 0.5V 14
Write Endurance (each byte) 400000 Write Cycles at +85°C 10
Data Retention 15 Years at +70°C 10
Data Retention 45 Years at +55°C 10
Power-Up Delay tPU 100 µs Minimum time between VCC > VCC min prior to start of tWLO. 11
Wake Low Duration tWLO 60 µs 11
Initialization Time tDVC_INIT 400 µs Maximum time from rising edge of wake pulse until device is initialized. 11
Wake High Delay to Data Comm tWHI 1500 µs SDA recommended stable high for this entire duration unless polling is implemented. SelfTest not enabled at power-up. 11
Wake High Delay when SelfTest is Enabled tWHIST 20 ms SDA recommended stable high for this entire duration unless polling is implemented. 11
High-Side Glitch Filter at Active tHIGNORE_A 45 ns Pulses shorter than this in width will be ignored by the device, regardless of its state when active. 11
Low-Side Glitch Filter at Active tLIGNORE_A 45 ns Pulses shorter than this in width will be ignored by the device, regardless of its state when active. 11
Low-Side Glitch Filter at Sleep tLIGNORE_S 15 µs Pulses shorter than this in width will be ignored by the device when in Sleep mode. 11
Watchdog Time-out tWATCHDOG 0.7 1.3 1.7 s Time from wake until device is forced into Sleep mode if Config.ChipMode[2] is 0. 11
SCL Clock Frequency fSCL 0 1 MHz 13
SCL High Time tHIGH 400 ns 13
SCL Low Time tLOW 400 ns 13
Start Setup Time tSU.STA 250 ns 13
Start Hold Time tHD.STA 250 ns 13
Stop Setup Time tSU.STO 250 ns 13
Data In Setup Time tSU.DAT 100 ns 13
Data In Hold Time tHD.DAT 0 ns 13
Input Rise Time tR 300 ns 13
Input Fall Time tF 100 ns 13
Clock Low to Data Out Valid tAA 50 550 ns 13
Data Out Hold Time tDH 50 ns 13
SMBus Time-Out Delay tTIMEOUT 25 35 ms 13
Time bus must be free before a new transmission can start tBUF 500 ns 13
Theta JA (SOIC) ƟJA 166 °C/W SOIC (SS) 14

CAD (KiCad official)

  • Symbol: ATECC608C-SSHDA-T
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: atecc608c-sshda-t-etched.step / atecc608c-sshda-t-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); atecc608c-sshda-t.step / atecc608c-sshda-t.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Microchip Tech datasheet (33 pp, sha256 c88378258d593053, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF