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ATECC508A-SSHDA-B
Public Made by Adomby adom
Microchip Tech ATMEL & AVR, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownATECC508A-SSHDA-B
Microchip Tech · ATMEL & AVR · SOIC-8
ATECC508A-SSHDA-B from Microchip Tech, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | NC | unconnected | No connect pin. |
| 2 | NC | unconnected | No connect pin. |
| 3 | NC | unconnected | No connect pin. |
| 4 | GND | power_in | Ground. |
| 5 | SDA | bidirectional | Serial data pin for the I2C interface (this -SSHDA variant is the I2C configuration); the datasheet notes an external pull-up RL of 1.2k to VCC for AC measurements. |
| 6 | SCL | input | Serial clock input for the I2C interface, with fSCK of 0 to 1 MHz. |
| 7 | NC | unconnected | No connect pin. |
| 8 | VCC | power_in | Power supply, 2.0V to 5.5V operating range. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | SOIC-8 |
| Category | Embedded Processors & Controllers |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Power Supply Voltage | VCC | 2 | 5.5 | V | 8 | ||
| Ambient Operating Temperature | TA | -40 | 85 | °C | 8 | ||
| Active Power Supply Current (waiting for I/O / non-ECC commands) | ICC | 3 | 6 | mA | Waiting for I/O during I/O transfers or execution of non-ECC commands when ChipMode:3 is zero | 8 | |
| Active Power Supply Current (ECC command execution) | ICC | 16 | mA | During ECC command execution | 8 | ||
| Idle Power Supply Current | IIDLE | 800 | µA | Idle mode, VSDA and VSCL < 0.4V or > VCC, 0.4 | 8 | ||
| Sleep Current | ISLEEP | 30 | 150 | nA | Sleep mode, VCC ≤ 3.6V, VSDA and VSCL < 0.4V or > VCC, 0.4, TA ≤ 55°C | 8 | |
| Sleep Current | ISLEEP | 2 | µA | When device is in sleep mode | 8 | ||
| Output Low Voltage | VOL | 0.4 | V | Active mode, VCC = 2.5, 5.5V | 8 | ||
| Output Low Current | IOL | 4 | mA | Active mode, VCC = 2.5, 5.5V, VOL = 0.4V | 8 | ||
| Input Low Voltage | VIL | -0.5 | 0.5 | V | Device active and TTLenable bit zero | 8 | |
| Input High Voltage | VIH | 1.5 | 5.5 | V | Device active and TTLenable bit zero; max printed as VCC + 0.5 | 8 | |
| Theta JA SOIC (SSH) | ΘJA | 166 | C/W | SOIC (SSH) | 8 | ||
| Operating Temperature | -40 | 85 | °C | 5 | |||
| Storage Temperature | -65 | 150 | °C | 5 | |||
| Maximum Operating Voltage | 6 | V | 5 | ||||
| DC Output Current | 5 | mA | 5 | ||||
| Voltage on any pin | -0.5 | 5.5 | V | -0.5V to (VCC + 0.5V) | 5 | ||
| Write Endurance (each byte) | 400000 | Write Cycles | at 85C | 5 | |||
| Data Retention | 10 | Years | at 55C | 5 | |||
| Data Retention | 30 | 50 | Years | at 35C | 5 | ||
| Power-Up Delay | tPU | 100 | µs | To Crypto Authentication; min time between VCC > VCC min prior to measurement of tWLO | 5 | ||
| Wake Low Duration | tWLO | 60 | µs | To Crypto Authentication | 5 | ||
| Wake High Delay to Data Comm. | tWHI | 500 | µs | To Crypto Authentication; SDA stable high | 5 | ||
| Watchdog Timeout | tWATCHDOG | 0.7 | 1.3 | 1.7 | s | Max time from wake until device forced into sleep | 5 |
| SCK Clock Frequency | fSCK | 0 | 1 | MHz | TA = -40°C to +85°C, VCC = 2.0V to 5.5V | 7 | |
| SCK High Time | tHIGH | 400 | ns | 7 | |||
| SCK Low Time | tLOW | 400 | ns | 7 | |||
| Start Setup Time | tSU.STA | 250 | ns | 7 | |||
| Start Hold Time | tHD.STA | 250 | ns | 7 | |||
| Stop Setup Time | tSU.STO | 250 | ns | 7 | |||
| Data In Setup Time | tSU.DAT | 100 | ns | 7 | |||
| Data In Hold Time | tHD.DAT | 0 | ns | 7 | |||
| Input Rise Time | tR | 300 | ns | Based on characterization, not tested | 7 | ||
| Input Fall Time | tF | 100 | ns | Based on characterization, not tested | 7 | ||
| Clock Low to Data Out Valid | tAA | 50 | 550 | ns | 7 | ||
| Data Out Hold Time | tDH | 50 | ns | 7 | |||
| SMBus Timeout Delay | tTIMEOUT | 25 | 75 | ms | 7 | ||
| Bus free time before new transmission | tBUF | 500 | ns | Based on characterization, not tested | 7 |
CAD (KiCad official)
- Symbol:
ATECC508A-SSHDA-B - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
atecc508a-sshda-b-etched.step/atecc508a-sshda-b-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);atecc508a-sshda-b.step/atecc508a-sshda-b.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Microchip Tech datasheet (14 pp, sha256
409187c807907375, retrieved 2026-10-23, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).