component
ATA663254-GAQW
Public Made by Adomby adom
Microchip Tech LIN Transceivers, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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ATA663254-GAQW
Microchip Tech · LIN Transceivers · SOIC-8
ATA663254-GAQW from Microchip Tech, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | RXD | output | Receive data output that reports the LIN bus state to the microcontroller as a push-pull stage between VCC and GND (high = recessive, low = dominant), and switches high in Silent mode. |
| 2 | EN | input | Enable input that selects Normal mode when high, Silent mode when low with TXD high, and Sleep mode when low with TXD low, with an internal pull-down resistor. |
| 3 | NRES | output | Open-drain VCC undervoltage reset output that is low at reset and stays low for tReset = 4 ms after VCC reaches its nominal value. |
| 4 | TXD | input | Transmit data input with internal pull-up that drives the LIN bus low when pulled to ground, has a TXD time-out of tdom > 20 ms, and acts as an output signaling the fail-safe source in Fail-Safe mode. |
| 5 | GND | power_in | Ground pin, fused lead frame to the die so it must be connected to a wide GND plate on the PCB for heat sinking, and tolerates a ground shift of up to 11.5% of VVS. |
| 6 | LIN | bidirectional | LIN bus line input/output with a low-side driver, current limitation, thermal shutdown, internal pull-up and a voltage range of -27V to +40V. |
| 7 | VS | power_in | Supply voltage pin with LIN operating voltage VVS = 5V to 28V and undervoltage detection that disables transmission below typically 4.5V. |
| 8 | VCC | power_out | Voltage regulator output of 5.0V (ATA663254, ±2%) for loads up to 85 mA, protected by current limitation and overtemperature shutdown. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | SOIC-8 |
| Category | Interface ICs |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply Voltage | VVS | -0.3 | 40 | V | 15 | ||
| Supply Voltage pulse | VVS | 40 | V | Pulse Time 500 ms, Tamb = +25°C, IVCC 85 mA | 15 | ||
| Supply Voltage pulse | VVS | 28 | V | Pulse Time 2 min, Tamb = +25°C, IVCC 85 mA | 15 | ||
| Logic pin voltage | VLogic | -0.3 | 5.5 | V | RXD, TXD, EN, NRES | 15 | |
| Logic output DC current | ILogic | -5 | 5 | mA | 15 | ||
| LIN DC voltage | VLIN | -27 | 40 | V | 15 | ||
| LIN pulse voltage | VLIN | 43.5 | V | Pulse Time < 500 ms | 15 | ||
| VCC DC voltage | VVCC | -0.3 | 5.5 | V | 15 | ||
| VCC DC input current | IVCC | 200 | mA | 15 | |||
| Virtual junction temperature | TvJ | -40 | 150 | °C | 15 | ||
| Storage temperature | Tstg | -55 | 150 | °C | 15 | ||
| ESD HBM | -3 | 3 | kV | ANSI/ESD-STM5.1 JESD22-A114 AEC-Q100 (002) | 15 | ||
| ESD HBM VS, LIN to GND | -6 | 6 | kV | HBM 1.5 kΩ/100 pF, pin VS, LIN to GND | 15 | ||
| ESD IEC 61000-4-2 VS, LIN | -6 | 6 | kV | with external circuitry, pin VS, LIN to GND | 15 | ||
| ESD CDM | -750 | 750 | V | STM 5.3.1 | 15 | ||
| ESD Machine Model | -200 | 200 | V | AEC-Q100-RevF(003) | 15 | ||
| Nominal DC Voltage Range | VS | 5 | 13.5 | 28 | V | 16 | |
| Supply Current in Sleep Mode | IVSsleep | 6 | 9 | 12 | µA | Sleep mode, VLIN > VVS - 0.5V, VVS < 14V, T = +27°C | 16 |
| Supply Current in Sleep Mode | IVSsleep | 3 | 10 | 15 | µA | Sleep mode, VLIN > VVS - 0.5V, VVS < 14V | 16 |
| Sleep Current, bus shorted | IVSsleep_short | 20 | 50 | 100 | µA | Sleep mode, VLIN = 0V, bus shorted to GND, VVS < 14V | 16 |
| Supply Current in Silent Mode | IVSsilent | 30 | 47 | 58 | µA | Bus recessive, 5.5V < VVS < 14V, without load at VCC, T = +27°C | 16 |
| Supply Current in Silent Mode | IVSsilent | 30 | 50 | 64 | µA | Bus recessive, 5.5V < VVS < 14V, without load at VCC | 16 |
| Supply Current in Silent Mode | IVSsilent | 50 | 130 | 170 | µA | Bus recessive, 2.0V < VVS < 5.5V, without load at VCC | 16 |
| Silent Current, bus shorted | IVSsilent_short | 50 | 80 | 120 | µA | Silent mode, 5.5V < VVS < 14V, bus shorted to GND, without load at VCC | 16 |
| Supply Current in Normal Mode, recessive | IVSrec | 150 | 230 | 300 | µA | Bus recessive, VVS < 14V, without load at VCC | 16 |
| Supply Current in Normal Mode, dominant | IVSdom | 200 | 700 | 950 | µA | Bus dominant (internal LIN pull-up resistor active), VVS < 14V, without load at VCC | 16 |
| Supply Current in Fail-Safe Mode | IVSfail | 40 | 55 | 80 | µA | Bus recessive, 5.5V < VVS < 14V, without load at VCC | 16 |
| Supply Current in Fail-Safe Mode | IVSfail | 50 | 130 | 170 | µA | Bus recessive, 2.0V < VVS < 5.5V, without load at VCC | 16 |
| VS Undervoltage Threshold down | VVS_th_U_down | 3.9 | 4.3 | 4.7 | V | Decreasing supply voltage | 16 |
| VS Undervoltage Threshold up | VVS_th_U_up | 4.1 | 4.6 | 4.9 | V | Increasing supply voltage | 16 |
| VS Undervoltage Hysteresis | VVS_hys_F_N | 0.1 | 0.25 | 0.4 | V | 16 | |
| VS Operation Threshold down | VVS_th_U_down | 1.9 | 2.05 | 2.3 | V | Switch to unpowered mode | 17 |
| VS Operation Threshold up | VVS_th_U_up | 2 | 2.25 | 2.4 | V | Switch from unpowered to Fail-Safe mode | 17 |
| VS Undervoltage Hysteresis | VVS_hys_U | 0.1 | 0.2 | 0.3 | V | 17 | |
| RXD Low-Level Output | VRXDL | 0.2 | 0.4 | V | Normal mode, VLIN = 0V, IRXD = 2 mA | 17 | |
| TXD Low-Level Voltage Input | VTXDL | -0.3 | 0.8 | V | 17 | ||
| TXD Pull-Up Resistor | RTXD | 40 | 70 | 100 | kΩ | VTXD = 0V | 17 |
| TXD High-Level Leakage Current | ITXD | -3 | 3 | µA | VTXD = VVCC | 17 | |
| TXD Low-Level Output Sink Current at LIN Wake-Up | ITXD | 1.5 | 2.5 | 8 | mA | Fail-Safe mode, VLIN = VVS, VTXD = 0.4V | 17 |
| EN Low-Level Voltage Input | VENL | -0.3 | 0.8 | V | 17 | ||
| EN Pull-Down Resistor | REN | 50 | 125 | 200 | kΩ | VEN = VVCC | 17 |
| EN Low-Level Input Current | IEN | -3 | 3 | µA | VEN = 0V | 17 | |
| NRES Low-Level Output Voltage | VNRESL | 0.2 | 0.4 | V | VVS ≥ 5.5V, INRES = 2 mA | 17 | |
| Undervoltage Reset Time | tReset | 2 | 4 | 6 | ms | VVS ≥ 5.5V, CNRES = 20 pF | 17 |
| Reset Debounce Time for Falling Edge | tres_f | 0.5 | 10 | µs | VVS ≥ 5.5V, CNRES = 20 pF | 17 | |
| NRES Switch Off Leakage Current | INRES_L | -3 | 3 | µA | VNRES = 5.5V | 17 | |
| VCC Output Voltage (5V) | VVCCnor | 4.9 | 5.1 | V | 5.5V < VVS < 18V (0 mA to 50 mA) | 18 | |
| VCC Output Voltage at Low VVS | VVCClow | 5.1 | V | 4V < VVS < 5.5V | 18 | ||
| Regulator Drop Voltage | VD1 | 100 | 200 | mV | VVS > 4V, IVCC = -20 mA | 18 | |
| Regulator Drop Voltage | VD1 | 300 | 500 | mV | VVS > 4V, IVCC = -50 mA | 18 | |
| Regulator Drop Voltage | VD3 | 150 | mV | VVS > 3.3V, IVCC = -15 mA | 18 | ||
| Line Regulation Maximum | VCCline | 0.1 | 0.2 | % | 5.5V < VVS < 18V | 18 | |
| Load Regulation Maximum | VCCload | 0.1 | 0.5 | % | 5 mA < IVCC < 50 mA | 19 | |
| Output Current Limitation | IVCClim | -180 | -120 | mA | VVS > 5.5V | 19 | |
| Load Capacity | Cload | 1.8 | 2.2 | µF | MLC capacitor (Note 3) | 19 | |
| VCC Undervoltage Threshold (NRES ON) | VVCC_th_uv_down | 4.2 | 4.4 | 4.6 | V | Referred to VCC, VVS > 4V | 19 |
| VCC Undervoltage Threshold (NRES OFF) | VVCC_th_uv_up | 4.3 | 4.6 | 4.8 | V | Referred to VCC, VVS > 4V | 19 |
| Hysteresis of Undervoltage Threshold | VVCC_hys_uv | 100 | 200 | 300 | mV | Referred to VCC, VVS > 5.5V | 19 |
| Ramp-Up Time | tVCC | 1 | 1.5 | ms | CVCC = 2.2 µF, Iload = -5 mA at VCC | 19 | |
| Driver Recessive Output Voltage | VBUSrec | 0.9 | 1 | V | Load1/Load2 (min 0.9 x VVS, max VVS) | 19 | |
| Pull-Up Resistor to VS | RLIN | 20 | 30 | 47 | kΩ | The serial diode is mandatory | 19 |
| Voltage Drop at Serial Diodes | VSerDiode | 0.4 | 1 | V | In pull-up path with RLIN, ISerDiode = 10 mA (Note 3) | 19 | |
| LIN Current Limitation | IBUS_LIM | 40 | 120 | 200 | mA | VBUS = VBAT_MAX | 19 |
| Thermal Resistance Virtual Junction to Ambient (SOIC) | RthvJA | 80 | K/W | 8-lead SOIC with heat sink at GND (pin 5) on PCB | 23 | ||
| Thermal Shutdown of VCC Regulator | TVCCoff | 150 | 165 | 180 | °C | 23 | |
| Thermal Shutdown of LIN Output | TLINoff | 150 | 165 | 180 | °C | 23 | |
| Thermal Shutdown Hysteresis | Thys | 10 | °C | 23 |
CAD (KiCad official)
- Symbol:
ATA663254-GAQW - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
ata663254-gaqw-etched.step/ata663254-gaqw-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ata663254-gaqw.step/ata663254-gaqw.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Microchip Tech datasheet (36 pp, sha256
e6747cb824bd0c87, retrieved 2026-10-23, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# ATA663254-GAQW
**Microchip Tech** · LIN Transceivers · SOIC-8
ATA663254-GAQW from Microchip Tech, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | RXD | output | Receive data output that reports the LIN bus state to the microcontroller as a push-pull stage between VCC and GND (high = recessive, low = dominant), and switches high in Silent mode. |
| 2 | EN | input | Enable input that selects Normal mode when high, Silent mode when low with TXD high, and Sleep mode when low with TXD low, with an internal pull-down resistor. |
| 3 | NRES | output | Open-drain VCC undervoltage reset output that is low at reset and stays low for tReset = 4 ms after VCC reaches its nominal value. |
| 4 | TXD | input | Transmit data input with internal pull-up that drives the LIN bus low when pulled to ground, has a TXD time-out of tdom > 20 ms, and acts as an output signaling the fail-safe source in Fail-Safe mode. |
| 5 | GND | power_in | Ground pin, fused lead frame to the die so it must be connected to a wide GND plate on the PCB for heat sinking, and tolerates a ground shift of up to 11.5% of VVS. |
| 6 | LIN | bidirectional | LIN bus line input/output with a low-side driver, current limitation, thermal shutdown, internal pull-up and a voltage range of -27V to +40V. |
| 7 | VS | power_in | Supply voltage pin with LIN operating voltage VVS = 5V to 28V and undervoltage detection that disables transmission below typically 4.5V. |
| 8 | VCC | power_out | Voltage regulator output of 5.0V (ATA663254, ±2%) for loads up to 85 mA, protected by current limitation and overtemperature shutdown. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | SOIC-8 |
| Category | Interface ICs |
| Pins | 8 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply Voltage | VVS | -0.3 | | 40 | V | | 15 |
| Supply Voltage pulse | VVS | | | 40 | V | Pulse Time 500 ms, Tamb = +25°C, IVCC 85 mA | 15 |
| Supply Voltage pulse | VVS | | | 28 | V | Pulse Time 2 min, Tamb = +25°C, IVCC 85 mA | 15 |
| Logic pin voltage | VLogic | -0.3 | | 5.5 | V | RXD, TXD, EN, NRES | 15 |
| Logic output DC current | ILogic | -5 | | 5 | mA | | 15 |
| LIN DC voltage | VLIN | -27 | | 40 | V | | 15 |
| LIN pulse voltage | VLIN | | | 43.5 | V | Pulse Time < 500 ms | 15 |
| VCC DC voltage | VVCC | -0.3 | | 5.5 | V | | 15 |
| VCC DC input current | IVCC | | | 200 | mA | | 15 |
| Virtual junction temperature | TvJ | -40 | | 150 | °C | | 15 |
| Storage temperature | Tstg | -55 | | 150 | °C | | 15 |
| ESD HBM | | -3 | | 3 | kV | ANSI/ESD-STM5.1 JESD22-A114 AEC-Q100 (002) | 15 |
| ESD HBM VS, LIN to GND | | -6 | | 6 | kV | HBM 1.5 kΩ/100 pF, pin VS, LIN to GND | 15 |
| ESD IEC 61000-4-2 VS, LIN | | -6 | | 6 | kV | with external circuitry, pin VS, LIN to GND | 15 |
| ESD CDM | | -750 | | 750 | V | STM 5.3.1 | 15 |
| ESD Machine Model | | -200 | | 200 | V | AEC-Q100-RevF(003) | 15 |
| Nominal DC Voltage Range | VS | 5 | 13.5 | 28 | V | | 16 |
| Supply Current in Sleep Mode | IVSsleep | 6 | 9 | 12 | µA | Sleep mode, VLIN > VVS - 0.5V, VVS < 14V, T = +27°C | 16 |
| Supply Current in Sleep Mode | IVSsleep | 3 | 10 | 15 | µA | Sleep mode, VLIN > VVS - 0.5V, VVS < 14V | 16 |
| Sleep Current, bus shorted | IVSsleep_short | 20 | 50 | 100 | µA | Sleep mode, VLIN = 0V, bus shorted to GND, VVS < 14V | 16 |
| Supply Current in Silent Mode | IVSsilent | 30 | 47 | 58 | µA | Bus recessive, 5.5V < VVS < 14V, without load at VCC, T = +27°C | 16 |
| Supply Current in Silent Mode | IVSsilent | 30 | 50 | 64 | µA | Bus recessive, 5.5V < VVS < 14V, without load at VCC | 16 |
| Supply Current in Silent Mode | IVSsilent | 50 | 130 | 170 | µA | Bus recessive, 2.0V < VVS < 5.5V, without load at VCC | 16 |
| Silent Current, bus shorted | IVSsilent_short | 50 | 80 | 120 | µA | Silent mode, 5.5V < VVS < 14V, bus shorted to GND, without load at VCC | 16 |
| Supply Current in Normal Mode, recessive | IVSrec | 150 | 230 | 300 | µA | Bus recessive, VVS < 14V, without load at VCC | 16 |
| Supply Current in Normal Mode, dominant | IVSdom | 200 | 700 | 950 | µA | Bus dominant (internal LIN pull-up resistor active), VVS < 14V, without load at VCC | 16 |
| Supply Current in Fail-Safe Mode | IVSfail | 40 | 55 | 80 | µA | Bus recessive, 5.5V < VVS < 14V, without load at VCC | 16 |
| Supply Current in Fail-Safe Mode | IVSfail | 50 | 130 | 170 | µA | Bus recessive, 2.0V < VVS < 5.5V, without load at VCC | 16 |
| VS Undervoltage Threshold down | VVS_th_U_down | 3.9 | 4.3 | 4.7 | V | Decreasing supply voltage | 16 |
| VS Undervoltage Threshold up | VVS_th_U_up | 4.1 | 4.6 | 4.9 | V | Increasing supply voltage | 16 |
| VS Undervoltage Hysteresis | VVS_hys_F_N | 0.1 | 0.25 | 0.4 | V | | 16 |
| VS Operation Threshold down | VVS_th_U_down | 1.9 | 2.05 | 2.3 | V | Switch to unpowered mode | 17 |
| VS Operation Threshold up | VVS_th_U_up | 2 | 2.25 | 2.4 | V | Switch from unpowered to Fail-Safe mode | 17 |
| VS Undervoltage Hysteresis | VVS_hys_U | 0.1 | 0.2 | 0.3 | V | | 17 |
| RXD Low-Level Output | VRXDL | | 0.2 | 0.4 | V | Normal mode, VLIN = 0V, IRXD = 2 mA | 17 |
| TXD Low-Level Voltage Input | VTXDL | -0.3 | | 0.8 | V | | 17 |
| TXD Pull-Up Resistor | RTXD | 40 | 70 | 100 | kΩ | VTXD = 0V | 17 |
| TXD High-Level Leakage Current | ITXD | -3 | | 3 | µA | VTXD = VVCC | 17 |
| TXD Low-Level Output Sink Current at LIN Wake-Up | ITXD | 1.5 | 2.5 | 8 | mA | Fail-Safe mode, VLIN = VVS, VTXD = 0.4V | 17 |
| EN Low-Level Voltage Input | VENL | -0.3 | | 0.8 | V | | 17 |
| EN Pull-Down Resistor | REN | 50 | 125 | 200 | kΩ | VEN = VVCC | 17 |
| EN Low-Level Input Current | IEN | -3 | | 3 | µA | VEN = 0V | 17 |
| NRES Low-Level Output Voltage | VNRESL | | 0.2 | 0.4 | V | VVS ≥ 5.5V, INRES = 2 mA | 17 |
| Undervoltage Reset Time | tReset | 2 | 4 | 6 | ms | VVS ≥ 5.5V, CNRES = 20 pF | 17 |
| Reset Debounce Time for Falling Edge | tres_f | 0.5 | | 10 | µs | VVS ≥ 5.5V, CNRES = 20 pF | 17 |
| NRES Switch Off Leakage Current | INRES_L | -3 | | 3 | µA | VNRES = 5.5V | 17 |
| VCC Output Voltage (5V) | VVCCnor | 4.9 | | 5.1 | V | 5.5V < VVS < 18V (0 mA to 50 mA) | 18 |
| VCC Output Voltage at Low VVS | VVCClow | | | 5.1 | V | 4V < VVS < 5.5V | 18 |
| Regulator Drop Voltage | VD1 | | 100 | 200 | mV | VVS > 4V, IVCC = -20 mA | 18 |
| Regulator Drop Voltage | VD1 | | 300 | 500 | mV | VVS > 4V, IVCC = -50 mA | 18 |
| Regulator Drop Voltage | VD3 | | | 150 | mV | VVS > 3.3V, IVCC = -15 mA | 18 |
| Line Regulation Maximum | VCCline | | 0.1 | 0.2 | % | 5.5V < VVS < 18V | 18 |
| Load Regulation Maximum | VCCload | | 0.1 | 0.5 | % | 5 mA < IVCC < 50 mA | 19 |
| Output Current Limitation | IVCClim | | -180 | -120 | mA | VVS > 5.5V | 19 |
| Load Capacity | Cload | 1.8 | 2.2 | | µF | MLC capacitor (Note 3) | 19 |
| VCC Undervoltage Threshold (NRES ON) | VVCC_th_uv_down | 4.2 | 4.4 | 4.6 | V | Referred to VCC, VVS > 4V | 19 |
| VCC Undervoltage Threshold (NRES OFF) | VVCC_th_uv_up | 4.3 | 4.6 | 4.8 | V | Referred to VCC, VVS > 4V | 19 |
| Hysteresis of Undervoltage Threshold | VVCC_hys_uv | 100 | 200 | 300 | mV | Referred to VCC, VVS > 5.5V | 19 |
| Ramp-Up Time | tVCC | | 1 | 1.5 | ms | CVCC = 2.2 µF, Iload = -5 mA at VCC | 19 |
| Driver Recessive Output Voltage | VBUSrec | 0.9 | | 1 | V | Load1/Load2 (min 0.9 x VVS, max VVS) | 19 |
| Pull-Up Resistor to VS | RLIN | 20 | 30 | 47 | kΩ | The serial diode is mandatory | 19 |
| Voltage Drop at Serial Diodes | VSerDiode | 0.4 | | 1 | V | In pull-up path with RLIN, ISerDiode = 10 mA (Note 3) | 19 |
| LIN Current Limitation | IBUS_LIM | 40 | 120 | 200 | mA | VBUS = VBAT_MAX | 19 |
| Thermal Resistance Virtual Junction to Ambient (SOIC) | RthvJA | | 80 | | K/W | 8-lead SOIC with heat sink at GND (pin 5) on PCB | 23 |
| Thermal Shutdown of VCC Regulator | TVCCoff | 150 | 165 | 180 | °C | | 23 |
| Thermal Shutdown of LIN Output | TLINoff | 150 | 165 | 180 | °C | | 23 |
| Thermal Shutdown Hysteresis | Thys | | 10 | | °C | | 23 |
## CAD (KiCad official)
- Symbol: `ATA663254-GAQW`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files: `ata663254-gaqw-etched.step` / `ata663254-gaqw-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ata663254-gaqw.step` / `ata663254-gaqw.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Microchip Tech datasheet](docs/ata663254-gaqw-datasheet.pdf) (36 pp, sha256 `e6747cb824bd0c87`, retrieved 2026-10-23, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/ata663254-gaqw-datasheet.pdf)