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Name	Last commit message	Last updated
docs	ata6561-gaqw-n: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray	1mo ago
viewers	ata6561-gaqw-n: viewers · Ray	1mo ago
ata6561-gaqw-n-etched.fit.json	ata6561-gaqw-n: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray	1mo ago
ata6561-gaqw-n-etched.glb	ata6561-gaqw-n: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray	1mo ago
ata6561-gaqw-n-etched.step	ata6561-gaqw-n: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray	1mo ago
ata6561-gaqw-n.glb	Publish 0.1.0 · Ray	1mo ago
ata6561-gaqw-n.kicad_mod	Publish 0.1.0 · Ray	1mo ago
ata6561-gaqw-n.kicad_sym	Publish 0.1.0 · Ray	1mo ago
ata6561-gaqw-n.lbr	Publish 0.1.0 · Ray	1mo ago
ata6561-gaqw-n.step	Publish 0.1.0 · Ray	1mo ago
package.json	ata6561-gaqw-n: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) · Ray	28d ago
page.json	ata6561-gaqw-n: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) · Ray	28d ago
README.md	Initial commit: component/ata6561-gaqw-n · Ray	1mo ago

ATA6561-GAQW-N

Microchip Tech · CAN Transceivers · SOIC-8

ATA6561-GAQW-N from Microchip Tech, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	TXD	input	Transmit Data Input; driven low (0V to 0.3×VVIO) to send dominant bit on CAN bus, driven high (0.7×VVIO to VVIO+0.3V) to send recessive bit; internal 20-50 kΩ pull-up to VIO.
2	GND	power_in	Ground Supply; 0V reference for all voltages and analog circuits.
3	VCC	power_in	Supply Voltage; 4.5V to 5.5V nominal operating range for transceiver core and bus drivers.
4	RXD	output	Receive Data Output; outputs low (0.4V, 2-12 mA sink) for CAN bus dominant state, high (VVIO-0.4V, 1-8 mA source) for recessive state.
5	VIO	power_in	Supply Voltage for I/O Level Adapter; 2.8V to 5.5V; adjusts signal levels of TXD, RXD, and STBY pins to microcontroller I/O voltage levels; undervoltage detection threshold 1.3-2.7V.
6	CANL	bidirectional	Low-Level CAN Bus Line; differential pair with CANH, rated -27V to +42V DC (-150V to +100V transient per ISO 7637-2); short-circuit and ESD protected (±8 kV per IEC 61000-4-2).
7	CANH	bidirectional	High-Level CAN Bus Line; differential pair with CANL, rated -27V to +42V DC (-150V to +100V transient per ISO 7637-2); short-circuit and ESD protected (±8 kV per IEC 61000-4-2).
8	STBY	input	Standby Mode Control Input; high level (0.7×VVIO to VVIO+0.3V) selects Standby mode, low level (0V to 0.3×VVIO) selects Normal mode; internal 75-175 kΩ pull-up to VIO.

Key specifications

Parameter	Value
Manufacturer	Microchip Tech
Package	SOIC-8
Category	Interface
Pins	8

CAD (KiCad official)

Symbol: ATA6561-GAQW-N
Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
3D model: SOIC-8 (KiCad packages3D, STEP)
3D model files: ata6561-gaqw-n-etched.step / ata6561-gaqw-n-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ata6561-gaqw-n.step / ata6561-gaqw-n.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Microchip Tech datasheet (28 pp, sha256 dac60589c9c1902e, retrieved 2026-09-18, tier: lcsc)
Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-4-6 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF