component
AT93C86A-10SU-2.7-T
Public Made by Adomby adom
Microchip Tech EEPROM, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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AT93C86A-10SU-2.7-T
Microchip Tech · EEPROM · SOIC-8
AT93C86A-10SU-2.7-T from Microchip Tech, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | CS | input | Chip Select enables the device; a valid instruction starts with a rising edge of CS, and CS held high after a WRITE or ERASE lets DO output the READY/BUSY status. |
| 2 | SK | input | Serial Data Clock; output data changes are synchronized with its rising edges, with fSK up to 2 MHz at 4.5V to 5.5V, 1 MHz at 2.7V to 5.5V, and 0.25 MHz at 1.8V to 5.5V. |
| 3 | DI | input | Serial Data Input receives the start bit, op code, address and data, with DI setup and hold times relative to SK of 100 ns minimum at 2.7V to 5.5V. |
| 4 | DO | tri_state | Serial Data Output returns read data and the READY/BUSY status, and goes to high impedance when CS is low (tDF of 150 ns at 2.7V to 5.5V). |
| 5 | GND | power_in | Ground reference for the device; absolute maximum voltage on any pin is -1.0V to +7.0V with respect to ground. |
| 6 | ORG | input | Internal Organization select: tie to VCC for x16 (1024 x 16) or to ground for x8 (2048 x 8); if left unconnected and not loaded beyond the internal 1 Meg ohm pullup, x16 is selected (not available on 1.8V devices). |
| 7 | DC | unconnected | Don't Connect pin; leave unconnected. |
| 8 | VCC | power_in | Power supply; the -2.7 option operates from 2.7V to 5.5V, with the 4.5V to 5.5V range given separately for ERAL/WRAL, and the absolute maximum operating voltage is 6.25V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | SOIC-8 |
| Category | Memory |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply Voltage | VCC2 | 2.7 | 5.5 | V | 3 | ||
| Supply Voltage | VCC3 | 4.5 | 5.5 | V | 3 | ||
| SK Clock Frequency | fSK | 0 | 1 | MHz | 2.7V ≤ VCC ≤ 5.5V | 4 | |
| SK Clock Frequency | fSK | 0 | 2 | MHz | 4.5V ≤ VCC ≤ 5.5V | 4 | |
| SK High Time | tSKH | 250 | ns | 2.7V ≤ VCC ≤ 5.5V | 4 | ||
| SK Low Time | tSKL | 250 | ns | 2.7V ≤ VCC ≤ 5.5V | 4 | ||
| Minimum CS Low Time | tCS | 250 | ns | 2.7V ≤ VCC ≤ 5.5V | 4 | ||
| CS Setup Time Relative to SK | tCSS | 50 | ns | 2.7V ≤ VCC ≤ 5.5V | 4 | ||
| CS Hold Time Relative to SK | tCSH | 0 | ns | 4 | |||
| DI Setup Time Relative to SK | tDIS | 100 | ns | 2.7V ≤ VCC ≤ 5.5V | 4 | ||
| DI Hold Time Relative to SK | tDIH | 100 | ns | 2.7V ≤ VCC ≤ 5.5V | 4 | ||
| Output Delay to '1' | tPD1 | 250 | ns | AC Test, 2.7V ≤ VCC ≤ 5.5V | 4 | ||
| Output Delay to '0' | tPD0 | 250 | ns | AC Test, 2.7V ≤ VCC ≤ 5.5V | 4 | ||
| CS to Status Valid | tSV | 250 | ns | AC Test, 2.7V ≤ VCC ≤ 5.5V | 4 | ||
| CS to DO in High Impedance | tDF | 150 | ns | AC Test, CS = VIL, 2.7V ≤ VCC ≤ 5.5V | 4 | ||
| Write Cycle Time | tWP | 10 | ms | 4 | |||
| Write Cycle Time | tWP | 4 | ms | 4.5V ≤ VCC ≤ 5.5V | 4 | ||
| Supply Current READ | ICC | 0.5 | 2 | mA | VCC = 5.0V, READ at 1.0 MHz | 3 | |
| Supply Current WRITE | ICC | 0.5 | 2 | mA | VCC = 5.0V, WRITE at 1.0 MHz | 3 | |
| Standby Current | ISB2 | 6 | 10 | µA | VCC = 2.7V, CS = 0V | 3 | |
| Standby Current | ISB3 | 17 | 30 | µA | VCC = 5.0V, CS = 0V | 3 | |
| Input Leakage | IIL | 0.1 | 3 | µA | VIN = 0V to VCC | 3 | |
| Output Leakage | IOL | 0.1 | 3 | µA | VIN = 0V to VCC | 3 | |
| Input Low Voltage | VIL1 | -0.6 | 0.8 | V | 2.7V ≤ VCC ≤ 5.5V | 3 | |
| Input High Voltage | VIH1 | 2 | V | 2.7V ≤ VCC ≤ 5.5V | 3 | ||
| Output Low Voltage | VOL1 | 0.4 | V | 2.7V ≤ VCC ≤ 5.5V, IOL = 2.1 mA | 3 | ||
| Output High Voltage | VOH1 | 2.4 | V | 2.7V ≤ VCC ≤ 5.5V, IOH = -0.4 mA | 3 | ||
| Output Capacitance (DO) | COUT | 5 | pF | VOUT = 0V; TA = 25°C, f = 1.0 MHz, VCC = +5.0V | 3 | ||
| Input Capacitance (CS, SK, DI) | CIN | 5 | pF | VIN = 0V; TA = 25°C, f = 1.0 MHz, VCC = +5.0V | 3 | ||
| Operating Temperature | -55 | 125 | °C | 2 | |||
| Storage Temperature | -65 | 150 | °C | 2 | |||
| Voltage on any Pin with Respect to Ground | -1 | 7 | V | 2 | |||
| Maximum Operating Voltage | 6.25 | V | 2 | ||||
| DC Output Current | 5 | mA | 2 | ||||
| Industrial Operating Temperature (TAI) | TAI | -40 | 85 | °C | Industrial grade, SU ordering option | 3 |
CAD (KiCad official)
- Symbol:
AT93C86A-10SU-2.7-T - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
at93c86a-10su-2-7-t-etched.step/at93c86a-10su-2-7-t-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);at93c86a-10su-2-7-t.step/at93c86a-10su-2-7-t.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Microchip Tech datasheet (17 pp, sha256
e5f4a84b592a507c, retrieved 2026-10-19, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# AT93C86A-10SU-2.7-T
**Microchip Tech** · EEPROM · SOIC-8
AT93C86A-10SU-2.7-T from Microchip Tech, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | CS | input | Chip Select enables the device; a valid instruction starts with a rising edge of CS, and CS held high after a WRITE or ERASE lets DO output the READY/BUSY status. |
| 2 | SK | input | Serial Data Clock; output data changes are synchronized with its rising edges, with fSK up to 2 MHz at 4.5V to 5.5V, 1 MHz at 2.7V to 5.5V, and 0.25 MHz at 1.8V to 5.5V. |
| 3 | DI | input | Serial Data Input receives the start bit, op code, address and data, with DI setup and hold times relative to SK of 100 ns minimum at 2.7V to 5.5V. |
| 4 | DO | tri_state | Serial Data Output returns read data and the READY/BUSY status, and goes to high impedance when CS is low (tDF of 150 ns at 2.7V to 5.5V). |
| 5 | GND | power_in | Ground reference for the device; absolute maximum voltage on any pin is -1.0V to +7.0V with respect to ground. |
| 6 | ORG | input | Internal Organization select: tie to VCC for x16 (1024 x 16) or to ground for x8 (2048 x 8); if left unconnected and not loaded beyond the internal 1 Meg ohm pullup, x16 is selected (not available on 1.8V devices). |
| 7 | DC | unconnected | Don't Connect pin; leave unconnected. |
| 8 | VCC | power_in | Power supply; the -2.7 option operates from 2.7V to 5.5V, with the 4.5V to 5.5V range given separately for ERAL/WRAL, and the absolute maximum operating voltage is 6.25V. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | SOIC-8 |
| Category | Memory |
| Pins | 8 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply Voltage | VCC2 | 2.7 | | 5.5 | V | | 3 |
| Supply Voltage | VCC3 | 4.5 | | 5.5 | V | | 3 |
| SK Clock Frequency | fSK | 0 | | 1 | MHz | 2.7V ≤ VCC ≤ 5.5V | 4 |
| SK Clock Frequency | fSK | 0 | | 2 | MHz | 4.5V ≤ VCC ≤ 5.5V | 4 |
| SK High Time | tSKH | 250 | | | ns | 2.7V ≤ VCC ≤ 5.5V | 4 |
| SK Low Time | tSKL | 250 | | | ns | 2.7V ≤ VCC ≤ 5.5V | 4 |
| Minimum CS Low Time | tCS | 250 | | | ns | 2.7V ≤ VCC ≤ 5.5V | 4 |
| CS Setup Time Relative to SK | tCSS | 50 | | | ns | 2.7V ≤ VCC ≤ 5.5V | 4 |
| CS Hold Time Relative to SK | tCSH | 0 | | | ns | | 4 |
| DI Setup Time Relative to SK | tDIS | 100 | | | ns | 2.7V ≤ VCC ≤ 5.5V | 4 |
| DI Hold Time Relative to SK | tDIH | 100 | | | ns | 2.7V ≤ VCC ≤ 5.5V | 4 |
| Output Delay to '1' | tPD1 | | | 250 | ns | AC Test, 2.7V ≤ VCC ≤ 5.5V | 4 |
| Output Delay to '0' | tPD0 | | | 250 | ns | AC Test, 2.7V ≤ VCC ≤ 5.5V | 4 |
| CS to Status Valid | tSV | | | 250 | ns | AC Test, 2.7V ≤ VCC ≤ 5.5V | 4 |
| CS to DO in High Impedance | tDF | | | 150 | ns | AC Test, CS = VIL, 2.7V ≤ VCC ≤ 5.5V | 4 |
| Write Cycle Time | tWP | | | 10 | ms | | 4 |
| Write Cycle Time | tWP | | | 4 | ms | 4.5V ≤ VCC ≤ 5.5V | 4 |
| Supply Current READ | ICC | | 0.5 | 2 | mA | VCC = 5.0V, READ at 1.0 MHz | 3 |
| Supply Current WRITE | ICC | | 0.5 | 2 | mA | VCC = 5.0V, WRITE at 1.0 MHz | 3 |
| Standby Current | ISB2 | | 6 | 10 | µA | VCC = 2.7V, CS = 0V | 3 |
| Standby Current | ISB3 | | 17 | 30 | µA | VCC = 5.0V, CS = 0V | 3 |
| Input Leakage | IIL | | 0.1 | 3 | µA | VIN = 0V to VCC | 3 |
| Output Leakage | IOL | | 0.1 | 3 | µA | VIN = 0V to VCC | 3 |
| Input Low Voltage | VIL1 | -0.6 | | 0.8 | V | 2.7V ≤ VCC ≤ 5.5V | 3 |
| Input High Voltage | VIH1 | 2 | | | V | 2.7V ≤ VCC ≤ 5.5V | 3 |
| Output Low Voltage | VOL1 | | | 0.4 | V | 2.7V ≤ VCC ≤ 5.5V, IOL = 2.1 mA | 3 |
| Output High Voltage | VOH1 | 2.4 | | | V | 2.7V ≤ VCC ≤ 5.5V, IOH = -0.4 mA | 3 |
| Output Capacitance (DO) | COUT | | | 5 | pF | VOUT = 0V; TA = 25°C, f = 1.0 MHz, VCC = +5.0V | 3 |
| Input Capacitance (CS, SK, DI) | CIN | | | 5 | pF | VIN = 0V; TA = 25°C, f = 1.0 MHz, VCC = +5.0V | 3 |
| Operating Temperature | | -55 | | 125 | °C | | 2 |
| Storage Temperature | | -65 | | 150 | °C | | 2 |
| Voltage on any Pin with Respect to Ground | | -1 | | 7 | V | | 2 |
| Maximum Operating Voltage | | | | 6.25 | V | | 2 |
| DC Output Current | | | | 5 | mA | | 2 |
| Industrial Operating Temperature (TAI) | TAI | -40 | | 85 | °C | Industrial grade, SU ordering option | 3 |
## CAD (KiCad official)
- Symbol: `AT93C86A-10SU-2.7-T`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files: `at93c86a-10su-2-7-t-etched.step` / `at93c86a-10su-2-7-t-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `at93c86a-10su-2-7-t.step` / `at93c86a-10su-2-7-t.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Microchip Tech datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8579712417074909184) (17 pp, sha256 `e5f4a84b592a507c`, retrieved 2026-10-19, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/at93c86a-10su-2-7-t-datasheet.pdf)