main
Download ZIP Propose a change
Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 3d ago
viewers at93c56n: viewers · Ray 3d ago
at93c56n-etched.glb Publish 0.1.0 · Ray 3d ago
at93c56n-etched.step at93c56n: factory component page (tier=lcsc) · Ray 3d ago
at93c56n-hero.glb at93c56n: hero GLB from the etched model (keeps the MPN mark) · Ray 3d ago
at93c56n-hero.overlay.json Publish 0.1.0 · Ray 3d ago
at93c56n.glb Publish 0.1.0 · Ray 3d ago
at93c56n.kicad_mod Publish 0.1.0 · Ray 3d ago
at93c56n.kicad_sym Publish 0.1.0 · Ray 3d ago
at93c56n.lbr Publish 0.1.0 · Ray 3d ago
at93c56n.step Publish 0.1.0 · Ray 3d ago
package.json Publish 0.1.0 · Ray 3d ago
page.json Set visibility: public · Ray 3d ago
README.md Publish 0.1.0 · Ray 3d ago

AT93C56N

HGSEMI · EEPROM · DIP-8

AT93C56N from HGSEMI, in a DIP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 CS input Chip Select; must be pulled high before issuing a command on DI, and pulled low for a minimum of 250 ns (tCS) before polling Ready/Busy.
2 SK input Serial Data Clock used with DI to clock instructions in, with clock frequency up to 2 MHz at 4.5V to 5.5V.
3 DI input Serial Data Input for the start bit, op code, address and write data, clocked in with SK while CS is high.
4 DO output Serial Data Output that shifts out read data and indicates Ready/Busy status, going high impedance when CS is low.
5 GND power_in Ground.
6 ORG input Internal Organization select: connect to Vcc for x16 mode, or ground for x8 mode.
7 NC unconnected No Connect.
8 Vcc power_in Power Supply, operating range 1.8V to 5.5V.

Key specifications

Parameter Value
Manufacturer HGSEMI
Package DIP-8
Category Memory
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Operating Temperature -40 85 ºC 3
Storage Temperature -65 150 ºC 3
Voltage on Any Pin with Respect to Ground -1 V Max printed as VCC + 7.0V 3
Maximum Operating Voltage 6.25 V 3
DC Output Current 5 mA 3
Lead Temperature (Soldering, 10 seconds) 260 ºC Soldering, 10 seconds 3
Supply Voltage VCC1 1.8 5.5 V 4
Supply Voltage VCC2 2.7 5.5 V 4
Supply Voltage VCC3 4.5 5.5 V 4
Supply Current READ ICC 0.5 2 mA VCC=5.0V READ at 1 MHz 4
Supply Current WRITE ICC 0.5 2 mA VCC=5.0V WRITE at 1 MHz 4
Standby Current ISB1 0 0.1 μA VCC=1.8V CS=0V 4
Standby Current ISB2 6 10 μA VCC=2.7V CS=0V 4
Standby Current ISB3 17 3 μA VCC=5.0V CS=0V 4
Input Leakage Current ILI 0.1 3 μA VIN=0V to VCC 4
Output Leakage Current ILO 0.1 3 μA VIN=0V to VCC 4
Input Low Level VIL1 -0.6 0.8 V 2.7V<VCC<5.5V 4
Input High Level VIH1 2 V 2.7V<VCC<5.5V; max printed as VCC+1 4
Input Low Level VIL2 -0.6 V 1.8V<VCC<2.7V; max printed as VCC×0.3 4
Output Low Level VOL1 0.4 V 2.7V<VCC<5.5V; IOL=2.1mA 4
Output High Level VOH1 2.4 V 2.7V<VCC<5.5V; IOH=-0.4mA 4
Output Low Level VOL2 0.2 V 1.8V<VCC<0.7V; IOL=0.15mA 4
Output Capacitance (DO) COUT 5 pF VOUT = 0V 4
Input Capacitance (CK, SK, DI) CIN 5 pF VIN = 0V 4
Clock Frequency, SK fSK 0 2 MHz 4.5V < VCC < 5.5V 5
Clock Frequency, SK fSK 0 1 MHz 2.7V < VCC < 5.5V 5
Clock Frequency, SK fSK 0 0.25 MHz 1.8V < VCC < 5.5V 5
SK High Time tSKH 250 ns 4.5V < VCC < 5.5V 5
SK High Time tSKH 1000 ns 1.8V < VCC < 5.5V 5
SK Low Time tSKL 250 ns 4.5V < VCC < 5.5V 5
SK Low Time tSKL 1000 ns 1.8V < VCC < 5.5V 5
Minimum CS Low Time tCS 250 ns 4.5V < VCC < 5.5V 5
Minimum CS Low Time tCS 1000 ns 1.8V < VCC < 5.5V 5
CS Setup Time Relative to SK tCSS 50 ns 4.5V < VCC < 5.5V 5
CS Setup Time Relative to SK tCSS 200 ns 1.8V < VCC < 5.5V 5
DI Setup Time Relative to SK tDIS 100 ns 4.5V < VCC < 5.5V 5
DI Setup Time Relative to SK tDIS 400 ns 1.8V < VCC < 5.5V 5
CS Hold Time Relative to SK tCSH 0 ns 5
DI Hold Time Relative to SK tDIH 100 ns 4.5V < VCC < 5.5V 5
DI Hold Time Relative to SK tDIH 400 ns 1.8V < VCC < 5.5V 5
Output Delay to "1" AC Test tPD1 250 ns 4.5V < VCC < 5.5V 5
Output Delay to "1" AC Test tPD1 1000 ns 1.8V < VCC < 5.5V 5
Output Delay to "0" AC Test tPD0 250 ns 4.5V < VCC < 5.5V 5
Output Delay to "0" AC Test tPD0 1000 ns 1.8V < VCC < 5.5V 5
CS to Status Valid tSV 250 ns AC Test; 4.5V < VCC < 5.5V 5
CS to Status Valid tSV 1000 ns AC Test; 1.8V < VCC < 5.5V 5
CS to DO in High Impedance tDF 100 ns AC Test, CS = VIL; 4.5V < VCC < 5.5V 5
CS to DO in High Impedance tDF 400 ns AC Test, CS = VIL; 1.8V < VCC < 5.5V 5
Write Cycle Time tWP 3 10 ms 4.5V < VCC < 5.5V 5

CAD (KiCad official)

  • Symbol: AT93C56N
  • Footprint: Package_DIP:DIP-8_W7.62mm
  • 3D model: DIP-8 (KiCad packages3D, STEP)
  • 3D model files: at93c56n-etched.step / at93c56n-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); at93c56n.step / at93c56n.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: HGSEMI datasheet (15 pp, sha256 2c0eab4bbc7b6f6e, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF