component
AT93C56B-SSHM-B
Public Made by Adomby adom
Microchip Tech EEPROM, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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AT93C56B-SSHM-B
Microchip Tech · EEPROM · SOIC-8
AT93C56B-SSHM-B from Microchip Tech, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | CS | input | Chip Select; the device is selected when CS is high, and when deselected DI data is not accepted and DO is high-impedance. |
| 2 | SK | input | Serial Data Clock that synchronizes communication; DI is latched on the rising edge of SK and DO is clocked out on the rising edge of SK. |
| 3 | DI | input | Serial Data Input used to receive instructions, addresses and data, latched on the rising edge of SK. |
| 4 | DO | tri_state | Serial Data Output that shifts data out after the rising edge of SK during a read, outputs Ready/Busy status after an erase or write when CS is brought high, and is high-impedance when the device is not selected. |
| 5 | GND | power_in | Ground reference for the power supply, to be connected to system ground. |
| 6 | ORG | input | Internal Organization select: tied to VCC selects x16, tied to VSS selects x8, and left unconnected selects x16 via an internal pull-up resistor. |
| 7 | NC | unconnected | No Connect. |
| 8 | VCC | power_in | Device power supply pin, operating range 1.7V to 5.5V; operation at invalid VCC voltages should not be attempted. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | SOIC-8 |
| Category | Memory |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Temperature under bias | -55 | 125 | °C | 8 | |||
| Storage temperature | -65 | 150 | °C | 8 | |||
| Supply voltage VCC | VCC | 6.25 | V | 8 | |||
| Voltage on any pin with respect to ground | -1 | 7 | V | 8 | |||
| DC output current | 5 | mA | 8 | ||||
| Operating temperature (case), industrial | -40 | 85 | °C | Industrial Temperature Range | 8 | ||
| VCC power supply, low-voltage grade | VCC | 1.7 | 5.5 | V | Low-Voltage Grade | 8 | |
| Supply Voltage | VCC1 | 1.7 | 5.5 | V | 8 | ||
| Supply Voltage | VCC2 | 2.5 | 5.5 | V | 8 | ||
| Supply Voltage | VCC3 | 4.5 | 5.5 | V | 8 | ||
| Supply Current (Read) | ICC1 | 0.5 | 2 | mA | VCC = 5.0V, Read at 1 MHz | 8 | |
| Supply Current (Write) | ICC2 | 0.5 | 2 | mA | VCC = 5.0V, Write at 1 MHz | 8 | |
| Standby Current (1.7V Option) | ISB1 | 0.4 | 1 | μA | VCC = 1.7V, CS = 0V | 8 | |
| Standby Current (2.5V Option) | ISB2 | 6 | 10 | μA | VCC = 2.5V, CS = 0V | 8 | |
| Standby Current (5.0V Option) | ISB3 | 10 | 15 | μA | VCC = 5.0V, CS = 0V | 8 | |
| Input Leakage Current | IIL | 0.1 | 3 | μA | VIN = 0 to VCC | 8 | |
| Output Leakage Current | ILO | 0.1 | 3 | μA | VIN = 0 to VCC | 8 | |
| Input Low-Voltage | VIL1 | -0.6 | 0.8 | V | 2.5V ≤ VCC ≤ 5.5V (Note 2) | 8 | |
| Input High-Voltage | VIH1 | 2 | V | 2.5V ≤ VCC ≤ 5.5V (Note 2); max is VCC + 1 | 9 | ||
| Input Low-Voltage | VIL2 | -0.6 | V | 1.7V ≤ VCC ≤ 2.5V (Note 2); max is VCC x 0.3 | 9 | ||
| Output Low-Voltage | VOL1 | 0.4 | V | 2.5V ≤ VCC ≤ 5.5V, IOL = 2.1 mA | 9 | ||
| Output High-Voltage | VOH1 | 2.4 | V | 2.5V ≤ VCC ≤ 5.5V, IOH = -0.4 mA | 9 | ||
| Output Low-Voltage | VOL2 | 0.2 | V | 1.7V ≤ VCC ≤ 2.5V, IOL = 0.15 mA | 9 | ||
| Clock Frequency, SK | fSK | 0 | 2 | MHz | 4.5V ≤ VCC ≤ 5.5V | 9 | |
| Clock Frequency, SK | fSK | 0 | 1 | MHz | 2.5V ≤ VCC ≤ 5.5V | 9 | |
| Clock Frequency, SK | fSK | 0 | 250 | kHz | 1.7V ≤ VCC ≤ 5.5V | 9 | |
| High Time, SK | tSKH | 250 | ns | 2.5V ≤ VCC ≤ 5.5V | 9 | ||
| High Time, SK | tSKH | 1000 | ns | 1.7V ≤ VCC ≤ 5.5V | 9 | ||
| Low Time, SK | tSKL | 250 | ns | 2.5V ≤ VCC ≤ 5.5V | 9 | ||
| Low Time, SK | tSKL | 1000 | ns | 1.7V ≤ VCC ≤ 5.5V | 9 | ||
| Minimum CS Low Time | tCS | 250 | ns | 2.5V ≤ VCC ≤ 5.5V | 9 | ||
| Minimum CS Low Time | tCS | 1000 | ns | 1.7V ≤ VCC ≤ 5.5V | 9 | ||
| CS Setup Time | tCSS | 50 | ns | 2.5V ≤ VCC ≤ 5.5V, Relative to SK | 9 | ||
| CS Setup Time | tCSS | 200 | ns | 1.7V ≤ VCC ≤ 5.5V, Relative to SK | 9 | ||
| DI Setup Time | tDIS | 100 | ns | 2.5V ≤ VCC ≤ 5.5V, Relative to SK | 9 | ||
| DI Setup Time | tDIS | 400 | ns | 1.7V ≤ VCC ≤ 5.5V, Relative to SK | 9 | ||
| CS Hold Time | tCSH | 0 | ns | Relative to SK | 9 | ||
| DI Hold Time | tDIH | 100 | ns | 2.5V ≤ VCC ≤ 5.5V, Relative to SK | 10 | ||
| DI Hold Time | tDIH | 400 | ns | 1.7V ≤ VCC ≤ 5.5V, Relative to SK | 10 | ||
| Output Delay to 1 | tPD1 | 250 | ns | 2.5V ≤ VCC ≤ 5.5V | 10 | ||
| Output Delay to 1 | tPD1 | 1000 | ns | 1.7V ≤ VCC ≤ 5.5V | 10 | ||
| Output Delay to 0 | tPD0 | 250 | ns | 2.5V ≤ VCC ≤ 5.5V | 10 | ||
| Output Delay to 0 | tPD0 | 1000 | ns | 1.7V ≤ VCC ≤ 5.5V | 10 | ||
| CS to Status Valid | tSV | 250 | ns | 2.5V ≤ VCC ≤ 5.5V | 10 | ||
| CS to Status Valid | tSV | 1000 | ns | 1.7V ≤ VCC ≤ 5.5V | 10 | ||
| CS to DO in High-impedance | tDF | 150 | ns | 2.5V ≤ VCC ≤ 5.5V, CS = VIL | 10 | ||
| CS to DO in High-impedance | tDF | 400 | ns | 1.7V ≤ VCC ≤ 5.5V, CS = VIL | 10 | ||
| Write Cycle Time | tWP | 0.1 | 3 | 5 | ms | 1.7V ≤ VCC ≤ 5.5V | 10 |
| Time required after VCC is stable before the device can accept commands | tPUP | 100 | µs | 11 | |||
| Power-on Reset Threshold Voltage | VPOR | 1.5 | V | 11 | |||
| Minimum time at VCC = 0V between power cycles | tPOFF | 500 | ms | 11 | |||
| Output Capacitance (DO) | COUT | 5 | pF | VOUT = 0V | 11 | ||
| Input Capacitance (CS, SK, DI, ORG) | CIN | 5 | pF | VIN = 0V | 11 | ||
| Write Endurance | 1e+06 | Write Cycles | TA = 25°C, VCC = 5.0V | 11 | |||
| Data Retention | 100 | Years | TA = 55°C | 11 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | tin | 8-Lead Plastic Small Outline (SN) - Narrow, 3.90 mm (.150 In.) Body [SOIC] © 2017 Microchip Technology Inc. | 18 |
CAD (KiCad official)
- Symbol:
AT93C56B-SSHM-B - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
at93c56b-sshm-b-etched.step/at93c56b-sshm-b-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);at93c56b-sshm-b.step/at93c56b-sshm-b.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Microchip Tech datasheet (33 pp, sha256
3018fd0d50d62eec, retrieved 2026-10-23, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# AT93C56B-SSHM-B
**Microchip Tech** · EEPROM · SOIC-8
AT93C56B-SSHM-B from Microchip Tech, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | CS | input | Chip Select; the device is selected when CS is high, and when deselected DI data is not accepted and DO is high-impedance. |
| 2 | SK | input | Serial Data Clock that synchronizes communication; DI is latched on the rising edge of SK and DO is clocked out on the rising edge of SK. |
| 3 | DI | input | Serial Data Input used to receive instructions, addresses and data, latched on the rising edge of SK. |
| 4 | DO | tri_state | Serial Data Output that shifts data out after the rising edge of SK during a read, outputs Ready/Busy status after an erase or write when CS is brought high, and is high-impedance when the device is not selected. |
| 5 | GND | power_in | Ground reference for the power supply, to be connected to system ground. |
| 6 | ORG | input | Internal Organization select: tied to VCC selects x16, tied to VSS selects x8, and left unconnected selects x16 via an internal pull-up resistor. |
| 7 | NC | unconnected | No Connect. |
| 8 | VCC | power_in | Device power supply pin, operating range 1.7V to 5.5V; operation at invalid VCC voltages should not be attempted. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | SOIC-8 |
| Category | Memory |
| Pins | 8 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Temperature under bias | | -55 | | 125 | °C | | 8 |
| Storage temperature | | -65 | | 150 | °C | | 8 |
| Supply voltage VCC | VCC | | | 6.25 | V | | 8 |
| Voltage on any pin with respect to ground | | -1 | | 7 | V | | 8 |
| DC output current | | | | 5 | mA | | 8 |
| Operating temperature (case), industrial | | -40 | | 85 | °C | Industrial Temperature Range | 8 |
| VCC power supply, low-voltage grade | VCC | 1.7 | | 5.5 | V | Low-Voltage Grade | 8 |
| Supply Voltage | VCC1 | 1.7 | | 5.5 | V | | 8 |
| Supply Voltage | VCC2 | 2.5 | | 5.5 | V | | 8 |
| Supply Voltage | VCC3 | 4.5 | | 5.5 | V | | 8 |
| Supply Current (Read) | ICC1 | | 0.5 | 2 | mA | VCC = 5.0V, Read at 1 MHz | 8 |
| Supply Current (Write) | ICC2 | | 0.5 | 2 | mA | VCC = 5.0V, Write at 1 MHz | 8 |
| Standby Current (1.7V Option) | ISB1 | | 0.4 | 1 | μA | VCC = 1.7V, CS = 0V | 8 |
| Standby Current (2.5V Option) | ISB2 | | 6 | 10 | μA | VCC = 2.5V, CS = 0V | 8 |
| Standby Current (5.0V Option) | ISB3 | | 10 | 15 | μA | VCC = 5.0V, CS = 0V | 8 |
| Input Leakage Current | IIL | | 0.1 | 3 | μA | VIN = 0 to VCC | 8 |
| Output Leakage Current | ILO | | 0.1 | 3 | μA | VIN = 0 to VCC | 8 |
| Input Low-Voltage | VIL1 | -0.6 | | 0.8 | V | 2.5V ≤ VCC ≤ 5.5V (Note 2) | 8 |
| Input High-Voltage | VIH1 | 2 | | | V | 2.5V ≤ VCC ≤ 5.5V (Note 2); max is VCC + 1 | 9 |
| Input Low-Voltage | VIL2 | -0.6 | | | V | 1.7V ≤ VCC ≤ 2.5V (Note 2); max is VCC x 0.3 | 9 |
| Output Low-Voltage | VOL1 | | | 0.4 | V | 2.5V ≤ VCC ≤ 5.5V, IOL = 2.1 mA | 9 |
| Output High-Voltage | VOH1 | 2.4 | | | V | 2.5V ≤ VCC ≤ 5.5V, IOH = -0.4 mA | 9 |
| Output Low-Voltage | VOL2 | | | 0.2 | V | 1.7V ≤ VCC ≤ 2.5V, IOL = 0.15 mA | 9 |
| Clock Frequency, SK | fSK | 0 | | 2 | MHz | 4.5V ≤ VCC ≤ 5.5V | 9 |
| Clock Frequency, SK | fSK | 0 | | 1 | MHz | 2.5V ≤ VCC ≤ 5.5V | 9 |
| Clock Frequency, SK | fSK | 0 | | 250 | kHz | 1.7V ≤ VCC ≤ 5.5V | 9 |
| High Time, SK | tSKH | 250 | | | ns | 2.5V ≤ VCC ≤ 5.5V | 9 |
| High Time, SK | tSKH | 1000 | | | ns | 1.7V ≤ VCC ≤ 5.5V | 9 |
| Low Time, SK | tSKL | 250 | | | ns | 2.5V ≤ VCC ≤ 5.5V | 9 |
| Low Time, SK | tSKL | 1000 | | | ns | 1.7V ≤ VCC ≤ 5.5V | 9 |
| Minimum CS Low Time | tCS | 250 | | | ns | 2.5V ≤ VCC ≤ 5.5V | 9 |
| Minimum CS Low Time | tCS | 1000 | | | ns | 1.7V ≤ VCC ≤ 5.5V | 9 |
| CS Setup Time | tCSS | 50 | | | ns | 2.5V ≤ VCC ≤ 5.5V, Relative to SK | 9 |
| CS Setup Time | tCSS | 200 | | | ns | 1.7V ≤ VCC ≤ 5.5V, Relative to SK | 9 |
| DI Setup Time | tDIS | 100 | | | ns | 2.5V ≤ VCC ≤ 5.5V, Relative to SK | 9 |
| DI Setup Time | tDIS | 400 | | | ns | 1.7V ≤ VCC ≤ 5.5V, Relative to SK | 9 |
| CS Hold Time | tCSH | 0 | | | ns | Relative to SK | 9 |
| DI Hold Time | tDIH | 100 | | | ns | 2.5V ≤ VCC ≤ 5.5V, Relative to SK | 10 |
| DI Hold Time | tDIH | 400 | | | ns | 1.7V ≤ VCC ≤ 5.5V, Relative to SK | 10 |
| Output Delay to 1 | tPD1 | | | 250 | ns | 2.5V ≤ VCC ≤ 5.5V | 10 |
| Output Delay to 1 | tPD1 | | | 1000 | ns | 1.7V ≤ VCC ≤ 5.5V | 10 |
| Output Delay to 0 | tPD0 | | | 250 | ns | 2.5V ≤ VCC ≤ 5.5V | 10 |
| Output Delay to 0 | tPD0 | | | 1000 | ns | 1.7V ≤ VCC ≤ 5.5V | 10 |
| CS to Status Valid | tSV | | | 250 | ns | 2.5V ≤ VCC ≤ 5.5V | 10 |
| CS to Status Valid | tSV | | | 1000 | ns | 1.7V ≤ VCC ≤ 5.5V | 10 |
| CS to DO in High-impedance | tDF | | | 150 | ns | 2.5V ≤ VCC ≤ 5.5V, CS = VIL | 10 |
| CS to DO in High-impedance | tDF | | | 400 | ns | 1.7V ≤ VCC ≤ 5.5V, CS = VIL | 10 |
| Write Cycle Time | tWP | 0.1 | 3 | 5 | ms | 1.7V ≤ VCC ≤ 5.5V | 10 |
| Time required after VCC is stable before the device can accept commands | tPUP | 100 | | | µs | | 11 |
| Power-on Reset Threshold Voltage | VPOR | | | 1.5 | V | | 11 |
| Minimum time at VCC = 0V between power cycles | tPOFF | 500 | | | ms | | 11 |
| Output Capacitance (DO) | COUT | | | 5 | pF | VOUT = 0V | 11 |
| Input Capacitance (CS, SK, DI, ORG) | CIN | | | 5 | pF | VIN = 0V | 11 |
| Write Endurance | | 1e+06 | | | Write Cycles | TA = 25°C, VCC = 5.0V | 11 |
| Data Retention | | 100 | | | Years | TA = 55°C | 11 |
## Materials and finish
As the datasheet states them (page.json `metadata.appearance`; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | | tin | 8-Lead Plastic Small Outline (SN) - Narrow, 3.90 mm (.150 In.) Body [SOIC] © 2017 Microchip Technology Inc. | 18 |
## CAD (KiCad official)
- Symbol: `AT93C56B-SSHM-B`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files: `at93c56b-sshm-b-etched.step` / `at93c56b-sshm-b-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `at93c56b-sshm-b.step` / `at93c56b-sshm-b.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Microchip Tech datasheet](docs/at93c56b-sshm-b-datasheet.pdf) (33 pp, sha256 `3018fd0d50d62eec`, retrieved 2026-10-23, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/at93c56b-sshm-b-datasheet.pdf)