component
AT91SAM9G45C-CU-999
Public Made by Adomby adom
Microchip Tech Microcontroller Units (MCUs/MPUs/SOCs), TFBGA-324. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
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<pin name="VDDUTMIC" x="17.78" y="157.48" length="middle" direction="pwr" rot="R180"/>
<pin name="GNDUTMI" x="17.78" y="154.94" length="middle" direction="pwr" rot="R180"/>
<pin name="HHSDMB/DHSDM" x="17.78" y="152.4" length="middle" direction="io" rot="R180"/>
<pin name="HHSDPB/DHSDP" x="17.78" y="149.86" length="middle" direction="io" rot="R180"/>
<pin name="PB26" x="17.78" y="147.32" length="middle" direction="io" rot="R180"/>
<pin name="PB10" x="17.78" y="144.78" length="middle" direction="io" rot="R180"/>
<pin name="GNDOSC" x="17.78" y="142.24" length="middle" direction="pwr" rot="R180"/>
<pin name="VDDOSC" x="17.78" y="139.7" length="middle" direction="pwr" rot="R180"/>
<pin name="TCK" x="17.78" y="137.16" length="middle" direction="in" rot="R180"/>
<pin name="PD14" x="17.78" y="134.62" length="middle" direction="io" rot="R180"/>
<pin name="PD10" x="17.78" y="132.08" length="middle" direction="io" rot="R180"/>
<pin name="PD7" x="17.78" y="129.54" length="middle" direction="io" rot="R180"/>
<pin name="PB17" x="17.78" y="127" length="middle" direction="io" rot="R180"/>
<pin name="PB7" x="17.78" y="124.46" length="middle" direction="io" rot="R180"/>
<pin name="PB3" x="17.78" y="121.92" length="middle" direction="io" rot="R180"/>
<pin name="PA28" x="17.78" y="119.38" length="middle" direction="io" rot="R180"/>
<pin name="PA29" x="17.78" y="116.84" length="middle" direction="io" rot="R180"/>
<pin name="PA27" x="17.78" y="114.3" length="middle" direction="io" rot="R180"/>
<pin name="HFSDPA" x="17.78" y="111.76" length="middle" direction="io" rot="R180"/>
<pin name="HHSDPA" x="17.78" y="109.22" length="middle" direction="io" rot="R180"/>
<pin name="PB23" x="17.78" y="106.68" length="middle" direction="io" rot="R180"/>
<pin name="PB21" x="17.78" y="104.14" length="middle" direction="io" rot="R180"/>
<pin name="DDR_D2" x="17.78" y="101.6" length="middle" direction="io" rot="R180"/>
<pin name="PB30" x="17.78" y="99.06" length="middle" direction="io" rot="R180"/>
<pin name="PB8" x="17.78" y="96.52" length="middle" direction="io" rot="R180"/>
<pin name="BMS" x="17.78" y="93.98" length="middle" direction="in" rot="R180"/>
<pin name="PD30" x="17.78" y="91.44" length="middle" direction="io" rot="R180"/>
<pin name="PD19" x="17.78" y="88.9" length="middle" direction="io" rot="R180"/>
<pin name="PD11" x="17.78" y="86.36" length="middle" direction="io" rot="R180"/>
<pin name="PD1" x="17.78" y="83.82" length="middle" direction="io" rot="R180"/>
<pin name="PB16" x="17.78" y="81.28" length="middle" direction="io" rot="R180"/>
<pin name="PB6" x="17.78" y="78.74" length="middle" direction="io" rot="R180"/>
<pin name="PB0" x="17.78" y="76.2" length="middle" direction="io" rot="R180"/>
<pin name="PA26" x="17.78" y="73.66" length="middle" direction="io" rot="R180"/>
<pin name="PA25" x="17.78" y="71.12" length="middle" direction="io" rot="R180"/>
<pin name="PA22" x="17.78" y="68.58" length="middle" direction="io" rot="R180"/>
<pin name="HFSDMA" x="17.78" y="66.04" length="middle" direction="io" rot="R180"/>
<pin name="HHSDMA" x="17.78" y="63.5" length="middle" direction="io" rot="R180"/>
<pin name="DDR_D0" x="17.78" y="60.96" length="middle" direction="io" rot="R180"/>
<pin name="DDR_D1" x="17.78" y="58.42" length="middle" direction="io" rot="R180"/>
<pin name="DDR_D6" x="17.78" y="55.88" length="middle" direction="io" rot="R180"/>
<pin name="PB29" x="17.78" y="53.34" length="middle" direction="io" rot="R180"/>
<pin name="PB22" x="17.78" y="50.8" length="middle" direction="io" rot="R180"/>
<pin name="RTCK" x="17.78" y="48.26" length="middle" direction="out" rot="R180"/>
<pin name="TDI" x="17.78" y="45.72" length="middle" direction="in" rot="R180"/>
<pin name="PD18" x="17.78" y="43.18" length="middle" direction="io" rot="R180"/>
<pin name="PD9" x="17.78" y="40.64" length="middle" direction="io" rot="R180"/>
<pin name="PD0" x="17.78" y="38.1" length="middle" direction="io" rot="R180"/>
<pin name="PB13" x="17.78" y="35.56" length="middle" direction="io" rot="R180"/>
<pin name="PB4" x="17.78" y="33.02" length="middle" direction="io" rot="R180"/>
<pin name="PA30" x="17.78" y="30.48" length="middle" direction="io" rot="R180"/>
<pin name="PA24" x="17.78" y="27.94" length="middle" direction="io" rot="R180"/>
<pin name="PA20" x="17.78" y="25.4" length="middle" direction="io" rot="R180"/>
<pin name="PA18" x="17.78" y="22.86" length="middle" direction="io" rot="R180"/>
<pin name="DDR_D10" x="17.78" y="20.32" length="middle" direction="io" rot="R180"/>
<pin name="DDR_D5" x="17.78" y="17.78" length="middle" direction="io" rot="R180"/>
<pin name="DDR_D4" x="17.78" y="15.24" length="middle" direction="io" rot="R180"/>
<pin name="DDR_D3" x="17.78" y="12.7" length="middle" direction="io" rot="R180"/>
<pin name="DDR_D7" x="17.78" y="10.16" length="middle" direction="io" rot="R180"/>
<pin name="PB31" x="17.78" y="7.62" length="middle" direction="io" rot="R180"/>
<pin name="PB20" x="17.78" y="5.08" length="middle" direction="io" rot="R180"/>
<pin name="VDDPLLA" x="17.78" y="2.54" length="middle" direction="pwr" rot="R180"/>
<pin name="TMS" x="17.78" y="0" length="middle" direction="in" rot="R180"/>
<pin name="PD28" x="17.78" y="-2.54" length="middle" direction="io" rot="R180"/>
<pin name="PD8" x="17.78" y="-5.08" length="middle" direction="io" rot="R180"/>
<pin name="PB19" x="17.78" y="-7.62" length="middle" direction="io" rot="R180"/>
<pin name="PB12" x="17.78" y="-10.16" length="middle" direction="io" rot="R180"/>
<pin name="PA23" x="17.78" y="-12.7" length="middle" direction="io" rot="R180"/>
<pin name="PA21" x="17.78" y="-15.24" length="middle" direction="io" rot="R180"/>
<pin name="PA19" x="17.78" y="-17.78" length="middle" direction="io" rot="R180"/>
<pin name="PA13" x="17.78" y="-20.32" length="middle" direction="io" rot="R180"/>
<pin name="PA11" x="17.78" y="-22.86" length="middle" direction="io" rot="R180"/>
<pin name="DDR_D12" x="17.78" y="-25.4" length="middle" direction="io" rot="R180"/>
<pin name="DDR_D11" x="17.78" y="-27.94" length="middle" direction="io" rot="R180"/>
<pin name="DDR_D9" x="17.78" y="-30.48" length="middle" direction="io" rot="R180"/>
<pin name="DDR_D8" x="17.78" y="-33.02" length="middle" direction="io" rot="R180"/>
<pin name="DDR_D13" x="17.78" y="-35.56" length="middle" direction="io" rot="R180"/>
<pin name="PB28" x="17.78" y="-38.1" length="middle" direction="io" rot="R180"/>
<pin name="PB24" x="17.78" y="-40.64" length="middle" direction="io" rot="R180"/>
<pin name="PB9" x="17.78" y="-43.18" length="middle" direction="io" rot="R180"/>
<pin name="NTRST" x="17.78" y="-45.72" length="middle" direction="in" rot="R180"/>
<pin name="PD16" x="17.78" y="-48.26" length="middle" direction="io" rot="R180"/>
<pin name="PD6" x="17.78" y="-50.8" length="middle" direction="io" rot="R180"/>
<pin name="PB18" x="17.78" y="-53.34" length="middle" direction="io" rot="R180"/>
<pin name="PA17" x="17.78" y="-55.88" length="middle" direction="io" rot="R180"/>
<pin name="PA16" x="17.78" y="-58.42" length="middle" direction="io" rot="R180"/>
<pin name="PA15" x="17.78" y="-60.96" length="middle" direction="io" rot="R180"/>
<pin name="PA12" x="17.78" y="-63.5" length="middle" direction="io" rot="R180"/>
<pin name="PA9" x="17.78" y="-66.04" length="middle" direction="io" rot="R180"/>
<pin name="PA3" x="17.78" y="-68.58" length="middle" direction="io" rot="R180"/>
<pin name="DDR_A2" x="17.78" y="-71.12" length="middle" direction="out" rot="R180"/>
<pin name="DDR_A0" x="17.78" y="-73.66" length="middle" direction="out" rot="R180"/>
<pin name="DDR_D15" x="17.78" y="-76.2" length="middle" direction="io" rot="R180"/>
<pin name="DDR_D14" x="17.78" y="-78.74" length="middle" direction="io" rot="R180"/>
<pin name="VDDIOM0" x="17.78" y="-81.28" length="middle" direction="pwr" rot="R180"/>
<pin name="PB27" x="17.78" y="-83.82" length="middle" direction="io" rot="R180"/>
<pin name="PB25" x="17.78" y="-86.36" length="middle" direction="io" rot="R180"/>
<pin name="PB11" x="17.78" y="-88.9" length="middle" direction="io" rot="R180"/>
<pin name="NRST" x="17.78" y="-91.44" length="middle" direction="io" rot="R180"/>
<pin name="PD15" x="17.78" y="-93.98" length="middle" direction="io" rot="R180"/>
<pin name="PD4" x="17.78" y="-96.52" length="middle" direction="io" rot="R180"/>
<pin name="PB14" x="17.78" y="-99.06" length="middle" direction="io" rot="R180"/>
<pin name="PA14" x="17.78" y="-101.6" length="middle" direction="io" rot="R180"/>
<pin name="PA10" x="17.78" y="-104.14" length="middle" direction="io" rot="R180"/>
<pin name="PA7" x="17.78" y="-106.68" length="middle" direction="io" rot="R180"/>
<pin name="PA6" x="17.78" y="-109.22" length="middle" direction="io" rot="R180"/>
<pin name="PA5" x="17.78" y="-111.76" length="middle" direction="io" rot="R180"/>
<pin name="PA1" x="17.78" y="-114.3" length="middle" direction="io" rot="R180"/>
<pin name="DDR_A5" x="17.78" y="-116.84" length="middle" direction="out" rot="R180"/>
<pin name="DDR_A6" x="17.78" y="-119.38" length="middle" direction="out" rot="R180"/>
<pin name="DDR_A4" x="17.78" y="-121.92" length="middle" direction="out" rot="R180"/>
<pin name="DDR_A3" x="17.78" y="-124.46" length="middle" direction="out" rot="R180"/>
<pin name="DDR_A1" x="17.78" y="-127" length="middle" direction="out" rot="R180"/>
<pin name="VDDIOM0@2" x="17.78" y="-129.54" length="middle" direction="pwr" rot="R180"/>
<pin name="VDDIOM0@3" x="17.78" y="-132.08" length="middle" direction="pwr" rot="R180"/>
<pin name="PD31" x="17.78" y="-134.62" length="middle" direction="io" rot="R180"/>
<pin name="PD29" x="17.78" y="-137.16" length="middle" direction="io" rot="R180"/>
<pin name="PD13" x="17.78" y="-139.7" length="middle" direction="io" rot="R180"/>
<pin name="PD2" x="17.78" y="-142.24" length="middle" direction="io" rot="R180"/>
<pin name="PA8" x="17.78" y="-144.78" length="middle" direction="io" rot="R180"/>
<pin name="PA4" x="17.78" y="-147.32" length="middle" direction="io" rot="R180"/>
<pin name="PA2" x="17.78" y="-149.86" length="middle" direction="io" rot="R180"/>
<pin name="PE31" x="17.78" y="-152.4" length="middle" direction="io" rot="R180"/>
<pin name="PE29" x="17.78" y="-154.94" length="middle" direction="io" rot="R180"/>
<pin name="PE30" x="17.78" y="-157.48" length="middle" direction="io" rot="R180"/>
<pin name="PA0" x="17.78" y="-160.02" length="middle" direction="io" rot="R180"/>
<pin name="DDR_A10" x="17.78" y="-162.56" length="middle" direction="out" rot="R180"/>
<pin name="DDR_A11" x="17.78" y="-165.1" length="middle" direction="out" rot="R180"/>
<pin name="DDR_A9" x="17.78" y="-167.64" length="middle" direction="out" rot="R180"/>
<pin name="DDR_A8" x="17.78" y="-170.18" length="middle" direction="out" rot="R180"/>
<pin name="DDR_A7" x="17.78" y="-172.72" length="middle" direction="out" rot="R180"/>
<pin name="VDDIOM0@4" x="17.78" y="-175.26" length="middle" direction="pwr" rot="R180"/>
<pin name="GNDIOM@6" x="17.78" y="-177.8" length="middle" direction="pwr" rot="R180"/>
<pin name="GNDIOM@7" x="17.78" y="-180.34" length="middle" direction="pwr" rot="R180"/>
<pin name="VDDIOP0" x="17.78" y="-182.88" length="middle" direction="pwr" rot="R180"/>
<pin name="VDDIOP0@2" x="17.78" y="-185.42" length="middle" direction="pwr" rot="R180"/>
<pin name="PE28" x="17.78" y="-187.96" length="middle" direction="io" rot="R180"/>
<pin name="PE27" x="17.78" y="-190.5" length="middle" direction="io" rot="R180"/>
<pin name="PE25" x="17.78" y="-193.04" length="middle" direction="io" rot="R180"/>
<pin name="PE24" x="17.78" y="-195.58" length="middle" direction="io" rot="R180"/>
<pin name="PE22" x="17.78" y="-198.12" length="middle" direction="io" rot="R180"/>
<pin name="PE26" x="17.78" y="-200.66" length="middle" direction="io" rot="R180"/>
<pin name="PE23" x="17.78" y="-203.2" length="middle" direction="io" rot="R180"/>
<pin name="PE21" x="17.78" y="-205.74" length="middle" direction="io" rot="R180"/>
</symbol>
</symbols>
<devicesets>
<deviceset name="AT91SAM9G45C-CU-999" prefix="U">
<description></description>
<gates>
<gate name="G$1" symbol="AT91SAM9G45C-CU-999" x="0" y="0"/>
</gates>
<devices>
<device name="" package="TFBGA-324_12x12mm_Layout18x18_P0.65mm">
<connects>
<connect gate="G$1" pin="PC27" pad="A1"/>
<connect gate="G$1" pin="PC28" pad="A2"/>
<connect gate="G$1" pin="PC25" pad="A3"/>
<connect gate="G$1" pin="PC20" pad="A4"/>
<connect gate="G$1" pin="PC12" pad="A5"/>
<connect gate="G$1" pin="PC7" pad="A6"/>
<connect gate="G$1" pin="PC5" pad="A7"/>
<connect gate="G$1" pin="PC0" pad="A8"/>
<connect gate="G$1" pin="NWR3/NBS3" pad="A9"/>
<connect gate="G$1" pin="NCS0" pad="A10"/>
<connect gate="G$1" pin="DQS0" pad="A11"/>
<connect gate="G$1" pin="RAS" pad="A12"/>
<connect gate="G$1" pin="SDCK" pad="A13"/>
<connect gate="G$1" pin="NSDCK" pad="A14"/>
<connect gate="G$1" pin="D7" pad="A15"/>
<connect gate="G$1" pin="DDR_VREF" pad="A16"/>
<connect gate="G$1" pin="D0" pad="A17"/>
<connect gate="G$1" pin="A14" pad="A18"/>
<connect gate="G$1" pin="PC31" pad="B1"/>
<connect gate="G$1" pin="PC29" pad="B2"/>
<connect gate="G$1" pin="PC30" pad="B3"/>
<connect gate="G$1" pin="PC22" pad="B4"/>
<connect gate="G$1" pin="PC17" pad="B5"/>
<connect gate="G$1" pin="PC10" pad="B6"/>
<connect gate="G$1" pin="PC11" pad="B7"/>
<connect gate="G$1" pin="PC2" pad="B8"/>
<connect gate="G$1" pin="SDA10" pad="B9"/>
<connect gate="G$1" pin="A17/BA1" pad="B10"/>
<connect gate="G$1" pin="DQM0" pad="B11"/>
<connect gate="G$1" pin="SDCKE" pad="B12"/>
<connect gate="G$1" pin="D12" pad="B13"/>
<connect gate="G$1" pin="D8" pad="B14"/>
<connect gate="G$1" pin="D4" pad="B15"/>
<connect gate="G$1" pin="D3" pad="B16"/>
<connect gate="G$1" pin="A15" pad="B17"/>
<connect gate="G$1" pin="A13" pad="B18"/>
<connect gate="G$1" pin="XIN32" pad="C1"/>
<connect gate="G$1" pin="GNDANA" pad="C2"/>
<connect gate="G$1" pin="WKUP" pad="C3"/>
<connect gate="G$1" pin="PC26" pad="C4"/>
<connect gate="G$1" pin="PC21" pad="C5"/>
<connect gate="G$1" pin="PC15" pad="C6"/>
<connect gate="G$1" pin="PC9" pad="C7"/>
<connect gate="G$1" pin="PC3" pad="C8"/>
<connect gate="G$1" pin="NWR0/NWE" pad="C9"/>
<connect gate="G$1" pin="A16/BA0" pad="C10"/>
<connect gate="G$1" pin="CAS" pad="C11"/>
<connect gate="G$1" pin="D15" pad="C12"/>
<connect gate="G$1" pin="D10" pad="C13"/>
<connect gate="G$1" pin="D6" pad="C14"/>
<connect gate="G$1" pin="D2" pad="C15"/>
<connect gate="G$1" pin="GNDIOM" pad="C16"/>
<connect gate="G$1" pin="A18" pad="C17"/>
<connect gate="G$1" pin="A12" pad="C18"/>
<connect gate="G$1" pin="XOUT32" pad="D1"/>
<connect gate="G$1" pin="PD20" pad="D2"/>
<connect gate="G$1" pin="GNDBU" pad="D3"/>
<connect gate="G$1" pin="VDDBU" pad="D4"/>
<connect gate="G$1" pin="PC24" pad="D5"/>
<connect gate="G$1" pin="PC18" pad="D6"/>
<connect gate="G$1" pin="PC13" pad="D7"/>
<connect gate="G$1" pin="PC6" pad="D8"/>
<connect gate="G$1" pin="NWR1/NBS1" pad="D9"/>
<connect gate="G$1" pin="NANDOE" pad="D10"/>
<connect gate="G$1" pin="DQM1" pad="D11"/>
<connect gate="G$1" pin="D14" pad="D12"/>
<connect gate="G$1" pin="D9" pad="D13"/>
<connect gate="G$1" pin="D5" pad="D14"/>
<connect gate="G$1" pin="D1" pad="D15"/>
<connect gate="G$1" pin="VDDIOM1" pad="D16"/>
<connect gate="G$1" pin="A11" pad="D17"/>
<connect gate="G$1" pin="A10" pad="D18"/>
<connect gate="G$1" pin="PD21" pad="E1"/>
<connect gate="G$1" pin="TSADVREF" pad="E2"/>
<connect gate="G$1" pin="VDDANA" pad="E3"/>
<connect gate="G$1" pin="JTAGSEL" pad="E4"/>
<connect gate="G$1" pin="TST" pad="E5"/>
<connect gate="G$1" pin="PC23" pad="E6"/>
<connect gate="G$1" pin="PC16" pad="E7"/>
<connect gate="G$1" pin="PC8" pad="E8"/>
<connect gate="G$1" pin="PC1" pad="E9"/>
<connect gate="G$1" pin="NANDWE" pad="E10"/>
<connect gate="G$1" pin="DQS1" pad="E11"/>
<connect gate="G$1" pin="D13" pad="E12"/>
<connect gate="G$1" pin="D11" pad="E13"/>
<connect gate="G$1" pin="A4" pad="E14"/>
<connect gate="G$1" pin="A8" pad="E15"/>
<connect gate="G$1" pin="A9" pad="E16"/>
<connect gate="G$1" pin="A7" pad="E17"/>
<connect gate="G$1" pin="VDDCORE" pad="E18"/>
<connect gate="G$1" pin="PD22" pad="F1"/>
<connect gate="G$1" pin="PD24" pad="F2"/>
<connect gate="G$1" pin="SHDN" pad="F3"/>
<connect gate="G$1" pin="PE1" pad="F4"/>
<connect gate="G$1" pin="PE3" pad="F5"/>
<connect gate="G$1" pin="VDDIOM1@2" pad="F6"/>
<connect gate="G$1" pin="PC19" pad="F7"/>
<connect gate="G$1" pin="PC14" pad="F8"/>
<connect gate="G$1" pin="PC4" pad="F9"/>
<connect gate="G$1" pin="NCS1/SDCS" pad="F10"/>
<connect gate="G$1" pin="NRD" pad="F11"/>
<connect gate="G$1" pin="SDWE" pad="F12"/>
<connect gate="G$1" pin="A0/NBS0" pad="F13"/>
<connect gate="G$1" pin="A1/NBS2/NWR2" pad="F14"/>
<connect gate="G$1" pin="A3" pad="F15"/>
<connect gate="G$1" pin="A6" pad="F16"/>
<connect gate="G$1" pin="A5" pad="F17"/>
<connect gate="G$1" pin="A2" pad="F18"/>
<connect gate="G$1" pin="PD25" pad="G1"/>
<connect gate="G$1" pin="PD23" pad="G2"/>
<connect gate="G$1" pin="PE6" pad="G3"/>
<connect gate="G$1" pin="PE0" pad="G4"/>
<connect gate="G$1" pin="PE2" pad="G5"/>
<connect gate="G$1" pin="PE8" pad="G6"/>
<connect gate="G$1" pin="PE4" pad="G7"/>
<connect gate="G$1" pin="PE11" pad="G8"/>
<connect gate="G$1" pin="GNDCORE" pad="G9"/>
<connect gate="G$1" pin="VDDIOM1@3" pad="G10"/>
<connect gate="G$1" pin="VDDIOM1@4" pad="G11"/>
<connect gate="G$1" pin="VDDCORE@2" pad="G12"/>
<connect gate="G$1" pin="VDDCORE@3" pad="G13"/>
<connect gate="G$1" pin="DDR_DQM0" pad="G14"/>
<connect gate="G$1" pin="DDR_DQS1" pad="G15"/>
<connect gate="G$1" pin="DDR_BA1" pad="G16"/>
<connect gate="G$1" pin="DDR_BA0" pad="G17"/>
<connect gate="G$1" pin="DDR_DQS0" pad="G18"/>
<connect gate="G$1" pin="PD26" pad="H1"/>
<connect gate="G$1" pin="PD27" pad="H2"/>
<connect gate="G$1" pin="VDDIOP1" pad="H3"/>
<connect gate="G$1" pin="PE13" pad="H4"/>
<connect gate="G$1" pin="PE5" pad="H5"/>
<connect gate="G$1" pin="PE7" pad="H6"/>
<connect gate="G$1" pin="PE9" pad="H7"/>
<connect gate="G$1" pin="PE10" pad="H8"/>
<connect gate="G$1" pin="GNDCORE@2" pad="H9"/>
<connect gate="G$1" pin="GNDIOP" pad="H10"/>
<connect gate="G$1" pin="VDDCORE@4" pad="H11"/>
<connect gate="G$1" pin="GNDIOM@2" pad="H12"/>
<connect gate="G$1" pin="GNDIOM@3" pad="H13"/>
<connect gate="G$1" pin="DDR_CS" pad="H14"/>
<connect gate="G$1" pin="DDR_WE" pad="H15"/>
<connect gate="G$1" pin="DDR_DQM1" pad="H16"/>
<connect gate="G$1" pin="DDR_CAS" pad="H17"/>
<connect gate="G$1" pin="DDR_NCLK" pad="H18"/>
<connect gate="G$1" pin="PE19" pad="J1"/>
<connect gate="G$1" pin="PE16" pad="J2"/>
<connect gate="G$1" pin="PE14" pad="J3"/>
<connect gate="G$1" pin="PE15" pad="J4"/>
<connect gate="G$1" pin="PE12" pad="J5"/>
<connect gate="G$1" pin="PE17" pad="J6"/>
<connect gate="G$1" pin="PE18" pad="J7"/>
<connect gate="G$1" pin="PE20" pad="J8"/>
<connect gate="G$1" pin="GNDCORE@3" pad="J9"/>
<connect gate="G$1" pin="GNDCORE@4" pad="J10"/>
<connect gate="G$1" pin="GNDIOP@2" pad="J11"/>
<connect gate="G$1" pin="GNDIOM@4" pad="J12"/>
<connect gate="G$1" pin="GNDIOM@5" pad="J13"/>
<connect gate="G$1" pin="DDR_A12" pad="J14"/>
<connect gate="G$1" pin="DDR_A13" pad="J15"/>
<connect gate="G$1" pin="DDR_CKE" pad="J16"/>
<connect gate="G$1" pin="DDR_RAS" pad="J17"/>
<connect gate="G$1" pin="DDR_CLK" pad="J18"/>
<connect gate="G$1" pin="VBG" pad="V18"/>
<connect gate="G$1" pin="VDDUTMII" pad="V17"/>
<connect gate="G$1" pin="HFSDMB/DFSDM" pad="V16"/>
<connect gate="G$1" pin="HFSDPB/DFSDP" pad="V15"/>
<connect gate="G$1" pin="VDDIOP2" pad="V14"/>
<connect gate="G$1" pin="VDDPLLUTMI" pad="V13"/>
<connect gate="G$1" pin="XIN" pad="V12"/>
<connect gate="G$1" pin="XOUT" pad="V11"/>
<connect gate="G$1" pin="TDO" pad="V10"/>
<connect gate="G$1" pin="PD17" pad="V9"/>
<connect gate="G$1" pin="PD12" pad="V8"/>
<connect gate="G$1" pin="PD5" pad="V7"/>
<connect gate="G$1" pin="PD3" pad="V6"/>
<connect gate="G$1" pin="PB15" pad="V5"/>
<connect gate="G$1" pin="PB5" pad="V4"/>
<connect gate="G$1" pin="PB2" pad="V3"/>
<connect gate="G$1" pin="PB1" pad="V2"/>
<connect gate="G$1" pin="PA31" pad="V1"/>
<connect gate="G$1" pin="VDDUTMIC" pad="U18"/>
<connect gate="G$1" pin="GNDUTMI" pad="U17"/>
<connect gate="G$1" pin="HHSDMB/DHSDM" pad="U16"/>
<connect gate="G$1" pin="HHSDPB/DHSDP" pad="U15"/>
<connect gate="G$1" pin="PB26" pad="U14"/>
<connect gate="G$1" pin="PB10" pad="U13"/>
<connect gate="G$1" pin="GNDOSC" pad="U12"/>
<connect gate="G$1" pin="VDDOSC" pad="U11"/>
<connect gate="G$1" pin="TCK" pad="U10"/>
<connect gate="G$1" pin="PD14" pad="U9"/>
<connect gate="G$1" pin="PD10" pad="U8"/>
<connect gate="G$1" pin="PD7" pad="U7"/>
<connect gate="G$1" pin="PB17" pad="U6"/>
<connect gate="G$1" pin="PB7" pad="U5"/>
<connect gate="G$1" pin="PB3" pad="U4"/>
<connect gate="G$1" pin="PA28" pad="U3"/>
<connect gate="G$1" pin="PA29" pad="U2"/>
<connect gate="G$1" pin="PA27" pad="U1"/>
<connect gate="G$1" pin="HFSDPA" pad="T18"/>
<connect gate="G$1" pin="HHSDPA" pad="T17"/>
<connect gate="G$1" pin="PB23" pad="T16"/>
<connect gate="G$1" pin="PB21" pad="T15"/>
<connect gate="G$1" pin="DDR_D2" pad="T14"/>
<connect gate="G$1" pin="PB30" pad="T13"/>
<connect gate="G$1" pin="PB8" pad="T12"/>
<connect gate="G$1" pin="BMS" pad="T11"/>
<connect gate="G$1" pin="PD30" pad="T10"/>
<connect gate="G$1" pin="PD19" pad="T9"/>
<connect gate="G$1" pin="PD11" pad="T8"/>
<connect gate="G$1" pin="PD1" pad="T7"/>
<connect gate="G$1" pin="PB16" pad="T6"/>
<connect gate="G$1" pin="PB6" pad="T5"/>
<connect gate="G$1" pin="PB0" pad="T4"/>
<connect gate="G$1" pin="PA26" pad="T3"/>
<connect gate="G$1" pin="PA25" pad="T2"/>
<connect gate="G$1" pin="PA22" pad="T1"/>
<connect gate="G$1" pin="HFSDMA" pad="R18"/>
<connect gate="G$1" pin="HHSDMA" pad="R17"/>
<connect gate="G$1" pin="DDR_D0" pad="R16"/>
<connect gate="G$1" pin="DDR_D1" pad="R15"/>
<connect gate="G$1" pin="DDR_D6" pad="R14"/>
<connect gate="G$1" pin="PB29" pad="R13"/>
<connect gate="G$1" pin="PB22" pad="R12"/>
<connect gate="G$1" pin="RTCK" pad="R11"/>
<connect gate="G$1" pin="TDI" pad="R10"/>
<connect gate="G$1" pin="PD18" pad="R9"/>
<connect gate="G$1" pin="PD9" pad="R8"/>
<connect gate="G$1" pin="PD0" pad="R7"/>
<connect gate="G$1" pin="PB13" pad="R6"/>
<connect gate="G$1" pin="PB4" pad="R5"/>
<connect gate="G$1" pin="PA30" pad="R4"/>
<connect gate="G$1" pin="PA24" pad="R3"/>
<connect gate="G$1" pin="PA20" pad="R2"/>
<connect gate="G$1" pin="PA18" pad="R1"/>
<connect gate="G$1" pin="DDR_D10" pad="P18"/>
<connect gate="G$1" pin="DDR_D5" pad="P17"/>
<connect gate="G$1" pin="DDR_D4" pad="P16"/>
<connect gate="G$1" pin="DDR_D3" pad="P15"/>
<connect gate="G$1" pin="DDR_D7" pad="P14"/>
<connect gate="G$1" pin="PB31" pad="P13"/>
<connect gate="G$1" pin="PB20" pad="P12"/>
<connect gate="G$1" pin="VDDPLLA" pad="P11"/>
<connect gate="G$1" pin="TMS" pad="P10"/>
<connect gate="G$1" pin="PD28" pad="P9"/>
<connect gate="G$1" pin="PD8" pad="P8"/>
<connect gate="G$1" pin="PB19" pad="P7"/>
<connect gate="G$1" pin="PB12" pad="P6"/>
<connect gate="G$1" pin="PA23" pad="P5"/>
<connect gate="G$1" pin="PA21" pad="P4"/>
<connect gate="G$1" pin="PA19" pad="P3"/>
<connect gate="G$1" pin="PA13" pad="P2"/>
<connect gate="G$1" pin="PA11" pad="P1"/>
<connect gate="G$1" pin="DDR_D12" pad="N18"/>
<connect gate="G$1" pin="DDR_D11" pad="N17"/>
<connect gate="G$1" pin="DDR_D9" pad="N16"/>
<connect gate="G$1" pin="DDR_D8" pad="N15"/>
<connect gate="G$1" pin="DDR_D13" pad="N14"/>
<connect gate="G$1" pin="PB28" pad="N13"/>
<connect gate="G$1" pin="PB24" pad="N12"/>
<connect gate="G$1" pin="PB9" pad="N11"/>
<connect gate="G$1" pin="NTRST" pad="N10"/>
<connect gate="G$1" pin="PD16" pad="N9"/>
<connect gate="G$1" pin="PD6" pad="N8"/>
<connect gate="G$1" pin="PB18" pad="N7"/>
<connect gate="G$1" pin="PA17" pad="N6"/>
<connect gate="G$1" pin="PA16" pad="N5"/>
<connect gate="G$1" pin="PA15" pad="N4"/>
<connect gate="G$1" pin="PA12" pad="N3"/>
<connect gate="G$1" pin="PA9" pad="N2"/>
<connect gate="G$1" pin="PA3" pad="N1"/>
<connect gate="G$1" pin="DDR_A2" pad="M18"/>
<connect gate="G$1" pin="DDR_A0" pad="M17"/>
<connect gate="G$1" pin="DDR_D15" pad="M16"/>
<connect gate="G$1" pin="DDR_D14" pad="M15"/>
<connect gate="G$1" pin="VDDIOM0" pad="M14"/>
<connect gate="G$1" pin="PB27" pad="M13"/>
<connect gate="G$1" pin="PB25" pad="M12"/>
<connect gate="G$1" pin="PB11" pad="M11"/>
<connect gate="G$1" pin="NRST" pad="M10"/>
<connect gate="G$1" pin="PD15" pad="M9"/>
<connect gate="G$1" pin="PD4" pad="M8"/>
<connect gate="G$1" pin="PB14" pad="M7"/>
<connect gate="G$1" pin="PA14" pad="M6"/>
<connect gate="G$1" pin="PA10" pad="M5"/>
<connect gate="G$1" pin="PA7" pad="M4"/>
<connect gate="G$1" pin="PA6" pad="M3"/>
<connect gate="G$1" pin="PA5" pad="M2"/>
<connect gate="G$1" pin="PA1" pad="M1"/>
<connect gate="G$1" pin="DDR_A5" pad="L18"/>
<connect gate="G$1" pin="DDR_A6" pad="L17"/>
<connect gate="G$1" pin="DDR_A4" pad="L16"/>
<connect gate="G$1" pin="DDR_A3" pad="L15"/>
<connect gate="G$1" pin="DDR_A1" pad="L14"/>
<connect gate="G$1" pin="VDDIOM0@2" pad="L13"/>
<connect gate="G$1" pin="VDDIOM0@3" pad="L12"/>
<connect gate="G$1" pin="PD31" pad="L11"/>
<connect gate="G$1" pin="PD29" pad="L10"/>
<connect gate="G$1" pin="PD13" pad="L9"/>
<connect gate="G$1" pin="PD2" pad="L8"/>
<connect gate="G$1" pin="PA8" pad="L7"/>
<connect gate="G$1" pin="PA4" pad="L6"/>
<connect gate="G$1" pin="PA2" pad="L5"/>
<connect gate="G$1" pin="PE31" pad="L4"/>
<connect gate="G$1" pin="PE29" pad="L3"/>
<connect gate="G$1" pin="PE30" pad="L2"/>
<connect gate="G$1" pin="PA0" pad="L1"/>
<connect gate="G$1" pin="DDR_A10" pad="K18"/>
<connect gate="G$1" pin="DDR_A11" pad="K17"/>
<connect gate="G$1" pin="DDR_A9" pad="K16"/>
<connect gate="G$1" pin="DDR_A8" pad="K15"/>
<connect gate="G$1" pin="DDR_A7" pad="K14"/>
<connect gate="G$1" pin="VDDIOM0@4" pad="K13"/>
<connect gate="G$1" pin="GNDIOM@6" pad="K12"/>
<connect gate="G$1" pin="GNDIOM@7" pad="K11"/>
<connect gate="G$1" pin="VDDIOP0" pad="K10"/>
<connect gate="G$1" pin="VDDIOP0@2" pad="K9"/>
<connect gate="G$1" pin="PE28" pad="K8"/>
<connect gate="G$1" pin="PE27" pad="K7"/>
<connect gate="G$1" pin="PE25" pad="K6"/>
<connect gate="G$1" pin="PE24" pad="K5"/>
<connect gate="G$1" pin="PE22" pad="K4"/>
<connect gate="G$1" pin="PE26" pad="K3"/>
<connect gate="G$1" pin="PE23" pad="K2"/>
<connect gate="G$1" pin="PE21" pad="K1"/>
</connects>
<technologies><technology name=""/></technologies>
</device>
</devices>
</deviceset>
</devicesets>
</library>
</drawing>
</eagle>