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AT86RF215-ZU

Microchip Tech · RF Transceiver ICs · VQFN-48-EP(7x7)

AT86RF215-ZU from Microchip Tech, in a VQFN-48-EP(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	FEA24	output	RF frontend control digital output for the 2.4GHz transceiver.
2	FEB24	output	RF frontend control digital output for the 2.4GHz transceiver.
3	AVSS	power_in	Analog ground (RF); should be separated from digital ground and connected at a single PCB point.
4	RFP24	bidirectional	Differential RF input/output for the 2.4GHz transceiver, positive side; a 50Ω differential load is required at the RF ports.
5	RFN24	bidirectional	Differential RF input/output for the 2.4GHz transceiver, negative side; a 50Ω differential load is required at the RF ports.
6	AVSS	power_in	Analog ground (RF).
7	AVSS	power_in	Analog ground (RF).
8	RFP09	bidirectional	Differential RF input/output for the sub-1GHz transceiver, positive side; a 50Ω differential load is required at the RF ports.
9	RFN09	bidirectional	Differential RF input/output for the sub-1GHz transceiver, negative side; a 50Ω differential load is required at the RF ports.
10	AVSS	power_in	Analog ground (RF).
11	FEA09	output	RF frontend control digital output for the sub-1GHz transceiver.
12	FEB09	output	RF frontend control digital output for the sub-1GHz transceiver.
13	RSTN	input	Active-low reset input.
14	AVDD0	power_out	Internally regulated 1.8V analog supply output for the sub-1GHz transceiver; external compensation capacitor required and must not be shorted to AVDD1.
15	EVDD	power_in	External analog supply voltage (VDD); 3.0V typical, must be shorted to DEVDD at board level.
16	AVSS	power_in	Analog ground.
17	TCXO	input	26MHz TCXO clock input, or one side of the 26MHz crystal connection; XTAL2 must be grounded when using a TCXO.
18	XTAL2	output	Crystal oscillator pin, connected to TCXO pin for a 26MHz crystal; must be grounded when a TCXO is used.
19	AVSS	power_in	Analog ground.
20	DVSS	power_in	Digital ground.
21	DEVDD	power_in	External digital supply voltage (VDD); 3.0V typical, must be shorted to EVDD at board level.
22	CLKO	output	Clock output that an external microcontroller can use as an input clock source.
23	DVSS	power_in	Digital ground.
24	DVSS	power_in	Digital ground.
25	TXCLKN	input	Differential TX I/Q clock interface input, negative side (LVDS).
26	TXCLKP	input	Differential TX I/Q clock interface input, positive side (LVDS).
27	TXDN	input	Differential TX I/Q data interface input, negative side (LVDS).
28	TXDP	input	Differential TX I/Q data interface input, positive side (LVDS).
29	DEVDD	power_in	External digital supply voltage (VDD); 3.0V typical, must be shorted to EVDD at board level.
30	RXDN09	output	Differential RX I/Q data interface output for the sub-1GHz transceiver, negative side (LVDS).
31	RXDP09	output	Differential RX I/Q data interface output for the sub-1GHz transceiver, positive side (LVDS).
32	DVSS	power_in	Digital ground.
33	RXCLKN	output	Differential RX I/Q clock interface output, negative side (LVDS).
34	RXCLKP	output	Differential RX I/Q clock interface output, positive side (LVDS).
35	RXDN24	output	Differential RX I/Q data interface output for the 2.4GHz transceiver, negative side (LVDS).
36	RXDP24	output	Differential RX I/Q data interface output for the 2.4GHz transceiver, positive side (LVDS).
37	DVDD	power_out	Internally regulated digital supply output (internally generated); external compensation capacitor must be placed close to this pin.
38	DVSS	power_in	Digital ground.
39	DEVDD	power_in	External digital supply voltage (VDD); 3.0V typical, must be shorted to EVDD at board level.
40	IRQ	output	Interrupt output from the transceiver to the microcontroller, controlled by both radios and basebands.
41	SCLK	input	SPI interface clock input.
42	SELN	input	SPI select input, active low.
43	MOSI	input	SPI data input.
44	MISO	output	SPI data output.
45	AVSS	power_in	Analog ground.
46	EVDD	power_in	External analog supply voltage (VDD); 3.0V typical, must be shorted to DEVDD at board level.
47	AVDD1	power_out	Internally regulated 1.8V analog supply output for the 2.4GHz transceiver; external compensation capacitor required and must not be shorted to AVDD0.
48	AVSS	power_in	Analog ground.
49	EP	passive	Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter	Value
Manufacturer	Microchip Tech
Package	VQFN-48-EP(7x7)
Category	RF & Radio
Pins	49

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter	Symbol	Min	Typ	Max	Unit	Conditions	Page
Operating temperature range	TOP	-40		85	°C		187
DEVDD/EVDD digital and analog external supply voltage	VDD	1.8	3	3.6	V		187
Low level input voltage	VIL			0.4	V		187
Low level output voltage	VOL			0.4	V		187
Storage temperature		-50		150	°C		187
ESD voltage (Human Body Model)				4	kV	Human Body Model	187
Input RF level				10	dBm		187
Voltage on all digital pins		-0.3		4	V		187
Voltage on all analog pins		-0.3		2	V		187
Power-on Reset threshold voltage rising slope	VPOT	1.55	1.6	1.65	V	Threshold when released from reset, voltage rising	188
Power-on Reset threshold voltage falling slope	VPOT	1.45	1.5	1.55	V	falling slope	188
Power-on slope	VPSR	0.01		3300	V/ms		188
Decoupling capacitor at pins AVDD0, DVDD and AVDD1	Cdec	100	100	10000	nF		188
Current limitation of internal voltage regulator at start-up	IVREG_LIMIT	43	60	78	mA		188
Maximum ESR of crystal specification	ESR			70	Ω	Maximum ESR of crystal specification	188
Duty cycle	DCLKO	42		58	%		189
Transition time from power-on (VDD>1.6V) until interrupt WAKEUP (state TRXOFF)	tPOWERON			500	μs	XTAL supplier: ACT BN serie (Cload=8pF); Cdec_DVDD=100nF	189
TX output power for the 500MHz band	PTX_05	12	16	16.5	dBm	Maximum output power for continous wave at device pin	190
TX output power for the 900MHz band	PTX_09	11	14.5	16	dBm	Maximum output power for continous wave	191
TX output power for the 2.4GHz band	PTX_24	11	14	15.5	dBm	Maximum output power for continous wave	191
RSSI tolerance for the 500MHz band	RSSITOL_05	-5		5	dB	Tolerance within gain steps	194
RSSI tolerance for the 900MHz band	RSSITOL_09	-5		5	dB	Tolerance within gain step	194
RSSI tolerance for the 2.4GHz band	RSSITOL_24	-5		5	dB	Tolerance within gain step	194

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part	Material	Colour / plating	Datasheet says	Page
housing	PC		 Bit 2:0, FSKRPC.BASET: Base Time	110

CAD (KiCad official)

Symbol: AT86RF215-ZU
Footprint: Package_DFN_QFN:QFN-48-1EP_7x7mm_P0.5mm_EP5.15x5.15mm
3D model: VQFN-48-EP(7x7) (KiCad packages3D, STEP)
3D model files: at86rf215-zu-etched.step / at86rf215-zu-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); at86rf215-zu.step / at86rf215-zu.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Microchip Tech datasheet (235 pp, sha256 448b3fabd31336fe, retrieved 2026-10-28, tier: manufacturer)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF