component
AT4950-MS
Public Made by Adomby adom
MSKSEMI Brushed DC Motor Drivers, ESOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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AT4950-MS
MSKSEMI · Brushed DC Motor Drivers · ESOP-8
AT4950-MS from MSKSEMI, in a ESOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GND | power_in | Logic ground, connect to board ground. |
| 2 | IN2 | input | Logic input controlling the H-bridge output, with 100 kΩ internal pulldown. |
| 3 | IN1 | input | Logic input controlling the H-bridge output, with 100 kΩ internal pulldown. |
| 4 | VREF | power_in | Analog reference input; apply a voltage between 0.3 V and 5 V. |
| 5 | VM | power_in | 6.5 V to 40 V power supply; connect a 0.1 µF bypass capacitor to ground plus sufficient bulk capacitance rated for the VM voltage. |
| 6 | OUT1 | output | H-bridge output; connect directly to the motor or other inductive load. |
| 7 | ISEN | passive | High-current ground path; connect to a low-value, high-power-rating resistor to ground for current regulation, or directly to ground if not used. |
| 8 | OUT2 | output | H-bridge output; connect directly to the motor or other inductive load. |
| 9 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | MSKSEMI |
| Package | ESOP-8 |
| Category | Motor Driver ICs |
| Pins | 9 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| VM operating voltage | VM | 6.5 | 40 | V | 5 | ||
| VM operating supply current | IVM | 2 | 10 | mA | VM = 24V | 5 | |
| ISEN gain | AV | 9.4 | 10 | 10.4 | V/V | VREF = 2.5V | 5 |
| Input logic low current | IIL | -1 | 1 | μA | VIN = 0V | 5 | |
| Time to sleep | tsleep | 1.2 | 2 | ms | Inputs low to sleep | 5 | |
| High-side FET on resistance | RDS(ON)_High | 260 | 300 | mΩ | VM = 24 V, I = 1A, fPWM = 25 kHz | 5 | |
| Low-side FET on resistance | RDS(ON)_Low | 260 | 300 | mΩ | VM = 24 V, I = 1A, fPWM = 25kHz | 5 | |
| Input logic low voltage | VIL | 0.5 | V | 5 | |||
| Input logic high voltage | VIH | 2 | V | 5 | |||
| VM sleep current | IVMSLEEP | 15 | µA | VM = 24V | 5 | ||
| Turn-on time | tON | 45 | µs | VM > VUVLO with IN1 or IN2 high | 5 | ||
| Input logic hysteresis | VHYS | 0.2 | V | 5 | |||
| Input logic high current | IIH | 33 | μA | VIN = 3.3V | 5 | ||
| Pulldown resistance | RPD | 100 | kΩ | to GND | 5 | ||
| Output dead time | tDEAD | 200 | ns | 5 | |||
| PWM off-time | tOFF | 30 | µs | 5 | |||
| PWM blanking time | tBLANK | 3.2 | µs | 5 | |||
| VM undervoltage lockout falling | VUVLO_fall | 5.8 | V | VM falls until UVLO triggers | 5 | ||
| VM undervoltage lockout rising | VUVLO_rise | 6 | V | VM rises until operation recovers | 5 | ||
| VM undervoltage hysteresis | VUV,_HYS | 200 | mV | Rising to falling threshold | 5 | ||
| Overcurrent protection trip level | IOCP | 4.2 | A | 5 | |||
| Overcurrent deglitch time | tOCP | 2.5 | μs | 5 | |||
| Overcurrent retry time | tRETRY | 4 | ms | 5 | |||
| Thermal shutdown temperature | TSD | 170 | °C | 6 | |||
| Thermal shutdown hysteresis | THYS | 40 | °C | 6 | |||
| Power supply voltage range | VM | 6.5 | 40 | V | 4 | ||
| Operating junction temperature range | TJ | -40 | 125 | °C | 4 | ||
| Power supply voltage (VM) | VM | -0.3 | 45 | V | 3 | ||
| Logic input voltage (IN1, IN2) | -0.3 | 6 | V | 3 | |||
| Reference input pin voltage (VREF) | -0.3 | 6 | V | 3 | |||
| Continuous phase node pin voltage (OUT1, OUT2) | -0.7 | V | max printed as VM+0.7 V | 3 | |||
| Current sense input pin voltage (ISEN) | -0.5 | 1 | V | 3 | |||
| Output current | 0 | 3.5 | A | 100% duty cycle | 3 | ||
| Operating junction temperature | TJ | -40 | 150 | °C | 3 | ||
| Storage temperature | -65 | 150 | °C | 3 | |||
| ESD Human Body Model | VESD | -2000 | 2000 | V | all pins, JEDEC JS-001 | 4 | |
| Junction thermal resistance | 250 | °C/W | TJ = TA + PD x 250°C/W (Note 2) | 6 |
CAD (KiCad official)
- Symbol:
AT4950-MS - Footprint:
Package_SO:SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.41x3.3mm - 3D model: ESOP-8 (KiCad packages3D, STEP)
- 3D model files:
at4950-ms-etched.step/at4950-ms-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);at4950-ms.step/at4950-ms.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: MSKSEMI datasheet (11 pp, sha256
881c0e9304c87432, retrieved 2026-10-27, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# AT4950-MS
**MSKSEMI** · Brushed DC Motor Drivers · ESOP-8
AT4950-MS from MSKSEMI, in a ESOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GND | power_in | Logic ground, connect to board ground. |
| 2 | IN2 | input | Logic input controlling the H-bridge output, with 100 kΩ internal pulldown. |
| 3 | IN1 | input | Logic input controlling the H-bridge output, with 100 kΩ internal pulldown. |
| 4 | VREF | power_in | Analog reference input; apply a voltage between 0.3 V and 5 V. |
| 5 | VM | power_in | 6.5 V to 40 V power supply; connect a 0.1 µF bypass capacitor to ground plus sufficient bulk capacitance rated for the VM voltage. |
| 6 | OUT1 | output | H-bridge output; connect directly to the motor or other inductive load. |
| 7 | ISEN | passive | High-current ground path; connect to a low-value, high-power-rating resistor to ground for current regulation, or directly to ground if not used. |
| 8 | OUT2 | output | H-bridge output; connect directly to the motor or other inductive load. |
| 9 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | MSKSEMI |
| Package | ESOP-8 |
| Category | Motor Driver ICs |
| Pins | 9 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| VM operating voltage | VM | 6.5 | | 40 | V | | 5 |
| VM operating supply current | IVM | | 2 | 10 | mA | VM = 24V | 5 |
| ISEN gain | AV | 9.4 | 10 | 10.4 | V/V | VREF = 2.5V | 5 |
| Input logic low current | IIL | -1 | | 1 | μA | VIN = 0V | 5 |
| Time to sleep | tsleep | | 1.2 | 2 | ms | Inputs low to sleep | 5 |
| High-side FET on resistance | RDS(ON)_High | | 260 | 300 | mΩ | VM = 24 V, I = 1A, fPWM = 25 kHz | 5 |
| Low-side FET on resistance | RDS(ON)_Low | | 260 | 300 | mΩ | VM = 24 V, I = 1A, fPWM = 25kHz | 5 |
| Input logic low voltage | VIL | | | 0.5 | V | | 5 |
| Input logic high voltage | VIH | 2 | | | V | | 5 |
| VM sleep current | IVMSLEEP | | | 15 | µA | VM = 24V | 5 |
| Turn-on time | tON | | 45 | | µs | VM > VUVLO with IN1 or IN2 high | 5 |
| Input logic hysteresis | VHYS | | 0.2 | | V | | 5 |
| Input logic high current | IIH | | 33 | | μA | VIN = 3.3V | 5 |
| Pulldown resistance | RPD | | 100 | | kΩ | to GND | 5 |
| Output dead time | tDEAD | | 200 | | ns | | 5 |
| PWM off-time | tOFF | | 30 | | µs | | 5 |
| PWM blanking time | tBLANK | | 3.2 | | µs | | 5 |
| VM undervoltage lockout falling | VUVLO_fall | | 5.8 | | V | VM falls until UVLO triggers | 5 |
| VM undervoltage lockout rising | VUVLO_rise | | 6 | | V | VM rises until operation recovers | 5 |
| VM undervoltage hysteresis | VUV,_HYS | | 200 | | mV | Rising to falling threshold | 5 |
| Overcurrent protection trip level | IOCP | | 4.2 | | A | | 5 |
| Overcurrent deglitch time | tOCP | | 2.5 | | μs | | 5 |
| Overcurrent retry time | tRETRY | | 4 | | ms | | 5 |
| Thermal shutdown temperature | TSD | | 170 | | °C | | 6 |
| Thermal shutdown hysteresis | THYS | | 40 | | °C | | 6 |
| Power supply voltage range | VM | 6.5 | | 40 | V | | 4 |
| Operating junction temperature range | TJ | -40 | | 125 | °C | | 4 |
| Power supply voltage (VM) | VM | -0.3 | | 45 | V | | 3 |
| Logic input voltage (IN1, IN2) | | -0.3 | | 6 | V | | 3 |
| Reference input pin voltage (VREF) | | -0.3 | | 6 | V | | 3 |
| Continuous phase node pin voltage (OUT1, OUT2) | | -0.7 | | | V | max printed as VM+0.7 V | 3 |
| Current sense input pin voltage (ISEN) | | -0.5 | | 1 | V | | 3 |
| Output current | | 0 | | 3.5 | A | 100% duty cycle | 3 |
| Operating junction temperature | TJ | -40 | | 150 | °C | | 3 |
| Storage temperature | | -65 | | 150 | °C | | 3 |
| ESD Human Body Model | VESD | -2000 | | 2000 | V | all pins, JEDEC JS-001 | 4 |
| Junction thermal resistance | | | 250 | | °C/W | TJ = TA + PD x 250°C/W (Note 2) | 6 |
## CAD (KiCad official)
- Symbol: `AT4950-MS`
- Footprint: `Package_SO:SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.41x3.3mm`
- 3D model: ESOP-8 (KiCad packages3D, STEP)
- 3D model files: `at4950-ms-etched.step` / `at4950-ms-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `at4950-ms.step` / `at4950-ms.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [MSKSEMI datasheet](docs/at4950-ms-datasheet.pdf) (11 pp, sha256 `881c0e9304c87432`, retrieved 2026-10-27, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/at4950-ms-datasheet.pdf)