AT45DB161E-MHF2B-T from Adesto Technologies, in a UDFN-8-EP(5x6). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	SI	input	Serial Input shifts in all command, address and data bits, latched on the rising edge of SCK and ignored while the device is deselected (CS high).
2	SCK	input	Serial Clock controls data flow to and from the device, with input latched on the rising edge and output on SO clocked out on the falling edge of SCK.
3	RESET	input	Active-low reset terminates the operation in progress and holds the internal state machine idle while low, and should be driven high externally if unused.
4	CS	input	Active-low Chip Select selects the device when asserted, and when deasserted the device is deselected, normally enters standby and SO goes high-impedance.
5	WP	input	Active-low Write Protect protects all sectors specified in the Sector Protection Register against program and erase, is internally pulled high and may be left floating if unused, though external connection to VCC is recommended.
6	VCC	power_in	Device power supply (2.3V to 3.6V or 2.5V to 3.6V depending on voltage option); operation at invalid VCC voltages may produce spurious results.
7	GND	power_in	Ground reference for the power supply, to be connected to system ground.
8	SO	output	Serial Output shifts data out of the device on the falling edge of SCK and is high-impedance whenever the device is deselected (CS high).
9	EP	passive	Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter	Value
Manufacturer	Adesto Technologies
Package	UDFN-8-EP(5x6)
Category	Memory
Pins	9

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter	Symbol	Min	Typ	Max	Unit	Conditions	Page
Storage Temperature		-65		150	°C		46
Temperature under Bias		-55		125	°C		46
All Output Voltages with Respect to Ground		-0.6		4.2	V	Max VCC of 3.6V + 0.6V	46
All Input Voltages with Respect to Ground		-0.6		4.2	V	excluding VCC pin, including NC pins; Max VCC of 3.6V + 0.6V	46
Operating Temperature (Case) Industrial		-40		85	°C		46
VCC Power Supply (2.3V Version)	VCC	2.3		3.6	V		46
Ultra-Deep Power-Down Current	IUDPD		0.4	1	µA	CS= VCC. All other inputs at 0V or VCC	47
Deep Power-Down Current	IDPD		5	12	µA	CS= VCC. All other inputs at 0V or VCC	47
Standby Current	ISB		25	50	µA	CS= VCC. All other inputs at 0V or VCC	47
Active Current, Low Power Read (01h) Operation	ICC1		6	9	mA	f = 1MHz; IOUT = 0mA	47
Active Current, Low Power Read (01h) Operation	ICC1		7	11	mA	f = 15MHz; IOUT = 0mA	47
Active Current, Read Operation	ICC2		12	17	mA	f = 50MHz; IOUT = 0mA	47
Active Current, Read Operation	ICC2		16	22	mA	f = 85MHz; IOUT = 0mA	47
Active Current, Program Operation	ICC3		12	18	mA	CS=VCC	47
Active Current, Erase Operation	ICC4		12	18	mA	CS=VCC	47
Input Load Current	ILI			1	µA	All inputs at CMOS levels	47
Output Leakage Current	ILO			1	µA	All inputs at CMOS levels	47
Input Low Voltage	VIL			0.3	x VCC	printed as VCC x 0.3	47
Input High Voltage	VIH	0.7			x VCC	printed as VCC x 0.7	47
Input High Voltage	VIH			0.6	V above VCC	printed as VCC + 0.6	47
Output Low Voltage	VOL			0.4	V	IOL = 100µA	47
Output High Voltage	VOH	0.2			V below VCC	IOH = -100µA; printed as VCC - 0.2V	47
SCK Frequency	fSCK			70	MHz		48
SCK Frequency for Continuous Read (0x0B)	fCAR1			85	MHz		48
SCK Frequency for Continuous Read (0x03) (Low Frequency)	fCAR2			50	MHz		48
SCK Frequency for Continuous Read (Low Power Mode, 01h Opcode)	fCAR3			15	MHz		48
SCK Frequency for Continuous Read (0x1B)	fCAR4			104	MHz		48
SCK High Time	tWH	4			ns		48
SCK Low Time	tWL	4			ns		48
SCK Rise Time, Peak-to-peak	tSCKR			0.1	V/ns		48
SCK Fall Time, Peak-to-peak	tSCKF			0.1	V/ns		48
Minimum CS High Time	tCS	20			ns		48
CS Setup Time	tCSS	5			ns		48
CS Hold Time	tCSH	5			ns		48
Data In Setup Time	tSU	2			ns		48
Data In Hold Time	tH	1			ns		48
Output Hold Time	tHO	0			ns		48
Output Disable Time	tDIS			6	ns		48
Output Valid	tV			7	ns		48
WP Low to Protection Enabled	tWPE			1	µs		48
WP High to Protection Disabled	tWPD			1	µs		48
Freeze Sector Lockdown Time (from CS High)	tLOCK			100	µs	from CS High	48
CS High to Ultra-Deep Power-Down	tEUDPD			4	µs		48
Minimum CS Low Time to Exit Ultra-Deep Power-Down	tCSLU	20			ns		48
Exit Ultra-Deep Power-Down Time	tXUDPD			180	µs		48
CS High to Deep Power-Down	tEDPD			2	µs		48
Resume from Deep Power-Down Time	tRDPD			35	µs		48
Page to Buffer Transfer Time	tXFR			200	µs		48
Page to Buffer Compare Time	tCOMP			200	µs		48
RESET Pulse Width	tRST	10			µs		48
RESET Recovery Time	tREC	1			µs		48
Software Reset Time	tSWRST			35	µs		48
Page Erase and Programming Time (512/528 bytes)	tEP		17	25	ms		49
Page Programming Time	tP		3	4	ms		49
Page Erase Time	tPE		12	35	ms		49
Block Erase Time	tBE		45	100	ms		49
Sector Erase Time	tSE		1.4	2	s		49
Chip Erase Time	tCE		22	40	s		49
OTP Security Register Program Time	tOTPP		200	500	µs		49

CAD (KiCad official)

Symbol: AT45DB161E-MHF2B-T
Footprint: Package_DFN_QFN:DFN-S-8-1EP_6x5mm_P1.27mm
3D model: UDFN-8-EP(5x6) (KiCad packages3D, STEP)
3D model files: at45db161e-mhf2b-t-etched.step / at45db161e-mhf2b-t-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); at45db161e-mhf2b-t.step / at45db161e-mhf2b-t.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Adesto Technologies datasheet (74 pp, sha256 906218a43927e1e0, retrieved 2026-11-02, tier: lcsc)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF

AT45DB161E-MHF2B-T

Verified AT45DB161E-MHF2B-T

Verification log 1 record

3D Model

Symbol & Footprint

Schematic Symbol

PCB Footprint

Datasheet

README