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AT34C04-X5M-T
Public Made by Adomby adom
Microchip Tech Pre-ordered Chips, TSSOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownAT34C04-X5M-T
Microchip Tech · Pre-ordered Chips · TSSOP-8
AT34C04-X5M-T from Microchip Tech, in a TSSOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | A0 | input | Device address input, one of the three LSBs of the I2C FM+ seven-bit slave address, connectable to VCC or GND; it is also overvoltage tolerant up to 10V to support Reversible Software Write Protection (RSWP). |
| 2 | A1 | input | Device address input, one of the three LSBs of the I2C FM+ seven-bit slave address, which can be connected directly to VCC or GND in any combination to allow up to eight devices on the same bus. |
| 3 | A2 | input | Device address input, one of the three LSBs of the I2C FM+ seven-bit slave address, which can be connected directly to VCC or GND in any combination to allow up to eight devices on the same bus. |
| 4 | GND | power_in | Ground reference for the power supply, which should be connected to the system ground. |
| 5 | SDA | bidirectional | Open-drain serial data pin that must be pulled high with an external pull-up resistor not exceeding 8K and may be wire-ORed with other open-drain or open-collector devices on the bus. |
| 6 | SCL | input | Serial clock input that latches SDA data on the rising edge and clocks SDA data out on the falling edge; it must be forced high when the bus is idle or pulled high with an external resistor. |
| 7 | NC | unconnected | No connect; the pin is not bonded to a die pad and can be connected to GND or left floating. |
| 8 | VCC | power_in | Device power supply pin rated for 1.7V to 3.6V per the features list; operation at invalid VCC voltages may produce spurious results and should not be attempted. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | TSSOP-8 |
| Category | Interface ICs |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply Voltage | VCC | 1.7 | 3.6 | V | 10 | ||
| Operating Temperature Range | TA | -20 | 125 | °C | 10 | ||
| Temperature Under Bias | -40 | 125 | °C | 10 | |||
| Supply Voltage with respect to ground | -0.5 | 4.3 | V | 10 | |||
| Supply Current Read | ICC1 | 0.4 | 1 | mA | VCC = 3.6V Read at 100kHz | 10 | |
| Supply Current Write | ICC2 | 1.5 | 3 | mA | VCC = 3.6V Write at 100kHz | 10 | |
| Standby Current | ISB | 1.6 | 3 | μA | VCC = 1.7V VIN = VCC or VSS | 10 | |
| Standby Current | ISB | 1.6 | 4 | μA | VCC = 3.6V VIN = VCC or VSS | 10 | |
| Input Leakage Current | ILI | 0.1 | 2 | μA | VIN = VCC or VSS | 10 | |
| Output Leakage Current | ILO | 0.1 | 2 | μA | VOUT = VCC or VSS | 10 | |
| Input Low Level | VIL | -0.5 | V | 10 | |||
| Low-Level Output Voltage (Open-Drain) | VOL1 | 0.4 | V | VCC > 2V IOL = 3mA | 10 | ||
| Low-Level Output Current | IOL | 3 | mA | VOL = 0.4V Freq ≤ 400kHz | 10 | ||
| Low-Level Output Current | IOL | 6 | mA | VOL = 0.6V Freq ≤ 400kHz | 10 | ||
| Low-Level Output Current | IOL | 20 | mA | VOL = 0.4V Freq > 400kHz | 10 | ||
| A0 Pin High Voltage | VHV | 7 | 10 | V | VHV - VCC ≥ 4.8V | 10 | |
| Input/output capacitance (SDA) | CI/O | 8 | pF | VI/O = 0V | 12 | ||
| Input capacitance (A0, A1, A2, SCL) | CIN | 6 | pF | VIN = 0V | 12 | ||
| Clock Frequency, SCL | fSCL | 10 | 100 | kHz | VCC < 2.2V, 100kHz | 11 | |
| Clock Frequency, SCL | fSCL | 10 | 400 | kHz | VCC ≥ 2.2V, 400kHz | 11 | |
| Clock Frequency, SCL | fSCL | 10 | 1000 | kHz | VCC ≥ 2.2V, 1000kHz | 11 | |
| Clock Pulse Width Low | tLOW | 4700 | ns | VCC < 2.2V, 100kHz | 11 | ||
| Clock Pulse Width Low | tLOW | 1300 | ns | VCC ≥ 2.2V, 400kHz | 11 | ||
| Clock Pulse Width Low | tLOW | 500 | ns | VCC ≥ 2.2V, 1000kHz | 11 | ||
| Clock Pulse Width High | tHIGH | 4000 | ns | VCC < 2.2V, 100kHz | 11 | ||
| Clock Pulse Width High | tHIGH | 600 | ns | VCC ≥ 2.2V, 400kHz | 11 | ||
| Clock Pulse Width High | tHIGH | 260 | ns | VCC ≥ 2.2V, 1000kHz | 11 | ||
| Bus free time before new transmission | tBUF | 4700 | ns | VCC < 2.2V, 100kHz | 11 | ||
| Bus free time before new transmission | tBUF | 1300 | ns | VCC ≥ 2.2V, 400kHz | 11 | ||
| Bus free time before new transmission | tBUF | 500 | ns | VCC ≥ 2.2V, 1000kHz | 11 | ||
| Start Hold Time | tHD.STA | 4000 | ns | VCC < 2.2V, 100kHz | 11 | ||
| Start Hold Time | tHD.STA | 600 | ns | VCC ≥ 2.2V, 400kHz | 11 | ||
| Start Hold Time | tHD.STA | 260 | ns | VCC ≥ 2.2V, 1000kHz | 11 | ||
| Start Set-up Time | tSU.STA | 4700 | ns | VCC < 2.2V, 100kHz | 11 | ||
| Start Set-up Time | tSU.STA | 600 | ns | VCC ≥ 2.2V, 400kHz | 11 | ||
| Start Set-up Time | tSU.STA | 260 | ns | VCC ≥ 2.2V, 1000kHz | 11 | ||
| Data In Hold Time | tHD.DI | 0 | ns | VCC < 2.2V, 100kHz | 11 | ||
| Data In Set-up Time | tSU.DAT | 250 | ns | VCC < 2.2V, 100kHz | 11 | ||
| Data In Set-up Time | tSU.DAT | 100 | ns | VCC ≥ 2.2V, 400kHz | 11 | ||
| Data In Set-up Time | tSU.DAT | 50 | ns | VCC ≥ 2.2V, 1000kHz | 11 | ||
| Inputs Rise Time | tR | 1000 | ns | VCC < 2.2V, 100kHz | 11 | ||
| Inputs Rise Time | tR | 20 | 300 | ns | VCC ≥ 2.2V, 400kHz | 11 | |
| Inputs Rise Time | tR | 20 | 120 | ns | VCC ≥ 2.2V, 1000kHz | 11 | |
| Inputs Fall Time | tF | 300 | ns | VCC < 2.2V, 100kHz | 11 | ||
| Inputs Fall Time | tF | 20 | 300 | ns | VCC ≥ 2.2V, 400kHz | 11 | |
| Inputs Fall Time | tF | 20 | 120 | ns | VCC ≥ 2.2V, 1000kHz | 11 | |
| Stop Set-up Time | tSU.STO | 4000 | ns | VCC < 2.2V, 100kHz | 11 | ||
| Stop Set-up Time | tSU.STO | 600 | ns | VCC ≥ 2.2V, 400kHz | 11 | ||
| Stop Set-up Time | tSU.STO | 260 | ns | VCC ≥ 2.2V, 1000kHz | 11 | ||
| Data Out Hold Time | tHD.DAT | 200 | 3450 | ns | VCC < 2.2V, 100kHz | 11 | |
| Data Out Hold Time | tHD.DAT | 200 | 900 | ns | VCC ≥ 2.2V, 400kHz | 11 | |
| Data Out Hold Time | tHD.DAT | 0 | 350 | ns | VCC ≥ 2.2V, 1000kHz | 11 | |
| Write Cycle Time | tWR | 5 | ms | VCC < 2.2V, 100kHz | 11 | ||
| Timeout Time | tOUT | 25 | 35 | ms | VCC < 2.2V, 100kHz | 11 |
CAD (KiCad official)
- Symbol:
AT34C04-X5M-T - Footprint:
Package_SO:TSSOP-8_4.4x3mm_P0.65mm - 3D model: TSSOP-8 (KiCad packages3D, STEP)
- 3D model files:
at34c04-x5m-t-etched.step/at34c04-x5m-t-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);at34c04-x5m-t.step/at34c04-x5m-t.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Microchip Tech datasheet (30 pp, sha256
507e04c664c484b3, retrieved 2026-11-05, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).