component
AT34C02D-XHM-B
Public Made by Adomby adom
Microchip Tech Pre-ordered Chips, TSSOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Made with KiCad 10.0 · needs KiCad 10.0 or later to open · KiCad file format 20260206
| Name | Last updated |
|---|---|
| docs | 12d ago |
| viewers | 12d ago |
| at34c02d-xhm-b-etched.glb | 12d ago |
| at34c02d-xhm-b-etched.step | 12d ago |
| at34c02d-xhm-b-hero.glb | 12d ago |
| at34c02d-xhm-b-hero.overlay.json | 12d ago |
| at34c02d-xhm-b.glb | 12d ago |
| at34c02d-xhm-b.kicad_mod | 12d ago |
| at34c02d-xhm-b.kicad_sym | 12d ago |
| at34c02d-xhm-b.lbr | 12d ago |
| at34c02d-xhm-b.step | 12d ago |
| package.json | 12d ago |
| page.json | 12d ago |
| README.md | 12d ago |
AT34C02D-XHM-B
Microchip Tech · Pre-ordered Chips · TSSOP-8
AT34C02D-XHM-B from Microchip Tech, in a TSSOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | A0 | input | Device address input hardwired to GND or VCC; if left floating it is internally pulled down to GND, but connecting it to a known state is recommended (10k or less pull-up). |
| 2 | A1 | input | Device address input hardwired to GND or VCC; if left floating it is internally pulled down to GND, but connecting it to a known state is recommended (10k or less pull-up). |
| 3 | A2 | input | Device address input hardwired to GND or VCC; if left floating it is internally pulled down to GND, but connecting it to a known state is recommended (10k or less pull-up). |
| 4 | GND | power_in | Ground. |
| 5 | SDA | bidirectional | Bidirectional serial data pin, open-drain driven, may be wire-ORed with other open-drain or open-collector devices. |
| 6 | SCL | input | Serial clock input that clocks data into the device on the positive edge and out of the device on the negative edge. |
| 7 | WP | input | Write protect input: GND allows normal writes, VCC inhibits all writes to the memory, and if left floating it is internally pulled down to GND. |
| 8 | VCC | power_in | Power supply, 1.7V to 5.5V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | TSSOP-8 |
| Category | Interface ICs |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply Voltage | VCC | 1.7 | 5.5 | V | 5 | ||
| Supply Current Read | ICC1 | 1 | 2 | mA | VCC = 5.0V Read at 400kHz | 5 | |
| Supply Current Write | ICC2 | 2 | 3 | mA | VCC = 5.0V Write at 400kHz | 5 | |
| Standby Current | ISB1 | 1 | μA | VCC = 1.7V VIN = VCC or VSS | 5 | ||
| Standby Current | ISB2 | 3 | μA | VCC = 3.6V VIN = VCC or VSS | 5 | ||
| Standby Current | ISB3 | 6 | μA | VCC = 5.5V VIN = VCC or VSS, A0 = VSS | 5 | ||
| Input Leakage Current | ILI | 0.1 | 3 | μA | VIN = VCC or VSS | 5 | |
| Output Leakage Current | ILO | 0.05 | 3 | μA | VOUT = VCC or VSS | 5 | |
| Input Low Level | VIL | -0.6 | V | max is VCC x 0.3; reference only, not tested | 5 | ||
| Output Low Level | VOL2 | 0.4 | V | VCC = 3.0V IOL = 2.1mA | 5 | ||
| Output Low Level | VOL1 | 0.2 | V | VCC = 1.7V IOL = 0.15mA | 5 | ||
| Input/Output Capacitance (SDA) | CI/O | 8 | pF | VI/O = 0V | 5 | ||
| Input Capacitance (A0, A1, A2, SCL) | CIN | 6 | pF | VIN = 0V | 5 | ||
| Operating Temperature | -55 | 125 | °C | 5 | |||
| Storage Temperature | -65 | 150 | °C | 5 | |||
| Voltage on any pin with respect to ground | -1 | 7 | V | 5 | |||
| Maximum Operating Voltage | 6.25 | V | 5 | ||||
| DC Output Current | 5 | mA | 5 | ||||
| High voltage for write protect register | VHV | 7 | 10 | V | VHV - VCC > 4.8V | 12 | |
| Write Cycle Time | tWR | 5 | ms | 6 | |||
| Clock Frequency, SCL | fSCL | 100 | kHz | VCC = 1.7 to 3.6V, first column | 6 | ||
| Clock Frequency, SCL | fSCL | 400 | kHz | VCC = 1.7 to 3.6V, second column | 6 | ||
| Clock Frequency, SCL | fSCL | 1000 | kHz | VCC = 3.6V to 5.5V | 6 | ||
| Clock Pulse Width Low | tLOW | 4700 | ns | VCC = 1.7 to 3.6V, first column | 6 | ||
| Clock Pulse Width Low | tLOW | 1300 | ns | VCC = 1.7 to 3.6V, second column | 6 | ||
| Clock Pulse Width Low | tLOW | 400 | ns | VCC = 3.6V to 5.5V | 6 | ||
| Clock Pulse Width High | tHIGH | 4000 | ns | VCC = 1.7 to 3.6V, first column | 6 | ||
| Clock Pulse Width High | tHIGH | 600 | ns | VCC = 1.7 to 3.6V, second column | 6 | ||
| Clock Pulse Width High | tHIGH | 400 | ns | VCC = 3.6V to 5.5V | 6 | ||
| Inputs Rise Time | tR | 1000 | ns | VCC = 1.7 to 3.6V, first column | 6 | ||
| Inputs Rise Time | tR | 300 | ns | VCC = 1.7 to 3.6V, second column | 6 | ||
| Inputs Rise Time | tR | 100 | ns | VCC = 3.6V to 5.5V | 6 | ||
| Inputs Fall Time | tF | 300 | ns | VCC = 1.7 to 3.6V, first column | 6 | ||
| Inputs Fall Time | tF | 100 | ns | VCC = 3.6V to 5.5V | 6 | ||
| Data in Set-up Time | tSU.DAT | 250 | ns | VCC = 1.7 to 3.6V, first column | 6 | ||
| Data in Set-up Time | tSU.DAT | 100 | ns | VCC = 1.7 to 3.6V, second column | 6 | ||
| Data in Hold Time | tHD.DI | 0 | ns | VCC = 1.7 to 3.6V, first column | 6 | ||
| Data Out Hold Time | tHD.DAT | 200 | 3450 | ns | VCC = 1.7 to 3.6V, first column | 6 | |
| Data Out Hold Time | tHD.DAT | 200 | 900 | ns | VCC = 1.7 to 3.6V, second column | 6 | |
| Data Out Hold Time | tHD.DAT | 50 | 550 | ns | VCC = 3.6V to 5.5V | 6 | |
| Start Condition Set-up Time | tSU.STA | 4700 | ns | VCC = 1.7 to 3.6V, first column | 6 | ||
| Start Condition Set-up Time | tSU.STA | 600 | ns | VCC = 1.7 to 3.6V, second column | 6 | ||
| Start Condition Set-up Time | tSU.STA | 250 | ns | VCC = 3.6V to 5.5V | 6 | ||
| Start Condition Hold Time | tHD.STA | 4000 | ns | VCC = 1.7 to 3.6V, first column | 6 | ||
| Start Condition Hold Time | tHD.STA | 600 | ns | VCC = 1.7 to 3.6V, second column | 6 | ||
| Start Condition Hold Time | tHD.STA | 250 | ns | VCC = 3.6V to 5.5V | 6 | ||
| Stop Condition Set-up Time | tSU.STO | 4000 | ns | VCC = 1.7 to 3.6V, first column | 6 | ||
| Stop Condition Set-up Time | tSU.STO | 600 | ns | VCC = 1.7 to 3.6V, second column | 6 | ||
| Stop Condition Set-up Time | tSU.STO | 250 | ns | VCC = 3.6V to 5.5V | 6 | ||
| Pulse Width of Spikes Suppressed, Single Glitch | tI | 100 | ns | VCC = 1.7 to 3.6V, first column | 6 | ||
| Pulse Width of Spikes Suppressed, Single Glitch | tI | 50 | ns | VCC = 3.6V to 5.5V | 6 | ||
| Bus free time before new transmission | tBUF | 4700 | ns | VCC = 1.7 to 3.6V, first column | 6 | ||
| Bus free time before new transmission | tBUF | 1300 | ns | VCC = 1.7 to 3.6V, second column | 6 | ||
| Bus free time before new transmission | tBUF | 50 | ns | VCC = 3.6V to 5.5V | 6 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | tin | U = Green, Matte Sn Lead Finish, | 18 |
CAD (KiCad official)
- Symbol:
AT34C02D-XHM-B - Footprint:
Package_SO:TSSOP-8_3x3mm_P0.65mm - 3D model: TSSOP-8 (KiCad packages3D, STEP)
- 3D model files:
at34c02d-xhm-b-etched.step/at34c02d-xhm-b-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);at34c02d-xhm-b.step/at34c02d-xhm-b.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Microchip Tech datasheet (25 pp, sha256
c6fc4a238117bb07, retrieved 2026-10-23, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).