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AT32UC3B0256-Z2UT

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Microchip Tech Pre-ordered MCUs, QFN-64-EP(9x9). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentembedded processors & controllersat32uc3b0256-z2utfactory-2.0.0extractor-text

Verified AT32UC3B0256-Z2UT

by Ray · last 31 Oct 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

31 Oct 2026RayPublished by the parts factory: tier mfr, 65 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: AT32UC3B0256-Z2UT · QFN-64-EP(9x9) · 65 pins
  • ✓copper: 65 copper pads, none touching another net
  • ✓datasheet: all 65 pin names found in the 107-page datasheet
  • •distributor (warn): no ['digikey', 'mouser'] number
  • ✓family: QFN-64-1EP_9x9mm_P0.5mm_EP6x6mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-jo1b5762/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • •package_fit (skip): no component.package_dims on the page: the model is unchecked against the datasheet drawing
  • ✓pads: 65 pins = 65 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 65 pins agree
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ at32uc3b0256-z2ut.kicad_sym✓ at32uc3b0256-z2ut.kicad_mod✓ at32uc3b0256-z2ut.step
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Ray Publish 0.1.0 c692afc 4d ago

AT32UC3B0256-Z2UT

Microchip Tech · Pre-ordered MCUs · QFN-64-EP(9x9)

AT32UC3B0256-Z2UT from Microchip Tech, in a QFN-64-EP(9x9). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 GND power_in Ground.
2 TCK input JTAG test clock input (TCK).
3 PA00 bidirectional GPIO 0; takes the JTAG TDI function when JTAG is enabled.
4 PA01 bidirectional GPIO 1; takes the JTAG TDO function when JTAG is enabled.
5 PA02 bidirectional GPIO 2; takes the JTAG TMS function when JTAG is enabled.
6 PB00 bidirectional GPIO 32; function A TC A0, B EIC SCAN[2], C USART2 CTS; Nexus MDO[1] with AXS=0.
7 PB01 bidirectional GPIO 33; function A TC B0, B EIC SCAN[3], C USART2 RTS; Nexus MDO[2] with AXS=0.
8 VDDCORE power_in Core power supply, 1.65V to 1.95V.
9 PA03 bidirectional GPIO 3; function A ADC AD[0], B PM GCLK[0], C USBB USB_ID, D ABDAC DATA[0].
10 PA04 bidirectional GPIO 4; function A ADC AD[1], B PM GCLK[1], C USBB USB_VBOF, D ABDAC DATAN[0].
11 PA05 bidirectional GPIO 5; function A EIC EXTINT[0], B ADC AD[2], C USART1 DCD, D ABDAC DATA[1].
12 PA06 bidirectional GPIO 6; function A EIC EXTINT[1], B ADC AD[3], C USART1 DSR, D ABDAC DATAN[1].
13 PA07 bidirectional GPIO 7; function A PWM PWM[0], B ADC AD[4], C USART1 DTR, D SSC RX_FRAME_SYNC.
14 PA08 bidirectional GPIO 8; function A PWM PWM[1], B ADC AD[5], C USART1 RI, D SSC RX_CLOCK.
15 PA30 bidirectional GPIO 30; function A ADC AD[6], B EIC SCAN[0], C PM GCLK[2].
16 PA31 bidirectional GPIO 31; function A ADC AD[7], B EIC SCAN[1], C PWM PWM[6].
17 GNDANA power_in Analog ground.
18 ADVREF power_in ADC reference pin; no function described in the supplied text.
19 VDDANA power_in Analog power supply, 3.0V to 3.6V.
20 VDDOUT power_out Voltage regulator output, 1.65V to 1.95V.
21 VDDIN power_in Voltage regulator input supply, 3.0V to 3.6V.
22 VDDCORE power_in Core power supply, 1.65V to 1.95V.
23 GND power_in Ground.
24 PB02 bidirectional GPIO 34; function A EIC EXTINT[6], B TC A1, C USART1 TXD; Nexus MDO[3] with AXS=0.
25 PB03 bidirectional GPIO 35; function A EIC EXTINT[7], B TC B1, C USART1 RXD; Nexus MDO[4] with AXS=0.
26 PB04 bidirectional GPIO 36; function A USART1 CTS, B SPI0 NPCS[3], C TC CLK2; Nexus MDO[5] with AXS=0.
27 PB05 bidirectional GPIO 37; function A USART1 RTS, B SPI0 NPCS[2], C PWM PWM[5]; Nexus EVTI_N with AXS=0.
28 PA09 bidirectional GPIO 9; function A TWI SCL, B SPI0 NPCS[2], C USART1 CTS.
29 PA10 bidirectional GPIO 10; function A TWI SDA, B SPI0 NPCS[3], C USART1 RTS.
30 PA11 bidirectional GPIO 11; function A USART0 RTS, B TC A2, C PWM PWM[0], D SSC RX_DATA; also XIN32 oscillator pin.
31 PA12 bidirectional GPIO 12; function A USART0 CTS, B TC B2, C PWM PWM[1], D USART1 TXD; also XOUT32 oscillator pin.
32 VDDIO power_in I/O power supply, 3.0V to 3.6V.
33 PA13 bidirectional GPIO 13; function A EIC NMI, B PWM PWM[2], C USART0 CLK, D SSC RX_CLOCK.
34 PA14 bidirectional GPIO 14; function A SPI0 MOSI, B PWM PWM[3], C EIC EXTINT[2], D PM GCLK[2].
35 PA15 bidirectional GPIO 15; function A SPI0 SCK, B PWM PWM[4], C USART2 CLK; Nexus EVTO_N.
36 PA16 bidirectional GPIO 16; function A SPI0 NPCS[0], B TC CLK1, C PWM PWM[4].
37 PA17 bidirectional GPIO 17; function A SPI0 NPCS[1], B TC CLK2, C SPI0 SCK, D USART1 RXD.
38 PB06 bidirectional GPIO 38; function A SSC RX_CLOCK, B USART1 DCD, C EIC SCAN[4], D ABDAC DATA[0].
39 PA18 bidirectional GPIO 18; function A USART0 RXD, B PWM PWM[5], C SPI0 MISO, D SSC RX_FRAME_SYNC; also XIN0 oscillator pin.
40 PA19 bidirectional GPIO 19; function A USART0 TXD, B PWM PWM[6], C SPI0 MOSI, D SSC TX_CLOCK; also XOUT0 oscillator pin.
41 PA28 bidirectional GPIO 28; function A USART0 CLK, B PWM PWM[4], C SPI0 MISO, D ABDAC DATAN[0]; also XIN1 oscillator pin.
42 PA29 bidirectional GPIO 29; function A TC CLK0, B TC CLK1, C SPI0 MOSI; also XOUT1 oscillator pin.
43 PB07 bidirectional GPIO 39; function A SSC RX_DATA, B USART1 DSR, C EIC SCAN[5], D ABDAC DATAN[0].
44 PA20 bidirectional High drive current GPIO 20; function A USART1 CLK, B TC CLK0, C USART2 RXD, D SSC TX_DATA.
45 PA21 bidirectional High drive current GPIO 21; function A PWM PWM[2], B TC A1, C USART2 TXD, D SSC TX_FRAME_SYNC.
46 PA22 bidirectional High drive current GPIO 22; function A PWM PWM[6], B TC B1, C ADC TRIGGER, D ABDAC DATA[0].
47 PA23 bidirectional High drive current GPIO 23; function A USART1 TXD, B SPI0 NPCS[1], C EIC EXTINT[3], D PWM PWM[0].
48 VDDIO power_in I/O power supply, 3.0V to 3.6V.
49 GND power_in Ground.
50 DP bidirectional USB D+ data line; no further description in the supplied text.
51 DM bidirectional USB D- data line; no further description in the supplied text.
52 VBUS power_in USB VBUS pin; no further description in the supplied text.
53 VDDPLL power_in PLL power supply, 1.65V to 1.95V.
54 PB08 bidirectional GPIO 40; function A SSC RX_FRAME_SYNC, B USART1 DTR, C EIC SCAN[6], D ABDAC DATA[1].
55 PB09 bidirectional GPIO 41; function A SSC TX_CLOCK, B USART1 RI, C EIC SCAN[7], D ABDAC DATAN[1].
56 VDDCORE power_in Core power supply, 1.65V to 1.95V.
57 PB10 bidirectional GPIO 42; function A SSC TX_DATA, B TC A2, C USART0 RXD.
58 PB11 bidirectional GPIO 43; function A SSC TX_FRAME_SYNC, B TC B2, C USART0 TXD.
59 PA24 bidirectional GPIO 24; function A USART1 RXD, B SPI0 NPCS[0], C EIC EXTINT[4], D PWM PWM[1].
60 PA25 bidirectional GPIO 25; function A SPI0 MISO, B PWM PWM[3], C EIC EXTINT[5].
61 PA26 bidirectional GPIO 26; function A USBB USB_ID, B USART2 TXD, C TC A0, D ABDAC DATA[1].
62 PA27 bidirectional GPIO 27; function A USBB USB_VBOF, B USART2 RXD, C TC B0, D ABDAC DATAN[1].
63 RESET_N input Active-low reset input.
64 VDDIO power_in I/O power supply, 3.0V to 3.6V.
65 EP passive Exposed pad, not connected internally but should be soldered to ground to increase board level reliability.

Key specifications

Parameter Value
Manufacturer Microchip Tech
Package QFN-64-EP(9x9)
Category Embedded Processors & Controllers
Pins 65

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
DC Supply Core VVDDCORE 1.65 1.95 V 36
DC Supply PLL VVDDPLL 1.65 1.95 V 36
DC Supply Peripheral I/Os VVDDIO 3 3.6 V 36
Input Low-level Voltage VIL -0.3 0.8 V 36
Input High-level Voltage VIH 2 5.5 V All I/O pins except TCK, RESET_N, PA03-PA08, PA11, PA12, PA18, PA19, PA28-PA31 36
Input High-level Voltage VIH 2 3.6 V TCK, RESET_N, PA03, PA04, PA05, PA06, PA07, PA08, PA11, PA12, PA18, PA19, PA28, PA29, PA30, PA31 36
Output Low-level Voltage VOL 0.4 V IOL= -4mA for all I/O except PA20, PA21, PA22, PA23 36
Output High-level Voltage VOH -0.4 V IOL= -4mA for all I/O except PA20-PA23; printed as VVDDIO -0.4 (min, relative to VVDDIO) 36
Output Low-level Current IOL -4 mA All I/O pins except PA20, PA21, PA22, PA23 36
Output Low-level Current IOL -8 mA PA20, PA21, PA22, PA23 36
Output High-level Current IOH 4 mA All I/O pins except for PA20, PA21, PA22, PA23 36
Output High-level Current IOH 8 mA PA20, PA21, PA22, PA23 36
Input Leakage Current ILEAK 1 µA Pullup resistors disabled 36
Input Capacitance CIN 7 pF QFN64 37
Pull-up Resistance RPULLUP 13 19 25 KΩ All I/O pins except RESET_N, TCK, TDI, TMS pins 37
Pull-up Resistance RPULLUP 5 12 25 KΩ RESET_N pin, TCK, TDI, TMS pins 37
Static Current ISC 6 µA On VVDDCORE = 1.8V, device in static mode, All inputs driven including JTAG; RESET_N=1, TA = 25°C 37
Static Current ISC 42.5 µA On VVDDCORE = 1.8V, device in static mode, All inputs driven including JTAG; RESET_N=1, TA = 85°C 37
Regulator Supply voltage (input) VVDDIN 3 3.3 3.6 V 38
Regulator Supply voltage (output) VVDDOUT 1.7 1.8 1.85 V 38
Maximum DC output current IOUT 100 mA VVDDIN = 3.3V 38
Static Current of internal regulator ISCR 10 µA Low Power mode (stop, deep stop or static) at TA = 25°C 38
Analog voltage reference (input) VADVREF 2.6 3.6 V 38
BOD level 00 0000b BODLEVEL 1.44 V Value 00 0000b 38
BOD level 01 0111b BODLEVEL 1.52 V Value 01 0111b 38
BOD level 01 1111b BODLEVEL 1.61 V Value 01 1111b 38
BOD level 10 0111b BODLEVEL 1.71 V Value 10 0111b 38
VDDCORE rise rate to ensure power-on-reset VDDRR 2.5 V/ms 39
VDDCORE fall rate to ensure power-on-reset VDDFR 0.01 400 V/ms 39
POR rising threshold voltage VPOR+ 1.4 1.55 1.65 V Rising VDDCORE: VRESTART -> VPOR+ 39
POR falling threshold voltage VPOR- 1.2 1.3 1.4 V Falling VDDCORE: 1.8V -> VPOR+ 39
VRESTART VRESTART -0.1 0.5 V Falling VDDCORE: 1.8V -> VRESTART 39
Reset signal propagation time TRST 200 400 µs 39
RESET_N minimum pulse width tRESET 10 ns 41
CPU Clock Frequency 1/(tCPCPU) 60 MHz 45
RC Oscillator Frequency FRC 112 KHz TA = 25°C 46
Main oscillator crystal frequency 1/(tCPMAIN) 0.4 20 MHz Crystal 47
PLL VCO Output Frequency FOUT 80 240 MHz 47
PLL Input Frequency FIN 4 16 MHz 47
Flash Operating Frequency FFOP 33 MHz FWS = 0 54
Flash Operating Frequency FFOP 60 MHz FWS = 1 54
Page Programming Time TFPP 4 ms 54
Flash Data Retention Time TFDR 15 Year 54
Operating Temperature -40 85 °C 35
Storage Temperature -60 150 °C 35
Voltage on GPIO Pins -0.3 3.6 V with respect to Ground for TCK, RESET_N, PA03-PA08, PA11, PA12, PA18, PA19, PA28-PA31 35
Voltage on GPIO Pins -0.3 5.5 V with respect to Ground except for TCK, RESET_N, PA03-PA08, PA11, PA12, PA18, PA19, PA28-PA31 35
Maximum Operating Voltage (VDDCORE, VDDPLL) 1.95 V 35
Maximum Operating Voltage (VDDIO,VDDIN,VDDANA) 3.6 V 35
Total DC Output Current on all I/O Pin 265 mA for 64-pin package 35
Active mode current at 60 MHz 18.5 mA Same conditions at 60 MHz 43
Stop mode current 37.8 µA CPU running in sleep mode; XIN0, Xin1 and XIN32 stopped 43

CAD (KiCad official)

  • Symbol: AT32UC3B0256-Z2UT
  • Footprint: Package_DFN_QFN:QFN-64-1EP_9x9mm_P0.5mm_EP6x6mm
  • 3D model: QFN-64-EP(9x9) (KiCad packages3D, STEP)
  • 3D model files: at32uc3b0256-z2ut-etched.step / at32uc3b0256-z2ut-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); at32uc3b0256-z2ut.step / at32uc3b0256-z2ut.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Microchip Tech datasheet (107 pp, sha256 01c74c26b6c27695, retrieved 2026-10-31, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF