component
AT32F437ZGT7
Public Made by Adomby adom
ARTERY Microcontrollers (MCU/MPU/SOC), LQFP-144(20x20). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownAT32F437ZGT7
ARTERY · Microcontrollers (MCU/MPU/SOC) · LQFP-144(20x20)
AT32F437ZGT7 from ARTERY, in a LQFP-144(20x20). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | PE2 | bidirectional | 5 V-tolerant GPIO (FT), reset state floating input; alternate functions include TMR3_EXT, SPI4_SCK, I2S4_CK, TMR20_CH1, QSPI1_IO2, XMC_SDNCAS, EMAC_MII_TXD3 and XMC_A23. |
| 2 | PE3 | bidirectional | 5 V-tolerant GPIO (FT); alternate functions include TMR3_CH1, TMR20_CH2, XMC_A19 and DVP_D9. |
| 3 | PE4 | bidirectional | 5 V-tolerant GPIO (FT); alternate functions include CLKOUT1, TMR3_CH2, SPI4_CS, I2S4_WS, TMR20_CH1C, XMC_A20 and DVP_D4. |
| 4 | PE5 | bidirectional | 5 V-tolerant GPIO (FT); alternate functions include TMR3_CH3, TMR9_CH1, SPI4_MISO, TMR20_CH2C, XMC_A21 and DVP_D6. |
| 5 | PE6 | bidirectional | 5 V-tolerant GPIO (FT); alternate functions include TMR3_CH4, TMR9_CH2, SPI4_MOSI, I2S4_SD, TMR20_CH3C, XMC_SDNRAS, XMC_A22 and DVP_D7. |
| 6 | VBAT | power_in | Battery backup supply, 1.62 V to 3.6 V, powers LEXT, ERTC and the battery-powered registers (BPR) when VDD is absent. |
| 7 | PC13 | bidirectional | 5 V-tolerant GPIO (FT) on the backup power switch, limited to 3 mA so it cannot source LED current as an output; alternate functions ERTC_AF1 and WKUP2; state is controlled by BPR registers after first VBAT power-up. |
| 8 | PC14/LEXT_IN | bidirectional | Standard-level GPIO (TC, not 5 V-tolerant) on the backup power switch, limited to 3 mA as output; also the LEXT 32.768 kHz oscillator input. |
| 9 | PC15/LEXT_OUT | bidirectional | Standard-level GPIO (TC, not 5 V-tolerant) on the backup power switch, limited to 3 mA as output; also the LEXT 32.768 kHz oscillator output. |
| 10 | PF0 | bidirectional | 5 V-tolerant GPIO (FT); alternate functions include I2C2_SDA and XMC_A0. |
| 11 | PF1 | bidirectional | 5 V-tolerant GPIO (FT); alternate functions include I2C2_SCL and XMC_A1. |
| 12 | PF2 | bidirectional | 5 V-tolerant GPIO (FT); alternate functions include TMR20_CH3, I2C2_SMBA and XMC_A2. |
| 13 | PF3 | bidirectional | 5 V-tolerant GPIO with analog function (FTa), not 5 V-tolerant in analog mode; alternate functions include TMR20_CH4 and XMC_A3; analog input ADC3_IN9. |
| 14 | PF4 | bidirectional | 5 V-tolerant GPIO with analog function (FTa), not 5 V-tolerant in analog mode; alternate functions include TMR20_CH1C and XMC_A4; analog input ADC3_IN14. |
| 15 | PF5 | bidirectional | 5 V-tolerant GPIO with analog function (FTa), not 5 V-tolerant in analog mode; alternate functions include TMR20_CH2C and XMC_A5; analog input ADC3_IN15. |
| 16 | VSS | power_in | Digital ground. |
| 17 | VDD | power_in | Digital supply for GPIO and internal LDO, 2.6 V to 3.6 V (3.0 V to 3.6 V when LDO is set to 1.3 V). |
| 18 | PF6 | bidirectional | 5 V-tolerant GPIO with analog function (FTa), not 5 V-tolerant in analog mode; alternate functions include TMR10_CH1, TMR20_CH4, UART7_RX, QSPI1_IO3 and XMC_NIORD; analog input ADC3_IN4. |
| 19 | PF7 | bidirectional | 5 V-tolerant GPIO with analog function (FTa), not 5 V-tolerant in analog mode; alternate functions include TMR11_CH1, TMR20_BRK, UART7_TX, QSPI1_IO2 and XMC_NREG; analog input ADC3_IN5. |
| 20 | PF8 | bidirectional | 5 V-tolerant GPIO with analog function (FTa), not 5 V-tolerant in analog mode; alternate functions include TMR13_CH1, QSPI1_IO0 and XMC_NIOWR; analog input ADC3_IN6. |
| 21 | PF9 | bidirectional | 5 V-tolerant GPIO with analog function (FTa), not 5 V-tolerant in analog mode; alternate functions include TMR14_CH1, TMR20_BRK, QSPI1_IO1 and XMC_CD; analog input ADC3_IN7. |
| 22 | PF10 | bidirectional | 5 V-tolerant GPIO with analog function (FTa), not 5 V-tolerant in analog mode; alternate functions include TMR1_EXT, TMR5_CH4, QSPI1_SCK, XMC_INTR and DVP_D11; analog input ADC3_IN8. |
| 23 | PH0/HEXT_IN | bidirectional | Standard-level GPIO (TC, not 5 V-tolerant); alternate function I2C1_SDA; also the HEXT 4-25 MHz crystal oscillator input. |
| 24 | PH1/HEXT_OUT | bidirectional | Standard-level GPIO (TC, not 5 V-tolerant); alternate function I2C1_SCL; also the HEXT 4-25 MHz crystal oscillator output. |
| 25 | NRST | bidirectional | Active-low device reset input with internal weak pull-up (RPU 30-50 kΩ) that also acts as internal reset output. |
| 26 | PC0 | bidirectional | 5 V-tolerant GPIO with analog function (FTa), not 5 V-tolerant in analog mode; ADC fast channel ADC123_IN10; alternate functions include I2C3_SCL, UART7_TX, SDIO2_D0 and XMC_SDNWE. |
| 27 | PC1 | bidirectional | 5 V-tolerant GPIO with analog function (FTa), not 5 V-tolerant in analog mode; ADC fast channel ADC123_IN11; alternate functions include I2C3_SDA, SPI3_MOSI, I2S3_SD, SPI2_MOSI, I2S2_SD, UART7_RX, SDIO2_D1 and EMAC_MDC. |
| 28 | PC2 | bidirectional | 5 V-tolerant GPIO with analog function (FTa), not 5 V-tolerant in analog mode; ADC fast channel ADC123_IN12; alternate functions include TMR20_CH2, SPI2_MISO, I2S2_SDEXT, UART8_TX, SDIO2_D2, EMAC_MII_TXD2, XMC_SDCS0 and XMC_NWE. |
| 29 | PC3 | bidirectional | 5 V-tolerant GPIO with analog function (FTa), not 5 V-tolerant in analog mode; ADC fast channel ADC123_IN13; alternate functions include SPI2_MOSI, I2S2_SD, UART8_RX, QSPI2_IO1, SDIO2_D3, EMAC_MII_TX_CLK, XMC_SDCKE0 and XMC_A0. |
| 30 | NC | unconnected | Not connected (未连接) in the LQFP144 package. |
| 31 | VSSA/VREF- | power_in | Analog ground and negative reference voltage; VSSA must be connected to VSS. |
| 32 | VREF+ | power_in | Positive reference voltage input; the DAC specifies VREF+ of 2.0 V to 3.6 V. |
| 33 | VDDA | power_in | Analog supply for ADC and DAC, 2.6 V to 3.6 V; must be connected to VDD. |
| 34 | PA0 | bidirectional | 5 V-tolerant GPIO with analog function (FTa), not 5 V-tolerant in analog mode; ADC fast channel ADC123_IN0; alternate functions include TMR2_CH1, TMR5_CH1, I2C2_SCL, USART2_CTS, UART4_TX and EMAC_MII_CRS; also ERTC_AF2 and WKUP1. |
| 35 | PA1 | bidirectional | 5 V-tolerant GPIO with analog function (FTa), not 5 V-tolerant in analog mode; ADC fast channel ADC123_IN1; alternate functions include TMR2_CH2, TMR5_CH2, I2C2_SDA, SPI4_MOSI, I2S4_SD, USART2_RTS_DE, UART4_RX, QSPI1_IO3 and EMAC_RMII_REF_CLK. |
| 36 | PA2 | bidirectional | 5 V-tolerant GPIO with analog function (FTa), not 5 V-tolerant in analog mode; analog input ADC123_IN2; alternate functions include TMR2_CH3, TMR5_CH3, TMR9_CH1, USART2_TX, SDIO2_CK, EMAC_MDIO and XMC_D4. |
| 37 | PA3 | bidirectional | 5 V-tolerant GPIO with analog function (FTa), not 5 V-tolerant in analog mode; analog input ADC123_IN3; alternate functions include TMR2_CH4, TMR5_CH4, TMR9_CH2, I2S2_MCK, USART2_RX, QSPI2_IO3, SDIO2_CMD, EMAC_MII_COL and XMC_D5. |
| 38 | VSS | power_in | Digital ground. |
| 39 | VDD | power_in | Digital supply for GPIO and internal LDO, 2.6 V to 3.6 V (3.0 V to 3.6 V when LDO is set to 1.3 V). |
| 40 | PA4 | bidirectional | 5 V-tolerant GPIO with analog function (FTa), not 5 V-tolerant in analog mode; ADC12_IN4 and DAC1_OUT; alternate functions include SPI1_CS, I2S1_WS, SPI3_CS, I2S3_WS, USART2_CK, USART6_TX, SDIO2_D4, OTGFS2_SOF, DVP_HSYNC and XMC_D6. |
| 41 | PA5 | bidirectional | 5 V-tolerant GPIO with analog function (FTa), not 5 V-tolerant in analog mode; ADC12_IN5 and DAC2_OUT; alternate functions include TMR2_CH1, TMR2_EXT, TMR8_CH1C, SPI1_SCK, I2S1_CK, USART6_RX, QSPI2_IO2, SDIO2_D5 and XMC_D7. |
| 42 | PA6 | bidirectional | 5 V-tolerant GPIO with analog function (FTa), not 5 V-tolerant in analog mode; ADC12_IN6; alternate functions include TMR1_BRK, TMR3_CH1, TMR8_BRK, SPI1_MISO, I2S2_MCK, USART3_CTS, TMR13_CH1, QSPI1_IO0, SDIO1_CMD and DVP_PCLK. |
| 43 | PA7 | bidirectional | 5 V-tolerant GPIO with analog function (FTa), not 5 V-tolerant in analog mode; ADC12_IN7; alternate functions include TMR1_CH1C, TMR3_CH2, TMR8_CH1C, SPI1_MOSI, I2S1_SD, TMR14_CH1, QSPI1_IO1, EMAC_MII_RX_DV and XMC_SDNWE. |
| 44 | PC4 | bidirectional | 5 V-tolerant GPIO with analog function (FTa), not 5 V-tolerant in analog mode; ADC12_IN14; alternate functions include TMR9_CH1, I2S1_MCK, USART3_TX, QSPI1_IO2, EMAC_MII_RXD0, XMC_SDCS0, SDIO2_CK and XMC_NE4. |
| 45 | PC5 | bidirectional | 5 V-tolerant GPIO with analog function (FTa), not 5 V-tolerant in analog mode; ADC12_IN15; alternate functions include TMR9_CH2, I2C1_SMBA, USART3_RX, QSPI1_IO3, EMAC_MII_RXD1, XMC_SDCKE0, SDIO2_CMD and XMC_NOE. |
| 46 | PB0 | bidirectional | 5 V-tolerant GPIO with analog function (FTa), not 5 V-tolerant in analog mode; ADC12_IN8; alternate functions include TMR1_CH2C, TMR3_CH3, TMR8_CH2C, I2S1_MCK, USART2_RX, SPI3_MOSI, I2S3_SD, QSPI2_IO0, QSPI1_IO0, EMAC_MII_RXD2 and SDIO1_D1. |
| 47 | PB1 | bidirectional | 5 V-tolerant GPIO with analog function (FTa), not 5 V-tolerant in analog mode; ADC12_IN9; alternate functions include TMR1_CH3C, TMR3_CH4, TMR8_CH3C, SPI2_SCK, I2S2_CK, USART3_RTS_DE, QSPI1_SCK, QSPI2_SCK, EMAC_MII_RXD3 and SDIO1_D2. |
| 48 | PB2/BOOT1 | bidirectional | 5 V-tolerant GPIO (FT) that also serves as the BOOT1 pin; alternate functions include TMR2_CH4, TMR20_CH1, I2C3_SMBA, SPI3_MOSI, I2S3_SD, QSPI1_SCK and SDIO1_CK. |
| 49 | PF11 | bidirectional | 5 V-tolerant GPIO (FT); alternate functions include TMR20_EXT, TMR8_EXT, XMC_SDNRAS and DVP_D12. |
| 50 | PF12 | bidirectional | 5 V-tolerant GPIO (FT); alternate functions include TMR20_CH1, TMR8_BRK and XMC_A6. |
| 51 | VSS | power_in | Digital ground. |
| 52 | VDD | power_in | Digital supply for GPIO and internal LDO, 2.6 V to 3.6 V (3.0 V to 3.6 V when LDO is set to 1.3 V). |
| 53 | PF13 | bidirectional | 5 V-tolerant GPIO (FT); alternate functions include TMR20_CH2, I2C3_SMBA and XMC_A7. |
| 54 | PF14 | bidirectional | 5 V-tolerant GPIO with 20 mA sink capability (FTf); alternate functions include TMR20_CH3, I2C3_SCL and XMC_A8. |
| 55 | PF15 | bidirectional | 5 V-tolerant GPIO with 20 mA sink capability (FTf); alternate functions include TMR20_CH4, I2C3_SDA and XMC_A9. |
| 56 | PG0 | bidirectional | 5 V-tolerant GPIO (FT); alternate functions include TMR20_CH1C, SPI1_MISO, CAN1_RX and XMC_A10. |
| 57 | PG1 | bidirectional | 5 V-tolerant GPIO (FT); alternate functions include TMR20_CH2C, SPI1_MOSI, I2S1_SD, CAN1_TX and XMC_A11. |
| 58 | PE7 | bidirectional | 5 V-tolerant GPIO (FT); alternate functions include TMR1_EXT, UART7_RX, QSPI2_IO0 and XMC_D4. |
| 59 | PE8 | bidirectional | 5 V-tolerant GPIO (FT); alternate functions include TMR1_CH1C, UART4_TX, UART7_TX, QSPI2_IO1 and XMC_D5. |
| 60 | PE9 | bidirectional | 5 V-tolerant GPIO (FT); alternate functions include TMR1_CH1, UART4_RX, QSPI2_IO2 and XMC_D6. |
| 61 | VSS | power_in | Digital ground. |
| 62 | VDD | power_in | Digital supply for GPIO and internal LDO, 2.6 V to 3.6 V (3.0 V to 3.6 V when LDO is set to 1.3 V). |
| 63 | PE10 | bidirectional | 5 V-tolerant GPIO (FT); alternate functions include TMR1_CH2C, UART5_TX, QSPI2_IO3 and XMC_D7. |
| 64 | PE11 | bidirectional | 5 V-tolerant GPIO (FT); alternate functions include TMR1_CH2, SPI4_CS, I2S4_WS, UART5_RX and XMC_D8. |
| 65 | PE12 | bidirectional | 5 V-tolerant GPIO (FT); alternate functions include TMR1_CH3C, SPI1_CS, I2S1_WS, SPI4_SCK, I2S4_CK and XMC_D9. |
| 66 | PE13 | bidirectional | 5 V-tolerant GPIO (FT); alternate functions include TMR1_CH3, SPI1_SCK, I2S1_CK, SPI4_MISO and XMC_D10. |
| 67 | PE14 | bidirectional | 5 V-tolerant GPIO (FT); alternate functions include TMR1_CH4, SPI1_MISO, SPI4_MOSI, I2S4_SD and XMC_D11. |
| 68 | PE15 | bidirectional | 5 V-tolerant GPIO (FT); alternate functions include TMR1_BRK, SPI1_MOSI, I2S1_SD and XMC_D12. |
| 69 | PB10 | bidirectional | 5 V-tolerant GPIO with 20 mA sink capability (FTf); alternate functions include TMR2_CH3, I2C2_SCL, SPI2_SCK, USART3_TX, QSPI1_CS, QSPI1_IO1, EMAC_MII_RX_ER, SDIO1_D7 and XMC_NOE. |
| 70 | PB11 | bidirectional | 5 V-tolerant GPIO (FT); alternate functions include TMR2_CH4, TMR5_CH4, I2C2_SDA, USART3_RX, QSPI1_IO0, EMAC_MII_TX_EN and EMAC_RMII_TX_EN. |
| 71 | PH3 | bidirectional | 5 V-tolerant GPIO (FT); alternate functions include TMR5_CH2, I2C2_SDA, UART4_TX and QSPI1_IO1. |
| 72 | VDD | power_in | Digital supply for GPIO and internal LDO, 2.6 V to 3.6 V (3.0 V to 3.6 V when LDO is set to 1.3 V). |
| 73 | PB12 | bidirectional | 5 V-tolerant GPIO (FT); alternate functions include TMR1_BRK, TMR5_CH1, I2C2_SMBA, SPI2_CS, I2S2_WS, SPI4_CS, SPI3_SCK, USART3_CK, CAN2_RX, EMAC_MII_TXD0, OTGFS2_ID and XMC_D13. |
| 74 | PB13 | bidirectional | 5 V-tolerant GPIO (FT); alternate functions include TMR1_CH1C, I2C3_SMBA, SPI2_SCK, I2S2_CK, SPI4_SCK, I2C3_SCL, USART3_CTS, CAN2_TX, EMAC_MII_TXD1 and OTGFS2_VBUS. |
| 75 | PB14 | bidirectional | Standard-level GPIO (TC, not 5 V-tolerant); alternate functions include TMR1_CH2C, TMR8_CH2C, I2C3_SDA, SPI2_MISO, I2S2_SDEXT, USART3_RTS_DE, TMR12_CH1, OTGFS2_D-, SDIO1_D6 and XMC_D0. |
| 76 | PB15 | bidirectional | Standard-level GPIO (TC, not 5 V-tolerant); alternate functions include ERTC_REFIN, TMR1_CH3C, TMR8_CH3C, I2C3_SCL, SPI2_MOSI, I2S2_SD, TMR12_CH2, OTGFS2_D+ and SDIO1_CK. |
| 77 | PD8 | bidirectional | 5 V-tolerant GPIO (FT); alternate functions include USART3_TX, EMAC_MII_RX_DV, EMAC_RMII_CRS_DV and XMC_D13. |
| 78 | PD9 | bidirectional | 5 V-tolerant GPIO (FT); alternate functions include USART3_RX, EMAC_MII_RXD0, EMAC_RMII_RXD0 and XMC_D14. |
| 79 | PD10 | bidirectional | 5 V-tolerant GPIO (FT); alternate functions include USART3_CK, EMAC_MII_RXD1, EMAC_RMII_RXD1 and XMC_D15. |
| 80 | PD11 | bidirectional | 5 V-tolerant GPIO (FT); alternate functions include I2C2_SMBA, USART3_CTS, QSPI1_IO0, XMC_A14, XMC_SDBA0, EMAC_MII_RXD2 and XMC_A16_CLE. |
| 81 | PD12 | bidirectional | 5 V-tolerant GPIO with 20 mA sink capability (FTf); alternate functions include TMR4_CH1, I2C2_SCL, USART3_RTS_DE, QSPI1_IO1, XMC_A15, XMC_SDBA1, EMAC_MII_RXD3 and XMC_A17_ALE. |
| 82 | PD13 | bidirectional | 5 V-tolerant GPIO with 20 mA sink capability (FTf); alternate functions include TMR4_CH2, I2C2_SDA, UART8_TX, QSPI1_IO3, XMC_SDCLK and XMC_A18. |
| 83 | VSS | power_in | Digital ground. |
| 84 | VDD | power_in | Digital supply for GPIO and internal LDO, 2.6 V to 3.6 V (3.0 V to 3.6 V when LDO is set to 1.3 V). |
| 85 | PD14 | bidirectional | 5 V-tolerant GPIO with 20 mA sink capability (FTf); alternate functions include TMR4_CH3, I2C3_SCL, UART8_RX and XMC_D0. |
| 86 | PD15 | bidirectional | 5 V-tolerant GPIO with 20 mA sink capability (FTf); alternate functions include TMR4_CH4, I2C3_SDA and XMC_D1. |
| 87 | PG2 | bidirectional | 5 V-tolerant GPIO (FT); alternate functions include TMR20_CH3C and XMC_A12. |
| 88 | PG3 | bidirectional | 5 V-tolerant GPIO (FT); alternate functions include TMR20_BRK and XMC_A13. |
| 89 | PG4 | bidirectional | 5 V-tolerant GPIO (FT); alternate functions include XMC_A14 and XMC_SDBA0. |
| 90 | PG5 | bidirectional | 5 V-tolerant GPIO (FT); alternate functions include TMR20_EXT, XMC_A15 and XMC_SDBA1. |
| 91 | PG6 | bidirectional | 5 V-tolerant GPIO (FT); alternate functions include QSPI1_CS, XMC_INT2 and DVP_D12. |
| 92 | PG7 | bidirectional | 5 V-tolerant GPIO (FT); alternate functions include USART6_CK, XMC_INT3 and DVP_D13. |
| 93 | PG8 | bidirectional | 5 V-tolerant GPIO (FT); alternate functions include QSPI2_CS, USART6_RTS_DE, EMAC_PPS_OUT and XMC_SDCLK. |
| 94 | VSS | power_in | Digital ground. |
| 95 | VDD | power_in | Digital supply for GPIO and internal LDO, 2.6 V to 3.6 V (3.0 V to 3.6 V when LDO is set to 1.3 V). |
| 96 | PC6 | bidirectional | 5 V-tolerant GPIO (FT); alternate functions include TMR3_CH1, TMR8_CH1, I2C1_SCL, I2S2_MCK, USART6_TX, XMC_A0, SDIO1_D6, DVP_D0 and XMC_D1. |
| 97 | PC7 | bidirectional | 5 V-tolerant GPIO (FT); alternate functions include TMR3_CH2, TMR8_CH2, I2C1_SDA, SPI2_SCK, I2S2_CK, I2S3_MCK, USART6_RX, XMC_A1, SDIO1_D7 and DVP_D1. |
| 98 | PC8 | bidirectional | 5 V-tolerant GPIO (FT); alternate functions include TMR3_CH3, TMR8_CH3, I2S4_MCK, TMR20_CH3, UART8_TX, USART6_CK, QSPI1_IO2, XMC_A2, SDIO1_D0 and DVP_D2. |
| 99 | PC9 | bidirectional | 5 V-tolerant GPIO (FT); alternate functions include CLKOUT2, TMR3_CH4, TMR8_CH4, I2C3_SDA, UART8_RX, QSPI1_IO0, XMC_A3, OTGFS2_OE, SDIO1_D1 and DVP_D3. |
| 100 | PA8 | bidirectional | 5 V-tolerant GPIO (FT); alternate functions include CLKOUT1, TMR1_CH1, I2C3_SCL, USART1_CK, USART2_TX, OTGFS1_SOF, SDIO1_D1 and XMC_A4. |
| 101 | PA9 | bidirectional | 5 V-tolerant GPIO (FT); alternate functions include TMR1_CH2, I2C3_SMBA, SPI2_SCK, I2S2_CK, USART1_TX, I2C1_SCL, OTGFS1_VBUS, SDIO1_D2 and DVP_D0. |
| 102 | PA10 | bidirectional | 5 V-tolerant GPIO (FT); alternate functions include TMR1_CH3, SPI2_MOSI, I2S2_SD, I2S4_MCK, USART1_RX, I2C1_SDA, OTGFS1_ID and DVP_D1. |
| 103 | PA11 | bidirectional | Standard-level GPIO (TC, not 5 V-tolerant); alternate functions include TMR1_CH4, I2C2_SCL, SPI2_CS, I2S2_WS, SPI4_MISO, USART1_CTS, USART6_TX, CAN1_RX, OTGFS1_D- and DVP_D2. |
| 104 | PA12 | bidirectional | Standard-level GPIO (TC, not 5 V-tolerant); alternate functions include TMR1_EXT, I2C2_SDA, SPI2_MISO, USART1_RTS_DE, USART6_RX, CAN1_TX, OTGFS1_D+ and DVP_D3. |
| 105 | PA13 | bidirectional | 5 V-tolerant GPIO (FT) used as JTMS/SWDIO debug pin; alternate functions include IR_OUT, SPI3_MISO and OTGFS1_OE. |
| 106 | PH2 | bidirectional | 5 V-tolerant GPIO (FT); alternate functions include TMR5_CH1, I2C2_SCL, UART4_RX and QSPI1_IO0. |
| 107 | VSS | power_in | Digital ground. |
| 108 | VDD | power_in | Digital supply for GPIO and internal LDO, 2.6 V to 3.6 V (3.0 V to 3.6 V when LDO is set to 1.3 V). |
| 109 | PA14 | bidirectional | 5 V-tolerant GPIO (FT) used as JTCK/SWCLK debug pin; alternate functions include SPI3_MOSI, I2S3_SD and USART2_TX. |
| 110 | PA15 | bidirectional | 5 V-tolerant GPIO (FT) used as JTDI debug pin; alternate functions include TMR2_CH1, TMR2_EXT, SPI1_CS, I2S1_WS, SPI3_CS, USART1_TX, USART2_RX, QSPI2_IO1, QSPI1_IO2, XMC_NE2 and XMC_NCE3. |
| 111 | PC10 | bidirectional | 5 V-tolerant GPIO (FT); alternate functions include TMR5_CH2, SPI3_SCK, I2S3_CK, USART3_TX, UART4_TX, QSPI1_IO1, SDIO1_D2 and DVP_D8. |
| 112 | PC11 | bidirectional | 5 V-tolerant GPIO (FT); alternate functions include TMR5_CH3, I2S3_SDEXT, SPI3_MISO, USART3_RX, UART4_RX, QSPI1_CS, SDIO1_D3, DVP_D4 and XMC_D2. |
| 113 | PC12 | bidirectional | 5 V-tolerant GPIO (FT); alternate functions include TMR11_CH1, I2C2_SDA, SPI3_MOSI, I2S3_SD, USART3_CK, UART5_TX, SDIO1_CK, DVP_D9 and XMC_D3. |
| 114 | PD0 | bidirectional | 5 V-tolerant GPIO (FT); alternate functions include SPI3_MOSI, I2S3_SD, SPI2_CS, I2S2_WS, CAN1_RX, XMC_A5 and XMC_D2. |
| 115 | PD1 | bidirectional | 5 V-tolerant GPIO (FT); alternate functions include SPI2_SCK, I2S2_CK, SPI2_CS, I2S2_WS, CAN1_TX, XMC_A6 and XMC_D3. |
| 116 | PD2 | bidirectional | 5 V-tolerant GPIO (FT); alternate functions include TMR3_EXT, USART3_RTS_DE, UART5_RX, XMC_A7, SDIO1_CMD, DVP_D11 and XMC_NWE. |
| 117 | PD3 | bidirectional | 5 V-tolerant GPIO (FT); alternate functions include SPI2_SCK, I2S2_CK, SPI2_MISO, USART2_CTS, QSPI1_SCK, XMC_A8, XMC_CLK and DVP_D5. |
| 118 | PD4 | bidirectional | 5 V-tolerant GPIO (FT); alternate functions include SPI2_MOSI, I2S2_SD, USART2_RTS_DE, XMC_A9 and XMC_NOE. |
| 119 | PD5 | bidirectional | 5 V-tolerant GPIO (FT); alternate functions include USART2_TX, XMC_A10 and XMC_NWE. |
| 120 | VSS | power_in | Digital ground. |
| 121 | VDD | power_in | Digital supply for GPIO and internal LDO, 2.6 V to 3.6 V (3.0 V to 3.6 V when LDO is set to 1.3 V). |
| 122 | PD6 | bidirectional | 5 V-tolerant GPIO (FT); alternate functions include SPI3_MOSI, I2S3_SD, USART2_RX, XMC_A11, XMC_NWAIT and DVP_D10. |
| 123 | PD7 | bidirectional | 5 V-tolerant GPIO (FT); alternate functions include USART2_CK, XMC_A12, XMC_NE1 and XMC_NCE2. |
| 124 | PG9 | bidirectional | 5 V-tolerant GPIO (FT); alternate functions include USART6_RX, QSPI1_IO2, XMC_NE2, XMC_NCE3 and DVP_VSYNC. |
| 125 | PG10 | bidirectional | 5 V-tolerant GPIO (FT); alternate functions include QSPI2_IO2, XMC_NE3, XMC_NCE4_1 and DVP_D2. |
| 126 | PG11 | bidirectional | 5 V-tolerant GPIO (FT); alternate functions include QSPI2_IO3, SPI4_SCK, I2S4_CK, CAN2_RX, EMAC_MII_TX_EN, XMC_NCE4_2 and DVP_D3. |
| 127 | PG12 | bidirectional | 5 V-tolerant GPIO (FT); alternate functions include QSPI2_IO1, SPI4_MISO, USART6_RTS_DE, CAN2_TX and XMC_NE4. |
| 128 | PG13 | bidirectional | 5 V-tolerant GPIO (FT); alternate functions include QSPI2_SCK, SPI4_MOSI, I2S4_SD, USART6_CTS, EMAC_MII_TXD0 and XMC_A24. |
| 129 | PG14 | bidirectional | 5 V-tolerant GPIO (FT); alternate functions include QSPI2_IO0, SPI4_CS, I2S4_WS, USART6_TX, QSPI1_IO3, EMAC_MII_TXD1 and XMC_A25. |
| 130 | VSS | power_in | Digital ground. |
| 131 | VDD | power_in | Digital supply for GPIO and internal LDO, 2.6 V to 3.6 V (3.0 V to 3.6 V when LDO is set to 1.3 V). |
| 132 | PG15 | bidirectional | 5 V-tolerant GPIO (FT); alternate functions include USART6_CTS, XMC_SDNCAS and DVP_D13. |
| 133 | PB3 | bidirectional | 5 V-tolerant GPIO with 20 mA sink capability (FTf) used as JTDO/SWO debug pin; alternate functions include TMR2_CH2, I2C2_SDA, SPI1_SCK, I2S1_CK, SPI3_SCK, USART1_RX, UART7_RX, QSPI1_IO3 and DVP_D4. |
| 134 | PB4 | bidirectional | 5 V-tolerant GPIO (FT) used as NJTRST debug pin; alternate functions include TMR3_CH1, I2C3_SDA, SPI1_MISO, SPI3_MISO, I2S3_SDEXT, UART7_TX, SDIO1_D0 and DVP_D5. |
| 135 | PB5 | bidirectional | 5 V-tolerant GPIO (FT); alternate functions include TMR3_CH2, I2C1_SMBA, SPI1_MOSI, I2S1_SD, SPI3_MOSI, I2S3_SD, USART1_CK, UART5_RX, CAN2_RX, EMAC_PPS_OUT, XMC_SDCKE1, DVP_D10 and SDIO1_D3. |
| 136 | PB6 | bidirectional | 5 V-tolerant GPIO (FT); alternate functions include TMR4_CH1, I2C1_SCL, I2S1_MCK, SPI4_CS, I2S4_WS, USART1_TX, UART5_TX, CAN2_TX, QSPI1_CS, XMC_SDCS1, DVP_D5 and SDIO1_D0. |
| 137 | PB7 | bidirectional | 5 V-tolerant GPIO (FT); alternate functions include TMR4_CH2, TMR8_BRK, I2C1_SDA, SPI4_SCK, I2S4_CK, USART1_RX, QSPI2_IO1, XMC_NADV, DVP_VSYNC and SDIO1_D0. |
| 138 | BOOT0 | input | Dedicated BOOT0 pin with built-in weak pull-down that cannot be disabled, used to select the startup mode. |
| 139 | PB8 | bidirectional | 5 V-tolerant GPIO (FT); alternate functions include TMR2_CH1, TMR2_EXT, TMR4_CH3, TMR10_CH1, I2C1_SCL, SPI4_MISO, UART5_RX, CAN1_RX, QSPI2_CS, EMAC_MII_TXD3, SDIO1_D4 and DVP_D6. |
| 140 | PB9 | bidirectional | 5 V-tolerant GPIO with 20 mA sink capability (FTf); alternate functions include IR_OUT, TMR2_CH2, TMR4_CH4, TMR11_CH1, I2C1_SDA, SPI2_CS, SPI4_MOSI, I2S4_SD, I2C2_SDA, UART5_TX, CAN1_TX, QSPI1_CS, SDIO1_D5 and DVP_D7. |
| 141 | PE0 | bidirectional | 5 V-tolerant GPIO (FT); alternate functions include TMR4_EXT, TMR20_EXT, UART8_RX, XMC_LB, XMC_SDDQML and DVP_D2. |
| 142 | PE1 | bidirectional | 5 V-tolerant GPIO (FT); alternate functions include TMR1_CH2C, TMR20_CH4, UART8_TX, XMC_UB, XMC_SDDQMH and DVP_D3. |
| 143 | VSS | power_in | Digital ground. |
| 144 | VDD | power_in | Digital supply for GPIO and internal LDO, 2.6 V to 3.6 V (3.0 V to 3.6 V when LDO is set to 1.3 V). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | ARTERY |
| Package | LQFP-144(20x20) |
| Category | Embedded Processors & Controllers |
| Pins | 144 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Power supply voltage VDDx to VSS (external main supply) | VDDx-VSS | -0.3 | 4 | V | 47 | ||
| Input voltage on FTa pin, set to input floating, input pull-up or input pull-down mode | VIN | 6 | V | pin set to input floating, input pull-up or input pull-down mode | 47 | ||
| Input voltage on TC pin | VIN | 4 | V | 47 | |||
| Voltage difference between different supply pins | /ΔVDDx/ | 50 | mV | 47 | |||
| Voltage difference between different ground pins | /VSSx-VSS/ | 50 | mV | 47 | |||
| External main supply current (including VDDA and VDD) | IVDD | 250 | mA | 47 | |||
| Total current through VSS ground line (outflow) | IVSS | 250 | mA | 47 | |||
| Output sink current on any GPIO and control pin | IIO | 25 | mA | 47 | |||
| Output source current on any GPIO and control pin | IIO | -25 | mA | 47 | |||
| Storage temperature range | TSTG | -60 | 150 | °C | 47 | ||
| Maximum junction temperature | TJ | 125 | °C | 47 | |||
| Clock frequency in data transfer mode (SDIO) | fPP | 0 | 48 | MHz | 94 | ||
| Clock low time (SDIO) | tW(CKL) | 32 | ns | 94 | |||
| Clock high time (SDIO) | tW(CKH) | 30 | ns | 94 | |||
| Clock rise time (SDIO) | tr | 4 | ns | 94 | |||
| Clock fall time (SDIO) | tf | 5 | ns | 94 | |||
| CMD and D input setup time to CK (SDIO) | tISU | 2 | ns | 94 | |||
| CMD and D input hold time from CK (SDIO) | tIH | 0 | ns | 94 | |||
| CMD and D output valid time, MMC and SD high speed mode (SDIO) | tOV | 6 | ns | 94 | |||
| CMD and D output hold time, MMC and SD high speed mode (SDIO) | tOH | 0 | ns | 94 | |||
| CMD and D output valid time, SD default mode (SDIO) | tOVD | 7 | ns | 94 | |||
| CMD and D output hold time, SD default mode (SDIO) | tOHD | 0.5 | ns | 94 | |||
| OTGFS transceiver startup time (design guaranteed, not production tested) | tSTARTUP | 1 | μs | 95 | |||
| OTGFS operating voltage | VDD | 3 | 3.6 | V | 95 | ||
| Differential input sensitivity (OTGFS_D+/D-) | VDI | 0.2 | V | 95 | |||
| Differential common-mode range | VCM | 0.8 | 2.5 | V | includes VDI range | 95 | |
| Single-ended receiver threshold | VSE | 1.3 | 2 | V | 95 | ||
| Static output low level | VOL | 0.3 | V | 1.24 kΩ RL connected to 3.6 V | 95 | ||
| Static output high level | VOH | 2.8 | 3.6 | V | 15 kΩ RL connected to VSS | 95 | |
| OTGFS_D+ internal pull-up resistance | RPU | 0.97 | 1.24 | 1.58 | kΩ | VIN = VSS | 95 |
| OTGFS_D+/D- internal pull-down resistance | RPD | 15 | 19 | 25 | kΩ | VIN = VDD | 95 |
| Rise time (OTGFS data signal) | tr | 4 | 20 | ns | CL ≤ 50 pF | 95 | |
| Fall time (OTGFS data signal) | tf | 4 | 20 | ns | CL ≤ 50 pF | 95 | |
| Rise/fall time matching (tr/tf) | trfm | 90 | 110 | % | 95 | ||
| Output signal crossover voltage | VCRS | 1.3 | 2 | V | 95 | ||
| Ethernet operating voltage (EMAC) | VDD | 3 | 3.6 | V | 96 | ||
| MDC clock period (SMI) | tMDC | 509 | 510 | 511 | ns | 1.96 MHz, fAHB = 200 MHz | 96 |
| MDIO write data valid time (SMI) | td(MDIO) | 13.5 | 14.5 | 15.5 | ns | 96 | |
| MDIO read data setup time (SMI) | tsu(MDIO) | 35 | ns | 96 | |||
| MDIO read data hold time (SMI) | th(MDIO) | 0 | ns | 96 | |||
| RMII receive data setup time | tsu(RXD) | 4 | ns | 96 | |||
| RMII receive data hold time | tih(RXD) | 2 | ns | 96 | |||
| RMII carrier (CRS_DV) setup time | tsu(DV) | 4 | ns | 96 | |||
| RMII carrier (CRS_DV) hold time | tih(DV) | 2 | ns | 96 | |||
| RMII transmit enable valid delay | td(TXEN) | 8 | 10 | 16 | ns | 96 | |
| RMII transmit data valid delay | td(TXD) | 7 | 10 | 16 | ns | 96 | |
| Power supply voltage (feature list, to be confirmed against Table 15) | 2.6 | 3.6 | V | 1 | |||
| Operating temperature range (feature list) | -40 | 105 | °C | 1 |
CAD (KiCad official)
- Symbol:
AT32F437ZGT7 - Footprint:
Package_QFP:LQFP-144_20x20mm_P0.5mm - 3D model: LQFP-144(20x20) (KiCad packages3D, STEP)
- 3D model files:
at32f437zgt7-etched.step/at32f437zgt7-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);at32f437zgt7.step/at32f437zgt7.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: ARTERY datasheet (118 pp, sha256
1dc0c659f12e7670, retrieved 2026-10-21, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).