main
Ray Publish 0.1.0 3749e03 9d ago
{
  "slug": "at32f423kcu7-4",
  "version": "0.1.0",
  "type": "component",
  "description": "ARTERY(雅特力) Microcontrollers (MCU/MPU/SOC), QFN-32-EP(4x4). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "embedded processors & controllers",
    "at32f423kcu7-4",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "at32f423kcu7-4.kicad_sym",
    "at32f423kcu7-4.kicad_mod",
    "at32f423kcu7-4.glb",
    "at32f423kcu7-4.step",
    "at32f423kcu7-4.lbr",
    "docs/hero.png",
    "docs/at32f423kcu7-4-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "at32f423kcu7-4-hero.glb",
    "at32f423kcu7-4-hero.overlay.json",
    "at32f423kcu7-4-etched.glb"
  ],
  "component": {
    "mpn": "AT32F423KCU7-4",
    "manufacturer": "ARTERY(雅特力)",
    "package": "QFN-32-EP(4x4)",
    "pin_count": 33,
    "category": "Embedded Processors & Controllers",
    "subcategory": "Microcontrollers (MCU/MPU/SOC)",
    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590903459321765888",
    "parts": {
      "symbol": "at32f423kcu7-4.kicad_sym",
      "footprint": "at32f423kcu7-4.kicad_mod",
      "model_3d": "at32f423kcu7-4-hero.glb",
      "model_3d_plain": "at32f423kcu7-4-etched.glb",
      "model_3d_step": "at32f423kcu7-4-etched.step",
      "model_3d_step_plain": "at32f423kcu7-4.step",
      "lbr": "at32f423kcu7-4.lbr"
    },
    "distributor_links": {
      "lcsc": "C7433166"
    },
    "distributor_check": {
      "checked_at": "2026-10-18T03:43:40Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": null,
        "status": "no match"
      },
      "mouser": {
        "pn": null,
        "status": "no match"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "VDD",
        "type": "power_in",
        "description": "Digital power supply for GPIO, ERTC, LEXT, BPR and the LDO, operating from 2.4 V to 3.6 V."
      },
      {
        "number": "2",
        "name": "PF0",
        "type": "bidirectional",
        "description": "Standard-level (TC) GPIO that doubles as the HEXT crystal input (HEXT_IN, 4-25 MHz) with TMR1_CH1 and I2C1_SDA alternate functions."
      },
      {
        "number": "3",
        "name": "PF1",
        "type": "bidirectional",
        "description": "Standard-level (TC) GPIO that doubles as the HEXT crystal output (HEXT_OUT) with TMR1_CH2C, I2C1_SCL, SPI2_CS and I2S2_WS alternate functions."
      },
      {
        "number": "4",
        "name": "NRST",
        "type": "bidirectional",
        "description": "Active-low device reset input and internal reset output with an internal weak pull-up of 30-50 kΩ, and it must be pulled below VIL(NRST) max of 0.8 V to reset the MCU."
      },
      {
        "number": "5",
        "name": "VDDA",
        "type": "power_in",
        "description": "Analog power supply for the ADC and DAC, which must be at the same potential as VDD."
      },
      {
        "number": "6",
        "name": "PA0",
        "type": "bidirectional",
        "description": "FTa GPIO (5 V tolerant only in input float/pull modes, not in analog mode where input must stay below VDD+0.3 V) with ADC1_IN0, WKUP1 and TAMP2 functions."
      },
      {
        "number": "7",
        "name": "PA1",
        "type": "bidirectional",
        "description": "FTa GPIO (5 V tolerant only in input modes; analog mode input must stay below VDD+0.3 V) with ADC1_IN1 and TMR2_CH2 / I2C2_SDA alternate functions."
      },
      {
        "number": "8",
        "name": "PA2",
        "type": "bidirectional",
        "description": "FTa GPIO (5 V tolerant only in input modes; analog mode input must stay below VDD+0.3 V) with ADC1_IN2 and USART2_TX / CAN2_RX alternate functions."
      },
      {
        "number": "9",
        "name": "PA3",
        "type": "bidirectional",
        "description": "FTa GPIO (5 V tolerant only in input modes; analog mode input must stay below VDD+0.3 V) with ADC1_IN3 and USART2_RX / CAN2_TX alternate functions."
      },
      {
        "number": "10",
        "name": "PA4",
        "type": "bidirectional",
        "description": "FTa GPIO (5 V tolerant only in input modes; analog mode input must stay below VDD+0.3 V) with ADC1_IN4 / DAC1_OUT and SPI1_CS / OTGFS1_OE alternate functions."
      },
      {
        "number": "11",
        "name": "PA5",
        "type": "bidirectional",
        "description": "FTa GPIO (5 V tolerant only in input modes; analog mode input must stay below VDD+0.3 V) with ADC1_IN5 / DAC2_OUT and SPI1_SCK alternate functions."
      },
      {
        "number": "12",
        "name": "PA6",
        "type": "bidirectional",
        "description": "FTa GPIO (5 V tolerant only in input modes; analog mode input must stay below VDD+0.3 V) with ADC1_IN6 and SPI1_MISO / TMR3_CH1 alternate functions."
      },
      {
        "number": "13",
        "name": "PA7",
        "type": "bidirectional",
        "description": "FTa GPIO (5 V tolerant only in input modes; analog mode input must stay below VDD+0.3 V) with ADC1_IN7 and SPI1_MOSI / TMR3_CH2 alternate functions."
      },
      {
        "number": "14",
        "name": "PB0",
        "type": "bidirectional",
        "description": "FTa GPIO (5 V tolerant only in input modes; analog mode input must stay below VDD+0.3 V) with ADC1_IN8 and SPI1_MISO / TMR1_CH2C alternate functions."
      },
      {
        "number": "15",
        "name": "PB1",
        "type": "bidirectional",
        "description": "FTa GPIO (5 V tolerant only in input modes; analog mode input must stay below VDD+0.3 V) with ADC1_IN9 and SPI1_MOSI / TMR1_CH3C alternate functions."
      },
      {
        "number": "16",
        "name": "PB2",
        "type": "bidirectional",
        "description": "FTa GPIO (5 V tolerant only in input modes; analog mode input must stay below VDD+0.3 V) with ADC1_IN20 and TMR2_CH4 / I2C3_SMBA alternate functions."
      },
      {
        "number": "17",
        "name": "VDD",
        "type": "power_in",
        "description": "Digital power supply, operating from 2.4 V to 3.6 V."
      },
      {
        "number": "18",
        "name": "PA8",
        "type": "bidirectional",
        "description": "5 V tolerant FT GPIO with CLKOUT, TMR1_CH1, I2C3_SCL, USART1_CK and OTGFS1_SOF alternate functions."
      },
      {
        "number": "19",
        "name": "PA9",
        "type": "bidirectional",
        "description": "5 V tolerant FT GPIO with CLKOUT, TMR1_CH2, USART1_TX, I2C1_SCL and OTGFS1_VBUS alternate functions."
      },
      {
        "number": "20",
        "name": "PA10",
        "type": "bidirectional",
        "description": "5 V tolerant FT GPIO with ERTC_REFIN, TMR1_CH3, USART1_RX, I2C1_SDA and OTGFS1_ID alternate functions."
      },
      {
        "number": "21",
        "name": "PA11",
        "type": "bidirectional",
        "description": "Standard-level (TC) GPIO with OTGFS1_D- as a dedicated USB function plus USART1_CTS, CAN1_RX and TMR1_CH4 alternate functions."
      },
      {
        "number": "22",
        "name": "PA12",
        "type": "bidirectional",
        "description": "Standard-level (TC) GPIO with OTGFS1_D+ as a dedicated USB function plus USART1_RTS_DE, CAN1_TX and TMR1_EXT alternate functions."
      },
      {
        "number": "23",
        "name": "PA13",
        "type": "bidirectional",
        "description": "5 V tolerant FT GPIO that is the JTMS/SWDIO serial-wire debug data pin by default, with IR_OUT and OTGFS1_OE alternate functions."
      },
      {
        "number": "24",
        "name": "PA14",
        "type": "bidirectional",
        "description": "5 V tolerant FT GPIO that is the JTCK/SWCLK serial-wire debug clock pin by default, with USART2_TX, SPI3_MOSI and I2C1_SMBA alternate functions."
      },
      {
        "number": "25",
        "name": "PA15",
        "type": "bidirectional",
        "description": "5 V tolerant FT GPIO that is the JTDI debug input pin by default, with TMR2_CH1, SPI1_CS, USART1_TX and XMC_NE2 alternate functions."
      },
      {
        "number": "26",
        "name": "PB3",
        "type": "bidirectional",
        "description": "5 V tolerant FT GPIO that is the JTDO/SWO trace output pin by default, with TMR2_CH2, SPI1_SCK and USART1_RX alternate functions."
      },
      {
        "number": "27",
        "name": "PB4",
        "type": "bidirectional",
        "description": "5 V tolerant FT GPIO that is the NJTRST debug reset pin by default, with TMR3_CH1, SPI1_MISO and USART1_CTS alternate functions."
      },
      {
        "number": "28",
        "name": "PB5",
        "type": "bidirectional",
        "description": "5 V tolerant FT GPIO with WKUP6 wake-up function plus TMR3_CH2, SPI1_MOSI, USART1_CK and CAN2_RX alternate functions."
      },
      {
        "number": "29",
        "name": "PB6",
        "type": "bidirectional",
        "description": "5 V tolerant FT GPIO with TMR4_CH1, I2C1_SCL, USART1_TX and CAN2_TX alternate functions."
      },
      {
        "number": "30",
        "name": "PB7",
        "type": "bidirectional",
        "description": "5 V tolerant FT GPIO with TMR4_CH2, I2C1_SDA, USART1_RX and XMC_NADV alternate functions."
      },
      {
        "number": "31",
        "name": "BOOT0",
        "type": "input",
        "description": "Dedicated boot mode selection pin 0 with a built-in weak pull-down that cannot be disabled, used together with the user system data nBOOT1 bit to select the boot source."
      },
      {
        "number": "32",
        "name": "PB8",
        "type": "bidirectional",
        "description": "5 V tolerant FT GPIO with TMR2_CH1, TMR4_CH3, I2C1_SCL, USART1_TX and CAN1_RX alternate functions."
      },
      {
        "number": "33",
        "name": "EPAD",
        "type": "power_in",
        "description": "Exposed pad that serves as the digital ground (VSS) and analog ground (VSSA), which must be at the same potential as VSS."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: Figure 6 (QFN32 drawing) pin labels are garbled in the text extraction, so the pin-to-name mapping w; In Table 5 the row listing VDD ('27 36 48 75 VDD') has a blank QFN32 column in the extraction; it wa; The exposed pad is printed as pin '33' with name 'EPAD (VSS/VSSA)' in Table 5 for the QFN32 package;"
        ],
        "pages_sent": 75,
        "cost_usd": 0.2659,
        "at": "2026-10-18T03:42:02"
      },
      "datasheet": {
        "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590903459321765888",
        "pages": 89,
        "sha256": "6ea9ef1acb32858f",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 33,
        "described": 33,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "at32f423kcu7-4.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          4.0,
          4.0,
          0.6
        ],
        "zmin_mm": 0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "7b482a511cdf2cf875c31931f9fea7f745b8dac2ea6203531cd6604f40a290cb",
        "checked": "2026-10-18",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "at32f423kcu7-4-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          4.0,
          4.0,
          0.6
        ],
        "zmin_mm": 0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "1daecf0d634b987046627299cb137f4c8163ae4909f5997df67b4967a405fc10",
        "checked": "2026-10-18",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  }
}