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docs at25m01-sshm-t: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
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at25m01-sshm-t-etched.fit.json at25m01-sshm-t: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
at25m01-sshm-t-etched.glb at25m01-sshm-t: white body in tscircuit (pre-1.8 etch structure under an assembly instance); Ray 2026-10-19: black IC b… · Ray
at25m01-sshm-t-etched.step at25m01-sshm-t: white body in tscircuit (pre-1.8 etch structure under an assembly instance); Ray 2026-10-19: black IC b… · Ray
at25m01-sshm-t.glb Publish 0.1.0 · Ray
at25m01-sshm-t.kicad_mod Publish 0.1.0 · Ray
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page.json at25m01-sshm-t: white body in tscircuit (pre-1.8 etch structure under an assembly instance); Ray 2026-10-19: black IC b… · Ray
README.md at25m01-sshm-t: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray

AT25M01-SSHM-T

Microchip · EEPROM · SOIC-8

AT25M01-SSHM-T from Microchip, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 CS input Chip Select, active-low. Enables the device and frames each SPI transaction. Must be driven high between operations (tCS >= 100 ns).
2 SO output Serial Data Output. Clocks data out on the falling edge of SCK (SPI mode 0). High-Z when CS is high.
3 WP input Write Protect, active-low. When low and the WPEN bit in the status register is set, hardware-protects the status register and enabled memory blocks.
4 GND power_in Ground reference for the device.
5 SI input Serial Data Input. Opcodes, addresses, and write data are clocked in on the rising edge of SCK (SPI mode 0).
6 SCK input Serial Clock. Supports 0-20 MHz at 4.5-5.5V, 0-10 MHz at 2.5-5.5V, 0-5 MHz at 1.7-5.5V. Supports SPI modes 0 (0,0) and 3 (1,1).
7 HOLD input Hold input, active-low. Suspends serial communication without resetting the sequence; SO goes high-Z and SI/SCK are ignored while HOLD is low and CS is low.
8 VCC power_in Device power supply. Operating range 1.7V to 5.5V (absolute max 6.25V). Decouple with a 0.1 uF capacitor to GND close to the pin.

Key specifications

Parameter Value
Manufacturer Microchip
Package SOIC-8
Category Memory
Pins 8

Ordering variants

  • AT25M01-SSHM-T

CAD (KiCad official)

  • Symbol: AT25M01-SSHM-T
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: at25m01-sshm-t-etched.step / at25m01-sshm-t-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); at25m01-sshm-t.step / at25m01-sshm-t.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
at25m01-sshm-t.step 122 KB You want the bare part, or you mark your own boards.
at25m01-sshm-t-etched.step 2.3 MB You want the part with AT25M01-SSHM-T already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 592 faces against 147 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Microchip datasheet (20 pp, sha256 108635959b0d1a8d, retrieved 2026-08-17, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF