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Initial commit: component/at25128b-sshl-t

Ray ·663218f5f4 ·2mo ago
2 files changed +82
README.mdadded+48
@@ -0,0 +1,48 @@+# AT25128B-SSHL-T++**Microchip** · EEPROM · SOIC-8++AT25128B-SSHL-T from Microchip, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | CS | input | Active-low SPI Chip Select. Pulling CS low selects the device and starts a serial transaction; the first byte after the falling edge is interpreted as the opcode. Bringing CS high ends the transaction and, for WRITE, triggers the internal programming cycle. |+| 2 | SO | output | SPI Serial Data Output (MISO). Data is shifted out on the falling edge of SCK, MSB first. The pin is high-impedance whenever CS is high or an invalid opcode is received. |+| 3 | WP | input | Active-low hardware Write Protect. When WP is low and the WPEN bit in the status register is 1, writes to the status register (including BP0/BP1) are inhibited, providing hardware write protection. Held high for normal read/write. |+| 4 | GND | power_in | Device ground reference for all supply and I/O signals. |+| 5 | SI | input | SPI Serial Data Input (MOSI). Opcodes, addresses and write data are shifted in on the rising edge of SCK, MSB first. |+| 6 | SCK | input | SPI Serial Clock input from the master. Supports SPI modes 0 (CPOL=0, CPHA=0) and 3 (CPOL=1, CPHA=1). Maximum 20 MHz at VCC = 4.5-5.5V, 10 MHz at 2.5-5.5V, 5 MHz at 1.8-5.5V. |+| 7 | HOLD | input | Active-low Hold input. When taken low while SCK is low during a selected serial sequence, it pauses serial communication without resetting the transaction; SO becomes high-impedance and SI is ignored until HOLD is brought high again. |+| 8 | VCC | power_in | Positive supply voltage, 1.8V to 5.5V. Full 20 MHz SCK operation requires VCC ≥ 4.5V; standby current is <5 µA at 5V with CS = VCC. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Microchip |+| Package | SOIC-8 |+| Category | Memory |+| Pins | 8 |++## Ordering variants++- `AT25128B-SSHL-T`+- `AT25128B-SSHL-TSSHL-B`++## CAD (KiCad official)++- Symbol: `AT25128B-SSHL-T`+- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`+- 3D model: SOIC-8 (KiCad packages3D, STEP)++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Microchip datasheet](docs/at25128b-sshl-t-datasheet.pdf) (22 pp, sha256 `327b6418a5554831`, retrieved 2026-08-17, tier: manufacturer)+- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/at25128b-sshl-t-datasheet.pdf)
page.jsonadded+34
@@ -0,0 +1,34 @@+{+  "slug": "at25128b-sshl-t",+  "version": "0.1.0",+  "type": "component",+  "description": "Microchip EEPROM, SOIC-8. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+  "tags": [+    "component",+    "memory",+    "at25128b-sshl-t"+  ],+  "dependencies": {},+  "hero": {+    "type": "image",+    "path": "docs/hero.png"+  },+  "files": [+    "page.json",+    "README.md",+    "at25128b-sshl-t.kicad_sym",+    "at25128b-sshl-t.kicad_mod",+    "at25128b-sshl-t.glb",+    "at25128b-sshl-t.step",+    "at25128b-sshl-t.lbr",+    "docs/hero.png",+    "docs/at25128b-sshl-t-datasheet.pdf",+    "viewers/symbol.html",+    "viewers/footprint.html"+  ],+  "visibility": "public",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  }+}\ No newline at end of file