component
AT24MAC402-SSHM-T
Public Made by Adomby adom
Microchip Tech EEPROM, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
Open in new tab ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.
Symbol & Footprint
Schematic Symbol
Open full view ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
PCB Footprint
Open full view ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
Datasheet
Open in new tab ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
Contents
README
markdownAT24MAC402-SSHM-T
Microchip Tech · EEPROM · SOIC-8
AT24MAC402-SSHM-T from Microchip Tech, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | A0 | input | Device address input hard-wired to GND or VCC (up to eight devices per bus); internally pulled down to GND if left floating, but should be tied to a known state. |
| 2 | A1 | input | Device address input hard-wired to GND or VCC (up to eight devices per bus); internally pulled down to GND if left floating, but should be tied to a known state. |
| 3 | A2 | input | Device address input hard-wired to GND or VCC (up to eight devices per bus); internally pulled down to GND if left floating, but should be tied to a known state. |
| 4 | GND | power_in | Ground reference for the power supply, to be connected to system ground. |
| 5 | SDA | bidirectional | Open-drain bidirectional serial data pin that needs an external pull-up resistor (not to exceed 10 kΩ) and may be wire-ORed with other open-drain devices on the bus. |
| 6 | SCL | input | Serial clock input that controls data flow; input data is latched on the rising edge and output data is clocked out on the falling edge, and it must be forced high or pulled high when the bus is idle. |
| 7 | WP | input | Write-protect input: GND allows normal write operations, VCC inhibits all writes to the full array; internally pulled down to GND if left floating. |
| 8 | VCC | power_in | Device power supply pin, operating from 1.7V to 5.5V; operation at invalid VCC voltages may produce spurious results. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | SOIC-8 |
| Category | Memory |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply Voltage | VCC | 1.7 | 5.5 | V | 9 | ||
| Supply Current (read) | ICC1 | 0.4 | 1 | mA | VCC = 5.0V, Read at 400 kHz | 9 | |
| Supply Current (write) | ICC2 | 2 | 3 | mA | VCC = 5.0V, Write at 400 kHz | 9 | |
| Standby Current | ISB | 1 | μA | VCC = 1.7V, VIN = VCC or GND | 9 | ||
| Standby Current | ISB | 6 | μA | VCC = 5.5V, VIN = VCC or GND | 9 | ||
| Input Leakage Current | ILI | 0.1 | 3 | μA | VIN = VCC or GND | 9 | |
| Output Leakage Current | ILO | 0.05 | 3 | μA | VOUT = VCC or GND | 9 | |
| Input Low Level | VIL | -0.6 | V | Note 2; max printed as VCC x 0.3 | 9 | ||
| Output Low Level | VOL1 | 0.2 | V | VCC = 1.7V, IOL = 0.15 mA | 9 | ||
| Output Low Level | VOL2 | 0.4 | V | VCC = 3.0V, IOL = 2.1 mA | 9 | ||
| Operating Temperature (Case) | -40 | 85 | °C | Industrial Temperature Range | 9 | ||
| Temperature under bias | -55 | 125 | °C | 9 | |||
| Storage temperature | -65 | 150 | °C | 9 | |||
| Supply voltage VCC | VCC | 6.25 | V | 9 | |||
| Voltage on any pin with respect to ground | -1 | 7 | V | 9 | |||
| DC output current | 5 | mA | 9 | ||||
| ESD protection | 4 | kV | >4 kV | 9 | |||
| Clock Frequency, SCL | fSCL | 400 | kHz | Fast Mode, VCC = 1.7V to 2.5V | 10 | ||
| Clock Frequency, SCL | fSCL | 1000 | kHz | Fast Mode Plus, VCC = 2.5V to 5.5V | 10 | ||
| Clock Pulse Width Low | tLOW | 1200 | ns | Fast Mode, VCC = 1.7V to 2.5V | 10 | ||
| Clock Pulse Width Low | tLOW | 500 | ns | Fast Mode Plus, VCC = 2.5V to 5.5V | 10 | ||
| Clock Pulse Width High | tHIGH | 600 | ns | Fast Mode, VCC = 1.7V to 2.5V | 10 | ||
| Clock Pulse Width High | tHIGH | 400 | ns | Fast Mode Plus, VCC = 2.5V to 5.5V | 10 | ||
| Input Filter Spike Suppression | tI | 100 | ns | Fast Mode, VCC = 1.7V to 2.5V | 10 | ||
| Input Filter Spike Suppression | tI | 50 | ns | Fast Mode Plus, VCC = 2.5V to 5.5V | 10 | ||
| Clock Low to Data Out Valid | tAA | 100 | 900 | ns | Fast Mode, VCC = 1.7V to 2.5V | 10 | |
| Clock Low to Data Out Valid | tAA | 50 | 450 | ns | Fast Mode Plus, VCC = 2.5V to 5.5V | 10 | |
| Bus Free Time between Stop and Start | tBUF | 1300 | ns | Fast Mode, VCC = 1.7V to 2.5V | 10 | ||
| Bus Free Time between Stop and Start | tBUF | 500 | ns | Fast Mode Plus, VCC = 2.5V to 5.5V | 10 | ||
| Start Hold Time | tHD.STA | 600 | ns | Fast Mode, VCC = 1.7V to 2.5V | 10 | ||
| Start Hold Time | tHD.STA | 250 | ns | Fast Mode Plus, VCC = 2.5V to 5.5V | 10 | ||
| Start Set-Up Time | tSU.STA | 600 | ns | Fast Mode, VCC = 1.7V to 2.5V | 10 | ||
| Start Set-Up Time | tSU.STA | 250 | ns | Fast Mode Plus, VCC = 2.5V to 5.5V | 10 | ||
| Data In Hold Time | tHD.DAT | 0 | ns | Fast Mode, VCC = 1.7V to 2.5V | 10 | ||
| Data In Set-up Time | tSU.DAT | 100 | ns | Fast Mode, VCC = 1.7V to 2.5V | 10 | ||
| Inputs Rise Time | tR | 300 | ns | Fast Mode, VCC = 1.7V to 2.5V | 10 | ||
| Inputs Fall Time | tF | 300 | ns | Fast Mode, VCC = 1.7V to 2.5V | 10 | ||
| Inputs Fall Time | tF | 100 | ns | Fast Mode Plus, VCC = 2.5V to 5.5V | 10 | ||
| Stop Set-Up Time | tSU.STO | 600 | ns | Fast Mode, VCC = 1.7V to 2.5V | 10 | ||
| Stop Set-Up Time | tSU.STO | 250 | ns | Fast Mode Plus, VCC = 2.5V to 5.5V | 10 | ||
| Data Out Hold Time | tDH | 50 | ns | Fast Mode, VCC = 1.7V to 2.5V | 10 | ||
| Write Cycle Time | tWR | 5 | ms | Fast Mode, VCC = 1.7V to 2.5V | 10 | ||
| Time required after VCC is stable before the device can accept commands | tPUP | 100 | μs | 11 | |||
| Power-on Reset Threshold Voltage | VPOR | 1.5 | V | 11 | |||
| Minimum time at VCC = 0V between power cycles | tPOFF | 500 | ms | 11 | |||
| Input/Output Capacitance (SDA) | CI/O | 8 | pF | VI/O = 0V | 11 | ||
| Input Capacitance (A0, A1, A2 and SCL) | CIN | 6 | pF | VIN = 0V | 11 | ||
| Write Endurance | 1e+06 | Write Cycles | TA = 25°C, VCC = 3.3V, Page Write mode | 11 | |||
| Data Retention | 100 | Years | TA = 55°C | 11 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | tin | 8-Lead Plastic Small Outline (SN) - Narrow, 3.90 mm (.150 In.) Body [SOIC] © 2020 Microchip Technology Inc. | 29 |
CAD (KiCad official)
- Symbol:
AT24MAC402-SSHM-T - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
at24mac402-sshm-t-etched.step/at24mac402-sshm-t-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);at24mac402-sshm-t.step/at24mac402-sshm-t.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Microchip Tech datasheet (45 pp, sha256
07384d2ed03d89d2, retrieved 2026-10-23, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).