component
AT24C512CN
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HGSEMI EEPROM, DIP-8. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
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at24c512cn: laser-etched CAD + chip hero (factory 2.0.0 backfill)
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AT24C512CN
HGSEMI · EEPROM · DIP-8
AT24C512CN from HGSEMI, in a DIP-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | E0 | input | Device address input bit 0. Hard-wired to VCC or GND to set the least-significant device address bit, allowing up to eight AT24C512C devices on one I2C bus. Internally pulled down to GND if left floating. |
| 2 | E1 | input | Device address input bit 1. Hard-wired to VCC or GND to set the middle device address bit. Internally pulled down to GND if left floating. |
| 3 | E2 | input | Device address input bit 2. Hard-wired to VCC or GND to set the most-significant device address bit. Internally pulled down to GND if left floating. |
| 4 | GND | power_in | Ground reference for the power supply. Must be connected to system ground. |
| 5 | SDA | bidirectional | I2C Serial Data. Open-drain bidirectional pin used to serially transfer data to and from the device; requires an external pull-up resistor to VCC. |
| 6 | SCL | input | I2C Serial Clock. Provides the clock to the device; input/command data on SDA is latched on the rising edge of SCL and output data on SDA is clocked out on the falling edge of SCL. |
| 7 | WP | input | Write Protect. When tied to VCC, the entire memory array is write-protected (Read-only). When tied to GND or left floating, write operations are enabled. When driven high, address bytes are ACKed but data bytes are NACKed. |
| 8 | VCC | power_in | Device power supply, 1.7 V to 5.5 V. Operations at invalid VCC voltages may produce spurious results and should not be attempted. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | HGSEMI |
| Package | DIP-8 |
| Category | Memory |
| Pins | 8 |
Ordering variants
Same part, different packaging or reel option.
AT24C512CNAT24C512CNCM/TRAT24C512CNCMM/TRAT24C512CNCMT/TRAT24C512CNCDQ/TRAT24C512CNCDQ3/TR
CAD (KiCad official)
- Symbol:
AT24C512CN - Footprint:
Package_DIP:DIP-8_W7.62mm - 3D model: DIP-8 (KiCad packages3D, STEP)
- 3D model files:
at24c512cn-etched.step/at24c512cn-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);at24c512cn.step/at24c512cn.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: HGSEMI datasheet (26 pp, sha256
9b5af03846a21237, retrieved 2026-08-17, tier: lcsc) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# AT24C512CN
**HGSEMI** · EEPROM · DIP-8
AT24C512CN from HGSEMI, in a DIP-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | E0 | input | Device address input bit 0. Hard-wired to VCC or GND to set the least-significant device address bit, allowing up to eight AT24C512C devices on one I2C bus. Internally pulled down to GND if left floating. |
| 2 | E1 | input | Device address input bit 1. Hard-wired to VCC or GND to set the middle device address bit. Internally pulled down to GND if left floating. |
| 3 | E2 | input | Device address input bit 2. Hard-wired to VCC or GND to set the most-significant device address bit. Internally pulled down to GND if left floating. |
| 4 | GND | power_in | Ground reference for the power supply. Must be connected to system ground. |
| 5 | SDA | bidirectional | I2C Serial Data. Open-drain bidirectional pin used to serially transfer data to and from the device; requires an external pull-up resistor to VCC. |
| 6 | SCL | input | I2C Serial Clock. Provides the clock to the device; input/command data on SDA is latched on the rising edge of SCL and output data on SDA is clocked out on the falling edge of SCL. |
| 7 | WP | input | Write Protect. When tied to VCC, the entire memory array is write-protected (Read-only). When tied to GND or left floating, write operations are enabled. When driven high, address bytes are ACKed but data bytes are NACKed. |
| 8 | VCC | power_in | Device power supply, 1.7 V to 5.5 V. Operations at invalid VCC voltages may produce spurious results and should not be attempted. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | HGSEMI |
| Package | DIP-8 |
| Category | Memory |
| Pins | 8 |
## Ordering variants
Same part, different packaging or reel option.
- `AT24C512CN`
- `AT24C512CNCM/TR`
- `AT24C512CNCMM/TR`
- `AT24C512CNCMT/TR`
- `AT24C512CNCDQ/TR`
- `AT24C512CNCDQ3/TR`
## CAD (KiCad official)
- Symbol: `AT24C512CN`
- Footprint: `Package_DIP:DIP-8_W7.62mm`
- 3D model: DIP-8 (KiCad packages3D, STEP)
- 3D model files: `at24c512cn-etched.step` / `at24c512cn-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `at24c512cn.step` / `at24c512cn.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [HGSEMI datasheet](docs/at24c512cn-datasheet.pdf) (26 pp, sha256 `9b5af03846a21237`, retrieved 2026-08-17, tier: lcsc)
- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/at24c512cn-datasheet.pdf)