component
AT24C256CN
Public Made by Adomby adom
HGSEMI EEPROM, DIP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
| Name | Last updated |
|---|---|
| docs | 12d ago |
| viewers | 12d ago |
| at24c256cn-etched.glb | 12d ago |
| at24c256cn-etched.step | 12d ago |
| at24c256cn-hero.glb | 12d ago |
| at24c256cn-hero.overlay.json | 12d ago |
| at24c256cn.glb | 12d ago |
| at24c256cn.kicad_mod | 12d ago |
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| at24c256cn.step | 12d ago |
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| README.md | 12d ago |
AT24C256CN
HGSEMI · EEPROM · DIP-8
AT24C256CN from HGSEMI, in a DIP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | E0 | input | Device address input that sets the least-significant bit of the I2C seven-bit slave address and can be tied to VCC or GND, allowing up to eight devices on the same bus. |
| 2 | E1 | input | Device address input that sets the middle bit of the I2C seven-bit slave address and can be tied to VCC or GND, allowing up to eight devices on the same bus. |
| 3 | E2 | input | Device address input that sets the upper bit of the I2C seven-bit slave address and can be tied to VCC or GND, allowing up to eight devices on the same bus. |
| 4 | GND | power_in | Ground reference for the power supply, to be connected to system ground. |
| 5 | SDA | bidirectional | Serial data open-drain bidirectional pin used to transfer data to and from the device. |
| 6 | SCL | input | Serial clock input that controls data flow, latching input data on the rising edge and clocking output data on the falling edge. |
| 7 | WP | input | Write protect input: connected to VCC the whole memory array becomes read-only, connected to GND or left floating writes are enabled. |
| 8 | VCC | power_in | Device power supply pin, operating range 1.7V to 5.5V, with operation at invalid VCC voltages not to be attempted. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | HGSEMI |
| Package | DIP-8 |
| Category | Memory |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply Voltage | VCC | 1.7 | 5.5 | V | 18 | ||
| Supply Current (Read) | ICC1 | 0.15 | mA | VCC = 1.7V, Read at 1MHz | 18 | ||
| Supply Current (Read) | ICC1 | 0.4 | mA | VCC = 5.5V, Read at 400 kHz | 18 | ||
| Supply Current (Read) | ICC1 | 0.5 | mA | VCC = 5.5V, Read at 1MHz | 18 | ||
| Supply Current (Write) | ICC2 | 0.5 | mA | VCC = 1.7V, Write at 400 kHz | 18 | ||
| Supply Current (Write) | ICC2 | 1 | mA | VCC = 5.5V, Write at 400 kHz | 18 | ||
| Standby Current | ISB | 0.5 | μA | VCC = 1.7V, VIN = VCC or GND | 18 | ||
| Standby Current | ISB | 1 | μA | VCC = 5.5V, VIN = VCC or GND | 18 | ||
| Input Leakage Current | ILI | 1 | μA | VIN = VCC or GND | 18 | ||
| Output Leakage Current | ILO | 1 | μA | VOUT = VCC or GND | 18 | ||
| Input Low-Level Voltage (SDA, SCL) | VIL | -0.5 | 0.3 | V | max is 0.3*VCC | 18 | |
| Input High-Level Voltage (SDA, SCL) | VIH | 0.7 | 0.5 | V | min is 0.7*VCC; max is VCC +0.5 | 18 | |
| Low-Level Output Voltage | VOL1 | 0.4 | V | VCC > 2V, IOL = 3mA | 18 | ||
| Low-Level Output Voltage | VOL2 | 0.2 | V | VCC ≤ 2V, IOL = 2mA | 18 | ||
| Ambient temperature with power applied | TA | -40 | 105 | °C | 18 | ||
| Storage temperature | TSTG | -65 | 150 | °C | 18 | ||
| Supply voltage | VCC | -0.5 | 6 | V | 18 | ||
| Voltage on input Pins | VIN | -0.5 | 6 | V | 18 | ||
| Lead Temperature (Soldering, 10 seconds) | TL | 245 | °C | 18 | |||
| Operating Temperature Range | TA | -40 | 105 | °C | 1 | ||
| Clock Frequency, SCL (Fast) | fSCL | 400 | kHz | Fast, VCC = 1.7V to 5.5V | 19 | ||
| Clock Frequency, SCL (High Speed) | fSCL | 1000 | kHz | High Speed, VCC = 1.7V to 5.5V | 19 | ||
| Clock Pulse Width Low (Fast) | tLOW | 1300 | ns | Fast | 19 | ||
| Clock Pulse Width Low (High Speed) | tLOW | 600 | ns | High Speed | 19 | ||
| Clock Pulse Width High (Fast) | tHIGH | 600 | ns | Fast | 19 | ||
| Clock Pulse Width High (High Speed) | tHIGH | 260 | ns | High Speed | 19 | ||
| SDA Rise Time (Fast) | tR | 300 | ns | Fast; ensured by characterization only | 19 | ||
| SDA Rise Time (High Speed) | tR | 300 | ns | High Speed; ensured by characterization only | 19 | ||
| SDA(Out) Fall Time (Fast) | tF | 300 | ns | Fast; ensured by characterization only | 19 | ||
| SDA(Out) Fall Time (High Speed) | tF | 100 | ns | High Speed; ensured by characterization only | 19 | ||
| Start Hold Time (Fast) | tHD.STA | 600 | ns | Fast | 19 | ||
| Start Hold Time (High Speed) | tHD.STA | 250 | ns | High Speed | 19 | ||
| Start Setup Time (Fast) | tSU.STA | 600 | ns | Fast | 19 | ||
| Start Setup Time (High Speed) | tSU.STA | 250 | ns | High Speed | 19 | ||
| Stop Setup Time (Fast) | tSU.STO | 600 | ns | Fast | 19 | ||
| Stop Setup Time (High Speed) | tSU.STO | 250 | ns | High Speed | 19 | ||
| Bus Free Time between Stop and Next Start (Fast) | tBUF | 1300 | ns | Fast | 19 | ||
| Bus Free Time between Stop and Next Start (High Speed) | tBUF | 500 | ns | High Speed | 19 | ||
| Data In Hold Time (Fast) | tHD.DI | 0 | ns | Fast | 19 | ||
| Data In Hold Time (High Speed) | tHD.DI | 0 | ns | High Speed | 19 | ||
| Data In Setup Time (Fast) | tSU.DAT | 100 | ns | Fast | 19 | ||
| Data In Setup Time (High Speed) | tSU.DAT | 50 | ns | High Speed | 19 | ||
| Data Out Hold Time (Fast) | tHD.DAT | 50 | ns | Fast | 19 | ||
| Data Out Hold Time (High Speed) | tHD.DAT | 50 | ns | High Speed | 19 | ||
| SCL Low to Data Out Valid (Fast) | tAA | 100 | 900 | ns | Fast | 19 | |
| SCL Low to Data Out Valid (High Speed) | tAA | 50 | 500 | ns | High Speed | 19 | |
| WP Pin Setup Time (Fast) | tSU.WP | 1200 | ns | Fast | 19 | ||
| WP Pin Setup Time (High Speed) | tSU.WP | 600 | ns | High Speed | 19 | ||
| WP Pin Hold Time (Fast) | tHD.WP | 1200 | ns | Fast | 19 | ||
| WP Pin Hold Time (High Speed) | tHD.WP | 600 | ns | High Speed | 19 | ||
| Write Cycle Time (Fast) | tWR | 5 | ms | Fast | 19 | ||
| Write Cycle Time (High Speed) | tWR | 5 | ms | High Speed | 19 | ||
| Noise Suppression Time (Fast) | tI | 50 | ns | Fast | 19 | ||
| Noise Suppression Time (High Speed) | tI | 50 | ns | High Speed | 19 | ||
| Power-On Reset Time | tPOR | 10 | ms | 6 | |||
| Power-On Reset Voltage | VPOR | 1.6 | V | 6 | |||
| Brown-out Reset Voltage | VBOR | 0.8 | V | 6 | |||
| Time from Power-On to First Command | tINIT | 10 | ms | 6 | |||
| Warm Power Cycle Off Time | tPOFF | 1 | ms | 6 | |||
| Input/output Capacitance (SDA) | CI/O | 8 | pF | VI/O = 0V; TA = +25°C, fC = 1MHz | 21 | ||
| Input Capacitance (SA0, SA1, SA2, SCL) | CIN | 6 | pF | VIN = 0V; TA = +25°C, fC = 1MHz | 21 | ||
| Data Retention | DR | 100 | year | TA = +25°C | 21 |
CAD (KiCad official)
- Symbol:
AT24C256CN - Footprint:
Package_DIP:DIP-8_W7.62mm - 3D model: DIP-8 (KiCad packages3D, STEP)
- 3D model files:
at24c256cn-etched.step/at24c256cn-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);at24c256cn.step/at24c256cn.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: HGSEMI datasheet (25 pp, sha256
cd5e09d73709b3f3, retrieved 2026-10-23, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).