# AT24C256C-SSHL-B

**Microchip Tech** · EEPROM · SOIC-8

AT24C256C-SSHL-B from Microchip Tech, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | A0 | input | Device address input, hard-wired to GND or VCC; if left floating it is internally pulled down to GND, and Microchip recommends connecting it to a known state with pull-up resistors of 10 kΩ or less. |
| 2 | A1 | input | Device address input, hard-wired to GND or VCC; if left floating it is internally pulled down to GND, and Microchip recommends connecting it to a known state with pull-up resistors of 10 kΩ or less. |
| 3 | A2 | input | Device address input, hard-wired to GND or VCC; if left floating it is internally pulled down to GND, and Microchip recommends connecting it to a known state with pull-up resistors of 10 kΩ or less. |
| 4 | GND | power_in | Ground reference for the power supply, to be connected to the system ground. |
| 5 | SDA | bidirectional | Open-drain serial data input/output that must be pulled high with an external pull-up resistor not exceeding 10 kΩ and may be wire-ORed with other open-drain devices on the bus. |
| 6 | SCL | input | Serial clock input that latches SDA input data on its rising edge and clocks SDA output data on its falling edge; it must be held high when the bus is idle or pulled high with an external pull-up resistor. |
| 7 | WP | input | Write-protect input: connected to GND allows normal writes, connected to VCC inhibits writes to the full array, and if left floating it is internally pulled down to GND (use a known state, pull-up of 10 kΩ or less recommended). |
| 8 | VCC | power_in | Device power supply pin; operation at invalid VCC voltages may produce spurious results and should not be attempted (device operates from 1.7 V to 5.5 V). |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | SOIC-8 |
| Category | Memory |
| Pins | 8 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Temperature under bias |  | -55 |  | 125 | °C |  | 9 |
| Storage temperature |  | -65 |  | 150 | °C |  | 9 |
| VCC | VCC |  |  | 6.25 | V |  | 9 |
| Voltage on any pin with respect to ground |  | -1 |  | 7 | V |  | 9 |
| DC output current |  |  |  | 5 | mA |  | 9 |
| ESD protection |  | 4 |  |  | kV |  | 9 |
| Operating Temperature (Case) |  | -40 |  | 85 | °C | Industrial Temperature Range | 9 |
| VCC Power Supply | VCC | 1.7 |  | 5.5 | V | Low Voltage Grade | 9 |
| Supply Voltage | VCC1 | 1.7 |  | 5.5 | V |  | 9 |
| Supply Current (read) | ICC1 |  | 1 | 2 | mA | VCC = 5.0V, Read at 400 kHz | 9 |
| Supply Current (write) | ICC2 |  | 2 | 3 | mA | VCC = 5.0V, Write at 400 kHz | 9 |
| Standby Current | ISB1 |  |  | 1 | μA | VCC = 1.7V, VIN = VCC or GND | 9 |
| Standby Current | ISB1 |  |  | 6 | μA | VCC = 5.0V, VIN = VCC or GND | 9 |
| Input Leakage Current | ILI |  | 0.1 | 3 | μA | VIN = VCC or GND; VCC = 5.0V | 9 |
| Output Leakage Current | ILO |  | 0.05 | 3 | μA | VOUT = VCC or GND; VCC = 5.0V | 9 |
| Input Low Level | VIL | -0.6 |  |  | V | Note 2 | 9 |
| Output Low Level | VOL1 |  |  | 0.2 | V | VCC = 1.7V, IOL = 0.15 mA | 10 |
| Output Low Level | VOL2 |  |  | 0.4 | V | VCC = 3.0V, IOL = 2.1 mA | 10 |
| Clock Frequency, SCL | fSCL |  |  | 400 | kHz | 1.7V column | 10 |
| Clock Frequency, SCL | fSCL |  |  | 1000 | kHz | 2.5V, 5.0V column | 10 |
| Clock Pulse Width Low | tLOW | 1300 |  |  | ns | 1.7V column | 10 |
| Clock Pulse Width Low | tLOW | 500 |  |  | ns | 2.5V, 5.0V column | 10 |
| Clock Pulse Width High | tHIGH | 600 |  |  | ns | 1.7V column | 10 |
| Clock Pulse Width High | tHIGH | 400 |  |  | ns | 2.5V, 5.0V column | 10 |
| Noise Suppression Time | tI |  |  | 100 | ns | 1.7V column | 10 |
| Noise Suppression Time | tI |  |  | 50 | ns | 2.5V, 5.0V column | 10 |
| Clock Low to Data Out Valid | tAA | 50 |  | 900 | ns | 1.7V column | 10 |
| Clock Low to Data Out Valid | tAA | 50 |  | 450 | ns | 2.5V, 5.0V column | 10 |
| Bus Free Time between Stop and Start | tBUF | 1300 |  |  | ns | 1.7V column | 10 |
| Bus Free Time between Stop and Start | tBUF | 500 |  |  | ns | 2.5V, 5.0V column | 10 |
| Start Hold Time | tHD.STA | 600 |  |  | ns | 1.7V column | 10 |
| Start Hold Time | tHD.STA | 250 |  |  | ns | 2.5V, 5.0V column | 10 |
| Start Set-up Time | tSU.STA | 600 |  |  | ns | 1.7V column | 10 |
| Start Set-up Time | tSU.STA | 250 |  |  | ns | 2.5V, 5.0V column | 10 |
| Data In Hold Time | tHD.DAT | 0 |  |  | ns | 1.7V column | 10 |
| Data In Set-up Time | tSU.DAT | 100 |  |  | ns | 1.7V column | 10 |
| Inputs Rise Time | tR |  |  | 300 | ns | 1.7V column | 10 |
| Inputs Fall Time | tF |  |  | 300 | ns | 1.7V column | 10 |
| Inputs Fall Time | tF |  |  | 100 | ns | 2.5V, 5.0V column | 10 |
| Stop Set-up Time | tSU.STO | 600 |  |  | ns | 1.7V column | 10 |
| Stop Set-up Time | tSU.STO | 250 |  |  | ns | 2.5V, 5.0V column | 10 |
| Data Out Hold Time | tDH | 50 |  |  | ns | 1.7V column | 10 |
| Write Cycle Time | tWR |  |  | 5 | ms | 1.7V column | 10 |
| Time required after VCC is stable before the device can accept commands | tPUP | 100 |  |  | µs |  | 11 |
| Power-on Reset Threshold Voltage | VPOR |  |  | 1.5 | V |  | 11 |
| Minimum time at VCC = 0V between power cycles | tPOFF | 500 |  |  | ms |  | 11 |
| Input/Output Capacitance (SDA) | CI/O |  |  | 8 | pF | VI/O = 0V | 12 |
| Input Capacitance (A0, A1, A2 and SCL) | CIN |  |  | 6 | pF | VIN = 0V | 12 |
| Write Endurance |  | 1e+06 |  |  | Write Cycles | TA = 25°C, VCC = 3.3V, Page Write mode | 12 |
| Data Retention |  | 100 |  |  | Years | TA = 55°C | 12 |

## Materials and finish

As the datasheet states them (page.json `metadata.appearance`; the 3D model's colours follow it).

| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts |  | tin | 8-Lead Plastic Small Outline (SN) - Narrow, 3.90 mm (.150 In.) Body [SOIC] © 2017 Microchip Technology Inc. | 25 |

## CAD (KiCad official)

- Symbol: `AT24C256C-SSHL-B`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files: `at24c256c-sshl-b-etched.step` / `at24c256c-sshl-b-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `at24c256c-sshl-b.step` / `at24c256c-sshl-b.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Microchip Tech datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588894363870482432) (39 pp, sha256 `af946b6870abc724`, retrieved 2026-10-17, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/at24c256c-sshl-b-datasheet.pdf)