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AT24C16D-PUM-TUDI
Public Made by Adomby adom
Tudi EEPROM, DIP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownAT24C16D-PUM-TUDI
Tudi · EEPROM · DIP-8
AT24C16D-PUM-TUDI from Tudi, in a DIP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | A0 | input | Device address input hardwired to VCC or GND on 2K/4K/8K devices; on the 16K (AT24C16) it is a no-connect and does not select the device address. |
| 2 | A1 | input | Device address input hardwired to VCC or GND on 2K/4K devices; on the 16K (AT24C16) it is a no-connect and does not select the device address. |
| 3 | A2 | input | Device address input hardwired to VCC or GND on the 2K device; on the 16K (AT24C16) it is a no-connect and does not select the device address. |
| 4 | GND | power_in | Ground reference for the device. |
| 5 | SDA | bidirectional | Open-drain serial data I/O that may be wire-ORed with other open-drain or open-collector devices; it is normally pulled high externally and changes only while SCL is low. |
| 6 | SCL | input | Serial clock input that positive-edge clocks data into the device and negative-edge clocks data out of it. |
| 7 | WP | input | Write protect: connecting to GND allows normal read/write operations, while connecting to VCC enables write protection of the full array. |
| 8 | VCC | power_in | Power supply, specified from 1.7 V to 5.5 V over the recommended operating range. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Tudi |
| Package | DIP-8 |
| Category | Memory |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| DC Supply Voltage | VCC | -0.3 | 6.5 | V | 10 | ||
| Input / Output Voltage (minimum, relative to GND) | -0.3 | V | GND-0.3V minimum | 10 | |||
| Input / Output Voltage (maximum, relative to VCC) | 0.3 | V | VCC+0.3V maximum | 10 | |||
| Operating Ambient Temperature | -40 | 85 | ℃ | 10 | |||
| Storage Temperature | -65 | 150 | ℃ | 10 | |||
| Electrostatic pulse | 8000 | V | Human Body model | 10 | |||
| Operating Ambient Temperature (recommended range) | TA | -40 | 85 | ℃ | VCC = +1.7V to +5.5V | 10 | |
| Supply Voltage (recommended range) | VCC | 1.7 | 5.5 | V | TA = -40℃ to +85℃ | 10 | |
| Output Low Level, VCC=5.0V | VOL2 | 0.4 | V | IOL=3.0mA | 10 | ||
| Output Low Level, VCC=1.7V | VOL1 | 0.2 | V | IOL=0.15mA | 10 | ||
| Input High Level (minimum) | VIH1 | 0.7 | ×VCC | VCC=1.7V to 5.5V | 10 | ||
| Input High Level (maximum, VCC+0.3V) | VIH1 | 0.3 | V | Maximum is VCC+0.3V; VCC=1.7V to 5.5V | 10 | ||
| Input Low Level (minimum) | VIL1 | -0.3 | V | VCC=1.7V to 5.5V | 10 | ||
| Input Low Level (maximum) | VIL1 | 0.3 | ×VCC | VCC=1.7V to 5.5V | 10 | ||
| Output Leakage Current | ILO | 0.05 | 1 | μA | VOUT=VCC or VSS | 10 | |
| Input Leakage Current | ILI | 0.1 | 1 | μA | VIN=VCC or VSS | 10 | |
| Standby Supply Current | ISB1 | 0.03 | 0.5 | μA | VCC=5.0V | 10 | |
| Supply Current WRITE | ICC2 | 0.28 | 0.5 | mA | VCC=5.0V, WRITE at 400KHZ | 10 | |
| Supply Current READ | ICC1 | 0.14 | 0.3 | mA | VCC=5.0V, READ at 400KHZ | 10 | |
| Supply Voltage (range 2) | VCC2 | 2.5 | 5.5 | V | 10 | ||
| Supply Voltage (range 1) | VCC1 | 1.7 | 5.5 | V | 10 | ||
| Input Capacitance (A0,A1,A2,SCL) | CIN | 6 | pF | TA=25℃, f=1.0 MHz, VCC=1.7V, VIN=0V | 10 | ||
| Input/Output Capacitance (SDA) | CI/O | 8 | pF | TA=25℃, f=1.0 MHz, VCC=1.7V, VI/O=0V | 10 | ||
| Write Cycle Time | tWR | 1.9 | 3 | ms | VCC=1.7V to 5.5V; CL=1 TTL gate and 100 pF | 11 | |
| Data Out Hold Time | tDH | 50 | ns | VCC=1.7V to 5.5V; CL=1 TTL gate and 100 pF | 11 | ||
| Stop Setup Time | tSU.STO | 0.25 | μs | VCC=1.7V to 5.5V; CL=1 TTL gate and 100 pF | 11 | ||
| Input Fall Time | tF | 0.3 | μs | VCC=1.7V to 5.5V; CL=1 TTL gate and 100 pF; characterized, not 100% tested | 11 | ||
| Input Rise Time | tR | 0.3 | μs | VCC=1.7V to 5.5V; CL=1 TTL gate and 100 pF; characterized, not 100% tested | 11 | ||
| Data In Setup Time | tSU.DAT | 100 | ns | VCC=1.7V to 5.5V; CL=1 TTL gate and 100 pF | 11 | ||
| Data In Hold Time | tHD.DAT | 0 | μs | VCC=1.7V to 5.5V; CL=1 TTL gate and 100 pF | 11 | ||
| Start Setup Time | tSU.STA | 0.25 | μs | VCC=1.7V to 5.5V; CL=1 TTL gate and 100 pF | 11 | ||
| Start Hold Time | tHD.STA | 0.25 | μs | VCC=1.7V to 5.5V; CL=1 TTL gate and 100 pF | 11 | ||
| Time the bus must be free before a new transmission can start | tBUF | 0.5 | μs | VCC=1.7V to 5.5V; CL=1 TTL gate and 100 pF | 11 | ||
| Clock Low to Data Out Valid | tAA | 0.1 | 0.55 | μs | VCC=1.7V to 5.5V; CL=1 TTL gate and 100 pF | 11 | |
| Noise Suppression Time | tI | 50 | ns | VCC=1.7V to 5.5V; CL=1 TTL gate and 100 pF | 11 | ||
| Clock Pulse Width High | tHIGH | 0.4 | μs | VCC=1.7V to 5.5V; CL=1 TTL gate and 100 pF | 11 | ||
| Clock Pulse Width Low | tLOW | 0.6 | μs | VCC=1.7V to 5.5V; CL=1 TTL gate and 100 pF | 11 | ||
| Clock Frequency, SCL | fSCL | 400 | KHZ | 1.7V≤VCC<2.5V; CL=1 TTL gate and 100 pF | 11 | ||
| Clock Frequency, SCL | fSCL | 1000 | KHZ | 2.5V≤VCC<5.5V; CL=1 TTL gate and 100 pF | 11 |
CAD (KiCad official)
- Symbol:
AT24C16D-PUM-TUDI - Footprint:
Package_DIP:DIP-8_W7.62mm - 3D model: DIP-8 (KiCad packages3D, STEP)
- 3D model files:
at24c16d-pum-tudi-etched.step/at24c16d-pum-tudi-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);at24c16d-pum-tudi.step/at24c16d-pum-tudi.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Tudi datasheet (18 pp, sha256
0e83494dd822330f, retrieved 2026-10-16, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).