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AT24C128AM

Public Made by Adom

by adom

HGSEMI EEPROM, SOP-8. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.

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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs at24c128am: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
viewers at24c128am: viewers · Ray
at24c128am-etched.fit.json at24c128am: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
at24c128am-etched.glb at24c128am: white body in tscircuit (pre-1.8 etch structure under an assembly instance); Ray 2026-10-19: black IC body… · Ray
at24c128am-etched.step at24c128am: white body in tscircuit (pre-1.8 etch structure under an assembly instance); Ray 2026-10-19: black IC body… · Ray
at24c128am.glb Publish 0.1.0 · Ray
at24c128am.kicad_mod Publish 0.1.0 · Ray
at24c128am.kicad_sym Publish 0.1.0 · Ray
at24c128am.lbr Publish 0.1.0 · Ray
at24c128am.step Publish 0.1.0 · Ray
package.json Publish 0.1.0 · Ray
page.json at24c128am: white body in tscircuit (pre-1.8 etch structure under an assembly instance); Ray 2026-10-19: black IC body… · Ray
README.md at24c128am: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray

AT24C128AM

HGSEMI · EEPROM · SOP-8

AT24C128AM from HGSEMI, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 A0 input Device address input bit 0. Hard-wired to VCC or GND to select one of up to 8 devices sharing the I2C bus. Internally biased to logic low if left floating.
2 A1 input Device address input bit 1. Hard-wired to VCC or GND to select one of up to 8 devices sharing the I2C bus. Internally biased to logic low if left floating.
3 A2 input Device address input bit 2. Hard-wired to VCC or GND to select one of up to 8 devices sharing the I2C bus. Internally biased to logic low if left floating.
4 GND power_in Ground reference for the device.
5 SDA bidirectional Bidirectional I2C serial data line. Open-drain output; requires an external pull-up resistor to VCC. May be wire-ORed with other open-drain/open-collector devices.
6 SCL input I2C serial clock input. Positive edges clock data into the EEPROM; negative edges clock data out. Supports 100 kHz, 400 kHz, and 1 MHz bus speeds.
7 WP input Hardware write protect. Tie to GND for normal read/write operation; tie to VCC to write-protect the full 128 Kbit array.
8 VCC power_in Positive supply voltage input. Single-supply operation up to 1 MHz interface speed.

Key specifications

Parameter Value
Manufacturer HGSEMI
Package SOP-8
Category Memory
Pins 8

Ordering variants

Same part, different packaging or reel option.

  • AT24C128AM/TR
  • AT24C128AMAN
  • AT24C128AMM/TR
  • AT24C128AMADQ/TR

CAD (KiCad official)

  • Symbol: AT24C128AM
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOP-8 (KiCad packages3D, STEP)
  • 3D model files: at24c128am-etched.step / at24c128am-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); at24c128am.step / at24c128am.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: HGSEMI datasheet (15 pp, sha256 ed9771daf6536261, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF