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AT24C08D-SSHM-T-TUDI

Tudi · EEPROM · SOP-8

AT24C08D-SSHM-T-TUDI from Tudi, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	A0	input	Hard-wired device address input; on the 8K device A0 is no connect and is not used for device addressing.
2	A1	input	Hard-wired device address input that must match its corresponding bit in the device address word on the 4K device; on the 8K device A1 is no connect.
3	A2	input	Hard-wired device address input that must match its corresponding bit in the device address word; on the 8K device it is the only device address bit used.
4	GND	power_in	Ground reference for the device.
5	SDA	bidirectional	Bidirectional open-drain serial data line that may be wire-ORed with any number of other open-drain or open-collector devices.
6	SCL	input	Serial clock input; data is clocked into the device on the positive edge and out of the device on the negative edge.
7	WP	input	Write Protect input: connecting it to GND allows normal read/write operation, while connecting it to VCC enables hardware write protection of the array.
8	VCC	power_in	Power supply, specified from 1.7 V to 5.5 V over the recommended operating range.

Key specifications

Parameter	Value
Manufacturer	Tudi
Package	SOP-8
Category	Memory
Pins	8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter	Symbol	Min	Typ	Max	Unit	Conditions	Page
DC Supply Voltage	VCC	-0.3		6.5	V		10
Input / Output Voltage		-0.3			V	Relative to GND; upper limit printed as VCC+0.3V	10
Operating Ambient Temperature	TA	-40		85	℃		10
Storage Temperature	TSTG	-65		150	℃		10
Electrostatic pulse (Human Body model)				8000	V	Human Body model	10
Supply Voltage	VCC	1.7		5.5	V	TA = -40℃ to +85℃	10
Operating Ambient Temperature	TA	-40		85	℃	VCC = +1.7V to +5.5V	10
Output Low Level	VOL2			0.4	V	VCC=5.0V; IOL=3.0mA	10
Output Low Level	VOL1			0.2	V	VCC=1.7V; IOL=0.15mA	10
Input High Level	VIH1	0.7			×VCC	VCC=1.7V to 5.5V	10
Input High Level (upper limit as printed)	VIH1			0.3	V	Printed as +0.3 V, i.e. VCC+0.3 V; VCC=1.7V to 5.5V	10
Input Low Level (lower limit as printed)	VIL1	-0.3			V	VCC=1.7V to 5.5V	10
Input Low Level	VIL1			0.3	×VCC	VCC=1.7V to 5.5V	10
Output Leakage Current	ILO		0.05	1	µA	VOUT=VCC or VSS	10
Input Leakage Current	ILI		0.1	1	µA	VIN=VCC or VSS	10
Standby Supply Current	ISB1		0.03	0.5	µA	VCC=5.0V	10
Supply Current WRITE	ICC2		0.28	0.5	mA	VCC=5.0V; WRITE at 400KHZ	10
Supply Current READ	ICC1		0.14	0.3	mA	VCC=5.0V; READ at 400KHZ	10
Supply Voltage (ICC2 row)	VCC	2.5		5.5	V		10
Supply Voltage (ICC1 row)	VCC	1.7		5.5	V		10
Input Capacitance (A0,A1,A2,SCL)	CIN			6	pF	TA = 25℃, f = 1.0 MHz, VCC = +1.7V; VIN=0V	10
Input/Output Capacitance (SDA)	CI/O			8	pF	VI/O=0V; TA = 25℃, f = 1.0 MHz, VCC = +1.7V	10
Clock Frequency, SCL	fSCL			400	KHZ	1.7V≤VCC<2.5V; TA=-40℃ to +85℃, CL=1 TTL Gate and 100 pF	11
Clock Frequency, SCL	fSCL			1000	KHZ	2.5V≤VCC<5.5V; TA=-40℃ to +85℃, CL=1 TTL Gate and 100 pF	11
Write Cycle Time	tWR		1.9	3	ms	1.7V≤VCC<2.5V and 2.5V≤VCC<5.5V	11
Data Out Hold Time	tDH	50			ns	1.7V≤VCC<2.5V and 2.5V≤VCC<5.5V	11
Stop Setup Time	tSU.STO	0.25			µs	1.7V≤VCC<2.5V and 2.5V≤VCC<5.5V	11
Input Fall Time	tF			0.3	µs	1.7V≤VCC<2.5V and 2.5V≤VCC<5.5V	11
Input Rise Time	tR			0.3	µs	1.7V≤VCC<2.5V and 2.5V≤VCC<5.5V	11
Data In Setup Time	tSU.DAT	100			ns	1.7V≤VCC<2.5V and 2.5V≤VCC<5.5V	11
Data In Hold Time	tHD.DAT	0			µs	1.7V≤VCC<2.5V and 2.5V≤VCC<5.5V	11
Start Setup Time	tSU.STA	0.25			µs	1.7V≤VCC<2.5V and 2.5V≤VCC<5.5V	11
Start Hold Time	tHD.STA	0.25			µs	1.7V≤VCC<2.5V and 2.5V≤VCC<5.5V	11
Time the bus must be free before a new transmission can start	tBUF	0.5			µs	1.7V≤VCC<2.5V and 2.5V≤VCC<5.5V	11
Clock Low to Data Out Valid	tAA	0.1		0.55	µs	1.7V≤VCC<2.5V and 2.5V≤VCC<5.5V	11
Noise Suppression Time	tI			50	ns	1.7V≤VCC<2.5V and 2.5V≤VCC<5.5V	11
Clock Pulse Width High	tHIGH	0.4			µs	1.7V≤VCC<2.5V and 2.5V≤VCC<5.5V	11
Clock Pulse Width Low	tLOW	0.6			µs	1.7V≤VCC<2.5V and 2.5V≤VCC<5.5V	11

CAD (KiCad official)

Symbol: AT24C08D-SSHM-T-TUDI
Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
3D model: SOP-8 (KiCad packages3D, STEP)
3D model files: at24c08d-sshm-t-tudi-etched.step / at24c08d-sshm-t-tudi-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); at24c08d-sshm-t-tudi.step / at24c08d-sshm-t-tudi.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Tudi datasheet (18 pp, sha256 4c16636c4866f117, retrieved 2026-10-18, tier: lcsc)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF