# ASPL7550DI-R

**ASDsemi** · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-89-3

ASPL7550DI-R from ASDsemi, in a SOT-89-3. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GND | power_in | Ground pin; left pin in the SOT-89 front view, pin 1 in the pin table. |
| 2 | VIN | power_in | Input supply pin; the datasheet gives a 24V maximum input voltage (-0.3V to +28V absolute maximum), with a 10uF capacitor recommended close to the pin. |
| 3 | VOUT | power_out | Regulated 5.0V output (ASPL7550) rated for 150mA typical; needs an output capacitor of at least 2.2uF to ground, with 10uF recommended. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | ASDsemi |
| Package | SOT-89-3 |
| Category | Power Management (PMIC) |
| Pins | 3 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input voltage | VIN |  |  | 24 | V |  | 3 |
| Output voltage | VOUT | 4.85 | 5 | 5.15 | V | VIN=VOUT+2V, IOUT=10mA | 5 |
| Output current | IOUT | 100 | 150 |  | mA | VIN=VOUT+2V | 5 |
| Load regulation | ΔVOUT |  | 25 | 60 | mV | VIN=VOUT+2V, 1mA ≤ IOUT ≤ 50mA | 5 |
| Dropout voltage | VDIF |  | 25 | 55 | mV | IOUT=1mA, ΔVo=2% | 5 |
| Quiescent current | ISS |  | 2.5 | 4 | uA | No load | 5 |
| Input voltage regulation |  |  |  | 0.2 | %/V | Vo+1V≤VIN≤30V, IOUT=1mA | 5 |
| Temperature coefficient |  |  | 100 |  | ppm/℃ | IOUT=10mA, -40℃<Ta<85℃ | 5 |
| Output voltage accuracy (family tolerance, printed as ±2%) |  | -2 |  | 2 | % | Output voltage accuracy as printed in features list for the ASPL75xx family | 1 |
| Power supply voltage (absolute maximum) |  | -0.3 |  | 28 | V |  | 2 |
| Operating ambient temperature |  | -35 |  | 80 | ℃ |  | 2 |
| Storage temperature range |  | -45 |  | 120 | ℃ |  | 2 |
| Thermal resistance junction-to-ambient, SOT89 | θJA |  |  | 200 | ℃/W | Ambient connection, no airflow, no heatsink, SOT89 package | 2 |
| Power dissipation, SOT89 | PD |  |  | 0.5 | W | Ta=25℃, SOT89 package | 2 |

## CAD (KiCad official)

- Symbol: `ASPL7550DI-R`
- Footprint: `Package_TO_SOT_SMD:SOT-89-3`
- 3D model: SOT-89-3 (KiCad packages3D, STEP)
- 3D model files: `aspl7550di-r-etched.step` / `aspl7550di-r-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `aspl7550di-r.step` / `aspl7550di-r.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [ASDsemi datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588943340502978560) (11 pp, sha256 `0366590bdbf4bef4`, retrieved 2026-10-18, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/aspl7550di-r-datasheet.pdf)