component
ASEMB-12.000MHZ-LC-T
Public Made by Adomby adom
Abracon LLC Global Sourcing Parts, SMD3225-4P. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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ASEMB-12.000MHZ-LC-T
Abracon LLC · Global Sourcing Parts · SMD3225-4P
ASEMB-12.000MHZ-LC-T from Abracon LLC, in a SMD3225-4P. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | Standby | input | Tri-state/standby control: logic 1 (VIH 0.7Vdd) or open enables oscillation, logic 0 (VIL<0.25Vdd) puts the output in Hi-Z. |
| 2 | GND | power_in | Ground; a bypass capacitor of approximately 0.01uF is recommended between pin 2 and pin 4. |
| 3 | Output | output | Clock output, rated for 15, 25 or 40pF load depending on option, with 45-55% symmetry at 1/2Vdd. |
| 4 | VDD | power_in | Supply voltage pin, +1.8V to +3.3V nominal (absolute max -0.3V to +4.0V); bypass with about 0.01uF to pin 2. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Abracon LLC |
| Package | SMD3225-4P |
| Category | Global Sourcing Parts |
| Pins | 4 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Frequency Range | 1 | 150 | MHz | 1 | |||
| Overall Frequency Stability (variant C: ±50ppm STD) | -50 | 50 | ppm | 1 | |||
| Aging | -5 | 5 | ppm | First year | 1 | ||
| Operating Temperature (variant L) | -40 | 85 | °C | Option L: -40°C ~ +85°C | 4 | ||
| Supply Voltage (Vdd) | Vdd | 1.8 | 3.3 | V | 1 | ||
| Symmetry | 45 | 55 | % | @1/2Vdd | 1 | ||
| Startup Time | 1.5 | 3 | ms | 1 | |||
| Disable Time | 20 | 100 | ns | 1 | |||
| Disable Stand-by Current | 15 | uA | 1 | ||||
| Tri-state input high level | VIH | 0.7 | *Vdd | Tri-state '1' or Open: Oscillation | 1 | ||
| Tri-state input low level | VIL | 0.25 | *Vdd | Tri-state '0': Hi Z | 1 | ||
| Supply Current (no load), Vdd 1.8V, 1.0 to 39.9999MHz | IDD | 5 | 15 | mA | CL=0pF RL= T=25°C (Standard CL: 15pF) | 1 | |
| Supply Current (no load), Vdd 2.5V, 1.0 to 39.9999MHz | IDD | 6 | 15 | mA | CL=0pF RL= T=25°C (Standard CL: 15pF) | 2 | |
| Supply Current (no load), Vdd 3.3V, 1.0 to 39.9999MHz | IDD | 7 | 15 | mA | CL=0pF RL= T=25°C (Standard CL: 15pF) | 3 | |
| Output High Voltage, Vdd 1.8V | VOH | 0.8 | *Vdd | CL=15, 25, 40pF | 1 | ||
| Output Low Voltage, Vdd 1.8V | VOL | 0.2 | *Vdd | CL=15, 25, 40pF | 1 | ||
| Output High Voltage, Vdd 2.5V | VOH | 0.8 | *Vdd | CL=15, 25pF | 2 | ||
| Output Low Voltage, Vdd 2.5V | VOL | 0.2 | *Vdd | CL=15, 25pF | 2 | ||
| Output High Voltage, Vdd 3.3V | VOH | 0.8 | *Vdd | CL=15pF | 3 | ||
| Output Low Voltage, Vdd 3.3V | VOL | 0.2 | *Vdd | CL=15pF | 3 | ||
| Rise Time, Vdd 1.8V | Tr | 1.8 | 3 | ns | CL=15pF; T=25°C | 1 | |
| Fall Time, Vdd 1.8V | Tf | 1 | 3 | ns | 20%/80%*VDD | 1 | |
| Rise Time, Vdd 2.5V | Tr | 1 | 2 | ns | CL=15pF; T=25°C | 2 | |
| Fall Time, Vdd 2.5V | Tf | 0.9 | 2 | ns | 20%/80%*VDD | 2 | |
| Rise Time, Vdd 3.3V | Tr | 1 | 2 | ns | CL=15pF; T=25°C | 3 | |
| Fall Time, Vdd 3.3V | Tf | 0.9 | 2 | ns | 20%/80%*VDD | 3 | |
| Cycle to Cycle Jitter, Vdd 1.8V | 60 | ps | F=100MHz | 1 | |||
| Cycle to Cycle Jitter, Vdd 2.5V | 50 | ps | F=100MHz | 2 | |||
| Cycle to Cycle Jitter, Vdd 3.3V | 50 | ps | F=100MHz | 3 | |||
| Period Jitter RMS, Vdd 1.8V | 10 | ps | F=100MHz | 1 | |||
| Period Jitter RMS, Vdd 2.5V | 5 | ps | F=100MHz | 2 | |||
| Period Jitter RMS, Vdd 3.3V | 5 | ps | F=100MHz | 3 | |||
| Supply Voltage (absolute) | -0.3 | 4 | V | 4 | |||
| Input Voltage (max Vdd+0.3) | -0.3 | V | Maximum printed as Vdd+0.3 | 4 | |||
| Junction Temperature | 150 | °C | 4 | ||||
| Storage Temperature | -55 | 150 | °C | 4 | |||
| Soldering Temperature | 260 | °C | 40sec max | 4 | |||
| ESD HBM | 4000 | V | HBM | 4 | |||
| ESD MM | 200 | V | MM | 4 | |||
| ESD CDM | 1500 | V | CDM | 4 |
CAD (KiCad official)
- Symbol:
ASEMB-12.000MHZ-LC-T - Footprint:
Crystal:Crystal_SMD_3225-4Pin_3.2x2.5mm - 3D model: SMD3225-4P (KiCad packages3D, STEP)
- 3D model files:
asemb-12-000mhz-lc-t-etched.step/asemb-12-000mhz-lc-t-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);asemb-12-000mhz-lc-t.step/asemb-12-000mhz-lc-t.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Abracon LLC datasheet (5 pp, sha256
5132e5c2340a3dd0, retrieved 2026-10-15, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# ASEMB-12.000MHZ-LC-T
**Abracon LLC** · Global Sourcing Parts · SMD3225-4P
ASEMB-12.000MHZ-LC-T from Abracon LLC, in a SMD3225-4P. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | Standby | input | Tri-state/standby control: logic 1 (VIH 0.7*Vdd) or open enables oscillation, logic 0 (VIL<0.25*Vdd) puts the output in Hi-Z. |
| 2 | GND | power_in | Ground; a bypass capacitor of approximately 0.01uF is recommended between pin 2 and pin 4. |
| 3 | Output | output | Clock output, rated for 15, 25 or 40pF load depending on option, with 45-55% symmetry at 1/2Vdd. |
| 4 | VDD | power_in | Supply voltage pin, +1.8V to +3.3V nominal (absolute max -0.3V to +4.0V); bypass with about 0.01uF to pin 2. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Abracon LLC |
| Package | SMD3225-4P |
| Category | Global Sourcing Parts |
| Pins | 4 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Frequency Range | | 1 | | 150 | MHz | | 1 |
| Overall Frequency Stability (variant C: ±50ppm STD) | | -50 | | 50 | ppm | | 1 |
| Aging | | -5 | | 5 | ppm | First year | 1 |
| Operating Temperature (variant L) | | -40 | | 85 | °C | Option L: -40°C ~ +85°C | 4 |
| Supply Voltage (Vdd) | Vdd | 1.8 | | 3.3 | V | | 1 |
| Symmetry | | 45 | | 55 | % | @1/2Vdd | 1 |
| Startup Time | | | 1.5 | 3 | ms | | 1 |
| Disable Time | | | 20 | 100 | ns | | 1 |
| Disable Stand-by Current | | | | 15 | uA | | 1 |
| Tri-state input high level | VIH | 0.7 | | | *Vdd | Tri-state '1' or Open: Oscillation | 1 |
| Tri-state input low level | VIL | | | 0.25 | *Vdd | Tri-state '0': Hi Z | 1 |
| Supply Current (no load), Vdd 1.8V, 1.0 to 39.9999MHz | IDD | | 5 | 15 | mA | CL=0pF RL= T=25°C (Standard CL: 15pF) | 1 |
| Supply Current (no load), Vdd 2.5V, 1.0 to 39.9999MHz | IDD | | 6 | 15 | mA | CL=0pF RL= T=25°C (Standard CL: 15pF) | 2 |
| Supply Current (no load), Vdd 3.3V, 1.0 to 39.9999MHz | IDD | | 7 | 15 | mA | CL=0pF RL= T=25°C (Standard CL: 15pF) | 3 |
| Output High Voltage, Vdd 1.8V | VOH | 0.8 | | | *Vdd | CL=15, 25, 40pF | 1 |
| Output Low Voltage, Vdd 1.8V | VOL | | | 0.2 | *Vdd | CL=15, 25, 40pF | 1 |
| Output High Voltage, Vdd 2.5V | VOH | 0.8 | | | *Vdd | CL=15, 25pF | 2 |
| Output Low Voltage, Vdd 2.5V | VOL | | | 0.2 | *Vdd | CL=15, 25pF | 2 |
| Output High Voltage, Vdd 3.3V | VOH | 0.8 | | | *Vdd | CL=15pF | 3 |
| Output Low Voltage, Vdd 3.3V | VOL | | | 0.2 | *Vdd | CL=15pF | 3 |
| Rise Time, Vdd 1.8V | Tr | | 1.8 | 3 | ns | CL=15pF; T=25°C | 1 |
| Fall Time, Vdd 1.8V | Tf | | 1 | 3 | ns | 20%/80%*VDD | 1 |
| Rise Time, Vdd 2.5V | Tr | | 1 | 2 | ns | CL=15pF; T=25°C | 2 |
| Fall Time, Vdd 2.5V | Tf | | 0.9 | 2 | ns | 20%/80%*VDD | 2 |
| Rise Time, Vdd 3.3V | Tr | | 1 | 2 | ns | CL=15pF; T=25°C | 3 |
| Fall Time, Vdd 3.3V | Tf | | 0.9 | 2 | ns | 20%/80%*VDD | 3 |
| Cycle to Cycle Jitter, Vdd 1.8V | | | | 60 | ps | F=100MHz | 1 |
| Cycle to Cycle Jitter, Vdd 2.5V | | | | 50 | ps | F=100MHz | 2 |
| Cycle to Cycle Jitter, Vdd 3.3V | | | | 50 | ps | F=100MHz | 3 |
| Period Jitter RMS, Vdd 1.8V | | | | 10 | ps | F=100MHz | 1 |
| Period Jitter RMS, Vdd 2.5V | | | | 5 | ps | F=100MHz | 2 |
| Period Jitter RMS, Vdd 3.3V | | | | 5 | ps | F=100MHz | 3 |
| Supply Voltage (absolute) | | -0.3 | | 4 | V | | 4 |
| Input Voltage (max Vdd+0.3) | | -0.3 | | | V | Maximum printed as Vdd+0.3 | 4 |
| Junction Temperature | | | | 150 | °C | | 4 |
| Storage Temperature | | -55 | | 150 | °C | | 4 |
| Soldering Temperature | | | | 260 | °C | 40sec max | 4 |
| ESD HBM | | | | 4000 | V | HBM | 4 |
| ESD MM | | | | 200 | V | MM | 4 |
| ESD CDM | | | | 1500 | V | CDM | 4 |
## CAD (KiCad official)
- Symbol: `ASEMB-12.000MHZ-LC-T`
- Footprint: `Crystal:Crystal_SMD_3225-4Pin_3.2x2.5mm`
- 3D model: SMD3225-4P (KiCad packages3D, STEP)
- 3D model files: `asemb-12-000mhz-lc-t-etched.step` / `asemb-12-000mhz-lc-t-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `asemb-12-000mhz-lc-t.step` / `asemb-12-000mhz-lc-t.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Abracon LLC datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590148989875494912) (5 pp, sha256 `5132e5c2340a3dd0`, retrieved 2026-10-15, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/asemb-12-000mhz-lc-t-datasheet.pdf)