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ASDM40N80Q-R
Public Made by Adomby adom
ASDsemi MOSFETs, DFN5x6-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownASDM40N80Q-R
ASDsemi · MOSFETs · DFN5x6-8
ASDM40N80Q-R from ASDsemi, in a DFN5x6-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | S | passive | Source pin 1 of the N-channel MOSFET, tied with pins 2 and 3 (Source Pin1-3); pin 1 is marked by the dot. |
| 2 | S | passive | Source pin 2 of the N-channel MOSFET, tied with pins 1 and 3 (Source Pin1-3). |
| 3 | S | passive | Source pin 3 of the N-channel MOSFET, tied with pins 1 and 2 (Source Pin1-3). |
| 4 | G | input | Gate of the N-channel MOSFET, with a maximum gate-source voltage of ±20 V. |
| 5 | D | passive | Drain pin 5, tied with pins 6-8 (Drain Pin5-8); drain-source voltage is rated 40 V. |
| 6 | D | passive | Drain pin 6, tied with pins 5, 7 and 8 (Drain Pin5-8); drain-source voltage is rated 40 V. |
| 7 | D | passive | Drain pin 7, tied with pins 5, 6 and 8 (Drain Pin5-8); drain-source voltage is rated 40 V. |
| 8 | D | passive | Drain pin 8, tied with pins 5-7 (Drain Pin5-8); drain-source voltage is rated 40 V. |
| 9 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | ASDsemi |
| Package | DFN5x6-8 |
| Category | Transistors/Thyristors |
| Pins | 9 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-Source Voltage | VDSS | 40 | V | 1 | |||
| Gate-Source Voltage | VGSS | -20 | 20 | V | 1 | ||
| Continuous Drain Current | ID | 80 | A | TC=25°C | 1 | ||
| Continuous Drain Current | ID | 51 | A | TC=100°C | 1 | ||
| Continuous Drain Current | ID | 25 | A | TA=25°C | 1 | ||
| Continuous Drain Current | ID | 19 | A | TA=70°C | 1 | ||
| Diode Continuous Forward Current | IS | 50 | A | TC=25°C | 1 | ||
| 300μs Pulse Drain Current Tested | IDP | 320 | A | TC=25°C | 1 | ||
| Maximum Power Dissipation | PD | 65 | W | TC=25°C | 1 | ||
| Maximum Power Dissipation | PD | 26 | W | TC=100°C | 1 | ||
| Maximum Power Dissipation | PD | 4.2 | W | TA=25°C | 1 | ||
| Maximum Power Dissipation | PD | 2.7 | W | TA=70°C | 1 | ||
| Maximum Junction Temperature | TJ | 150 | °C | 1 | |||
| Storage Temperature Range | TSTG | -55 | 150 | °C | 1 | ||
| Thermal Resistance-Junction to Case | RθJC | 1.92 | °C/W | 2 | |||
| Thermal Resistance-Junction to Ambient | RθJA | 30 | °C/W | Mounted on 1 inch square copper board, t≤10sec | 2 | ||
| Avalanche Energy, Single Pulsed | EAS | 121 | mJ | Limited by TJmax, IAS=22A, VDD=24V, RG=50Ω, starting TJ=25°C | 2 | ||
| Drain-Source Breakdown Voltage | BVDSS | 40 | V | VGS=0V, IDS=250µA | 2 | ||
| Zero Gate Voltage Drain Current | IDSS | 1 | µA | VDS=40V, VGS=0V | 2 | ||
| Zero Gate Voltage Drain Current | IDSS | 30 | µA | TJ=125°C, VDS=40V, VGS=0V | 2 | ||
| Gate Threshold Voltage | VGS(th) | 1 | 2.5 | V | VDS=VGS, IDS=250µA | 2 | |
| Gate Leakage Current | IGSS | -100 | 100 | nA | VGS=±20V, VDS=0V | 2 | |
| Drain-Source On-state Resistance | RDS(ON) | 4.5 | 5.5 | mΩ | VGS=4.5V, IDS=35A | 2 | |
| Drain-Source On-state Resistance | RDS(ON) | 3.5 | 4.5 | mΩ | VGS=10V, IDS=50A | 2 | |
| Diode Forward Voltage | VSD | 1.2 | V | ISD=50A, VGS=0V | 2 | ||
| Reverse Recovery Time | trr | 18 | ns | ISD=50A, dlSD/dt=100A/µs | 2 | ||
| Reverse Recovery Charge | Qrr | 29 | nC | ISD=50A, dlSD/dt=100A/µs | 2 | ||
| Gate Resistance | RG | 1.3 | Ω | VGS=0V, VDS=0V, F=1MHz | 2 | ||
| Input Capacitance | Ciss | 1560 | pF | VGS=0V, VDS=20V, Frequency=1.0MHz | 2 | ||
| Output Capacitance | Coss | 780 | pF | VGS=0V, VDS=20V, Frequency=1.0MHz | 2 | ||
| Reverse Transfer Capacitance | Crss | 80 | pF | VGS=0V, VDS=20V, Frequency=1.0MHz | 2 | ||
| Turn-on Delay Time | td(ON) | 13 | ns | VDD=20V, IDS=50A, VGEN=10V, RG=4.7Ω | 2 | ||
| Turn-on Rise Time | tr | 21 | ns | VDD=20V, IDS=50A, VGEN=10V, RG=4.7Ω | 2 | ||
| Turn-off Delay Time | td(OFF) | 29 | ns | VDD=20V, IDS=50A, VGEN=10V, RG=4.7Ω | 2 | ||
| Turn-off Fall Time | tf | 9 | ns | VDD=20V, IDS=50A, VGEN=10V, RG=4.7Ω | 2 | ||
| Total Gate Charge | Qg | 29 | nC | VDS=32V, VGS=10V, IDS=50A | 2 | ||
| Gate-Source Charge | Qgs | 5 | nC | VDS=32V, VGS=10V, IDS=50A | 2 | ||
| Gate-Drain Charge | Qgd | 9 | nC | VDS=32V, VGS=10V, IDS=50A | 2 |
CAD (KiCad official)
- Symbol:
ASDM40N80Q-R - Footprint:
Package_DFN_QFN:DFN-S-8-1EP_6x5mm_P1.27mm - 3D model: DFN5x6-8 (KiCad packages3D, STEP)
- 3D model files:
asdm40n80q-r-etched.step/asdm40n80q-r-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);asdm40n80q-r.step/asdm40n80q-r.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: ASDsemi datasheet (9 pp, sha256
70ffe98961d54bf0, retrieved 2026-10-09, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).