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AS5510-DWLT
Public Made by Adomby adom
AMS Linear Hall Sensors, WLCSP-6(1.1x1.4). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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Contents
README
markdownAS5510-DWLT
AMS · Linear Hall Sensors · WLCSP-6(1.1x1.4)
AS5510-DWLT from AMS, in a WLCSP-6(1.1x1.4). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| A1 | VSS | power_in | Negative supply pin, analog and digital ground. |
| A2 | ADR | input | I²C address selection pin; connect to either VSS (56h) or VDD (57h). |
| A3 | VDD | power_in | Positive supply pin; a 100nF capacitor should be connected between this pin and VSS, with VDD specified at 2.5 V to 3.6 V. |
| B1 | SDA | bidirectional | I²C data I/O, open-drain, with 20 mA driving capability. |
| B2 | SCL | input | I²C clock input. |
| B3 | Test | bidirectional | Test pin, must be connected to VSS during operation. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | AMS |
| Package | WLCSP-6(1.1x1.4) |
| Category | Magnetic Sensors |
| Pins | 6 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| DC supply voltage at pin VDD | -0.3 | 5 | V | 5 | |||
| Input pin voltage | -0.3 | V | 5 | ||||
| Input current (latchup immunity) | -100 | 100 | mA | Norm: JEDEC 78 | 5 | ||
| Electrostatic discharge | -2 | 2 | kV | Norm: MIL 883 E method 3015 | 5 | ||
| Storage temperature | -55 | 125 | °C | 5 | |||
| Relative Humidity | 5 | 85 | % | non-condensing | 5 | ||
| Body temperature (Lead-free package) for WLCSP | TBody | 260 | °C | 5 | |||
| Supply voltage at pin VDD | VDD | 2.5 | 3 | 3.6 | V | 6 | |
| Ambient temperature | Tamb | -30 | 85 | °C | 6 | ||
| Low level input voltage (CMOS input ADR) | VIL | 0 | V | 6 | |||
| Input leakage current (ADR) | ILEAK | -1 | 1 | μA | 6 | ||
| Low-level input voltage (I2C) | VIL | -0.5 | V | 7 | |||
| LOW-level output voltage (open-drain or open-collector) | VOL | 0.4 | V | VDD > 2.5V; at 3mA sink current | 7 | ||
| LOW-level output current | IOL | 20 | mA | VOL = 0.4V | 7 | ||
| Output fall time from VIHmax to VILmax | tof | 120 | ns | 7 | |||
| Pulse width of spikes that must be suppressed by the input filter | tSP | 50 | ns | 7 | |||
| Input current at each I/O pin | Ii | -10 | 10 | μA | 7 | ||
| Total capacitive load for each bus line | CB | 550 | pF | 7 | |||
| I/O capacitance (SDA, SCL) | CI/O | 10 | pF | 7 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| housing | PC | (body temperature) specified is in accordance with IPC/ JEDEC J-STD-020 | 5 |
CAD (KiCad official)
- Symbol:
AS5510-DWLT - Footprint:
Package_CSP:WLCSP-6_1.46x1.1mm_Layout3x2_P0.4mm - 3D model: WLCSP-6(1.1x1.4) (KiCad packages3D, STEP)
- 3D model files:
as5510-dwlt-etched.step/as5510-dwlt-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);as5510-dwlt.step/as5510-dwlt.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: AMS datasheet (30 pp, sha256
f8841d90688a46ab, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).