# AS5047P-ATSM

**AMS** · Position Sensors · TSSOP-14

AS5047P-ATSM from AMS, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | CSn | input | SPI chip select, active low. Digital input. If SPI is not used, a pull-up resistor on CSn is required. |
| 2 | CLK | input | SPI clock input. Digital input. If SPI is not used, a pull-down resistor on CLK is required. |
| 3 | MISO | output | SPI master data input, slave output. Digital output. Can be left open if SPI is not used. |
| 4 | MOSI | input | SPI master data output, slave input. Digital input. If SPI is not used, a pull-down resistor on MOSI is required. |
| 5 | TEST | input | Test pin. Must be connected to ground for normal operation. |
| 6 | B | output | Incremental encoder signal B (quadrature). Digital output. Can be left open if ABI is not used. |
| 7 | A | output | Incremental encoder signal A (quadrature). Digital output. Can be left open if ABI is not used. |
| 8 | W/PWM | output | Commutation signal W for BLDC UVW commutation, or PWM-encoded absolute-angle output. Digital output. Function is selectable via configuration register. |
| 9 | V | output | Commutation signal V for BLDC UVW commutation. Digital output. Can be left open if UVW is not used. |
| 10 | U | output | Commutation signal U for BLDC UVW commutation. Digital output. Can be left open if UVW is not used. |
| 11 | VDD | power_in | 5 V power supply input to on-chip regulator. Absolute max 7.0 V; operating range covers 5.0 V supply mode. Decoupling capacitor recommended. |
| 12 | VDD3V3 | power_out | 3.3 V on-chip low-dropout (LDO) regulator output. Requires an external 1 µF decoupling capacitor. In 3.3 V supply mode this pin is tied to the external supply. |
| 13 | GND | power_in | Device ground reference. |
| 14 | I/PWM | output | Incremental signal I (index pulse, one pulse per revolution) or PWM-encoded absolute-angle output. Digital output. Function is selectable via configuration. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | AMS |
| Package | TSSOP-14 |
| Category | Sensors |
| Pins | 14 |

## Ordering variants

Same part, different packaging or reel option.

- `AS5047P-ATSM`

## CAD (KiCad official)

- Symbol: `AS5047P-ATSM` (chip outline baked in the body)
- Footprint: `Package_SO:TSSOP-14_4.4x5mm_P0.65mm`
- 3D model: TSSOP-14 (KiCad packages3D, STEP)
- 3D model files: `as5047p-atsm-etched.step` / `as5047p-atsm-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `as5047p-atsm.step` / `as5047p-atsm.glb` are the bare package body.

## Symbol chip outline

The symbol body carries the chip outline, so the schematic shows the same chip and marking as the 3D view. It was redrawn on 2026-10-21 from the new model: [artwork/AS5047P-ATSM-3d-outline-dark-named.svg](artwork/AS5047P-ATSM-3d-outline-dark-named.svg), drawn in `adom-aiflow-etch outline`'s standard pose from the 3D model (composed mode: the service's body outline and its single-stroke font on the planned band, one line as on the etched mark, outline gate PASS). The etched mark's own edges are 4 px tall at 320 px, below the gate's readability floor, so the composed name stands in for them. The KiCad symbol and the Fusion library (.lbr) carry the same drawing.

![AS5047P-ATSM-3d-outline-dark-named.320.png](artwork/AS5047P-ATSM-3d-outline-dark-named.320.png)

## 3D model check

KiCad's library model is kept. KiCad's library model is kept: every printed dimension is inside ams' limits (foot 0.529 mm against 0.45 to 0.75, A2 0.90 against 0.80 to 1.05) and its leads have KiCad's radiused bends. ams' drawing is not to scale (the top view is drawn with a break line), so the proof is this measured table, not an overlay.

| Dimension (mm) | Datasheet min / typ / max | Model |
|---|---|---|
| D body length | 4.90 / 5.00 / 5.10 | 5.000 |
| E width over pins | 6.40 BSC | 6.400 |
| E1 body width | 4.30 / 4.40 / 4.50 | 4.400 |
| A overall height | max 1.20 | 1.000 |
| A1 standoff | 0.05 / - / 0.15 | 0.100 |
| A2 body thickness | 0.80 / 1.00 / 1.05 | 0.900 |
| e pitch | 0.65 BSC | 0.650 |
| L foot (to the 0.25 mm gauge plane) | 0.45 / 0.60 / 0.75 | 0.529 (measured) |
| R, R1 bend radii | min 0.09 | 0.10, 0.10 (KiCad) |

Measured section through one lead's centre line, cut at the 0.25 mm gauge plane; L = lead tip to where the lead's lower outer surface crosses that plane (JEDEC), provenance/tools/kicad-generator/measure.py. Record: [provenance/3d-model.json](provenance/3d-model.json).

## Detail levels for board and digital-twin viewers

::adom-component-lod{src="/adom/as5047p-atsm/render/lod/manifest.json"}

| Level | File | Triangles | Draw calls | Size | Marking |
|---|---|---|---|---|---|
| high | [as5047p-atsm-high.glb](lod/as5047p-atsm-high.glb) | 2310 | 4 | 83 KiB | yes |
| medium | [as5047p-atsm-medium.glb](lod/as5047p-atsm-medium.glb) | 2310 | 4 | 61 KiB | yes |
| low | [as5047p-atsm-low.glb](lod/as5047p-atsm-low.glb) | 1094 | 3 | 30 KiB | no |
| super-low | [as5047p-atsm-super-low.glb](lod/as5047p-atsm-super-low.glb) | 740 | 3 | 23 KiB | no |

All four levels share the Z-up frame, units and seating of the library model, carry no footprint or silkscreen artwork, and keep the real terminals and the pin-1 cue; the leads are matte tin. Low and super-low omit the marking (unreadable at those sizes). Status: candidate; the cached previews were inspected, a streaming LOD viewer has not qualified them.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [AMS datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588941119195926528) (40 pp, sha256 `c90169cd83d2e06b`, retrieved 2026-08-17, tier: lcsc)
- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/as5047p-atsm-datasheet.pdf)