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AS3824E1-ZQFT
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Dialog Semiconductor LED Drivers, VQFN-48-EP(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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AS3824E1-ZQFT
Dialog Semiconductor · LED Drivers · VQFN-48-EP(7x7)
AS3824E1-ZQFT from Dialog Semiconductor, in a VQFN-48-EP(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | G1 | bidirectional | Gate connection to external transistor; connect to S1 if unused. |
| 2 | S1 | bidirectional | Source connection to external transistor; connect to G1 if unused. |
| 3 | V3_2 | power_out | Digital supply output; connect 2.2uF capacitor to GND. |
| 4 | VSYNC | input | Vertical sync frequency input that resets the PWM generators; leave open if unused. |
| 5 | HSYNC | input | Clock input for the PWM generators; leave open if unused. |
| 6 | VDD | power_in | Supply voltage input; connect 4.7uF bypass capacitor to GND. |
| 7 | FB2 | bidirectional | Power supply feedback output 2; leave open if unused. |
| 8 | FB1 | bidirectional | Power supply feedback output 1; leave open if unused. |
| 9 | VSSA | power_in | Ground connection. |
| 10 | VSS_SENSE | power_in | Ground sense connection. |
| 11 | S16 | bidirectional | Source connection to external transistor; connect to G16 if unused. |
| 12 | G16 | bidirectional | Gate connection to external transistor; connect to S16 if unused. |
| 13 | S15 | bidirectional | Source connection to external transistor; connect to G15 if unused. |
| 14 | G15 | bidirectional | Gate connection to external transistor; connect to S15 if unused. |
| 15 | S14 | bidirectional | Source connection to external transistor; connect to G14 if unused. |
| 16 | G14 | bidirectional | Gate connection to external transistor; connect to S14 if unused. |
| 17 | S13 | bidirectional | Source connection to external transistor; connect to G13 if unused. |
| 18 | G13 | bidirectional | Gate connection to external transistor; connect to S13 if unused. |
| 19 | G12 | bidirectional | Gate connection to external transistor; connect to S12 if unused. |
| 20 | S12 | bidirectional | Source connection to external transistor; connect to G12 if unused. |
| 21 | G11 | bidirectional | Gate connection to external transistor; connect to S11 if unused. |
| 22 | S11 | bidirectional | Source connection to external transistor; connect to G11 if unused. |
| 23 | G10 | bidirectional | Gate connection to external transistor; connect to S10 if unused. |
| 24 | S10 | bidirectional | Source connection to external transistor; connect to G10 if unused. |
| 25 | G9 | bidirectional | Gate connection to external transistor; connect to S9 if unused. |
| 26 | S9 | bidirectional | Source connection to external transistor; connect to G9 if unused. |
| 27 | xFAULT | output | Open drain fault output; connect pull-up to V3_2; leave open if unused. |
| 28 | SCMP1 | input | Input of short comparator 1; connect to VSS. |
| 29 | SCMP2 | input | Input of short comparator 2; connect to VSS. |
| 30 | xCS | input | SPI interface chip select input with pull-up; leave open if unused. |
| 31 | SDO | tri_state | SPI interface data output with tristate; leave open if unused. |
| 32 | PSE | input | Phase shift enable input; connect to VSS. |
| 33 | SCL | input | SPI interface clock input with pull-down; leave open if unused. |
| 34 | SDI | input | SPI interface data input with pull-down; leave open if unused. |
| 35 | S8 | bidirectional | Source connection to external transistor; connect to G8 if unused. |
| 36 | G8 | bidirectional | Gate connection to external transistor; connect to S8 if unused. |
| 37 | S7 | bidirectional | Source connection to external transistor; connect to G7 if unused. |
| 38 | G7 | bidirectional | Gate connection to external transistor; connect to S7 if unused. |
| 39 | S6 | bidirectional | Source connection to external transistor; connect to G6 if unused. |
| 40 | G6 | bidirectional | Gate connection to external transistor; connect to S6 if unused. |
| 41 | S5 | bidirectional | Source connection to external transistor; connect to G5 if unused. |
| 42 | G5 | bidirectional | Gate connection to external transistor; connect to S5 if unused. |
| 43 | G4 | bidirectional | Gate connection to external transistor; connect to S4 if unused. |
| 44 | S4 | bidirectional | Source connection to external transistor; connect to G4 if unused. |
| 45 | G3 | bidirectional | Gate connection to external transistor; connect to S3 if unused. |
| 46 | S3 | bidirectional | Source connection to external transistor; connect to G3 if unused. |
| 47 | G2 | bidirectional | Gate connection to external transistor; connect to S2 if unused. |
| 48 | S2 | bidirectional | Source connection to external transistor; connect to G2 if unused. |
| 49 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Dialog Semiconductor |
| Package | VQFN-48-EP(7x7) |
| Category | Display Modules / LED Drivers / Display Drivers |
| Pins | 49 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply Voltage to Ground | VDDMAX / VGND | -0.3 | 7 | V | Applicable for pin VDD | 6 | |
| Maximum Voltage Analog pins | VANAMAX | -0.3 | 7 | V | Applicable for pins: FB1, FB2, G1-G16, S1-S16, VSYNC, HSYNC | 6 | |
| Maximum Voltage Digital pins | VDIGMAX | -0.3 | 5 | V | Applicable for pins: V3_2, SDI, SDO, SCL, xCS, SCMP1, SCMP2, xFAULT, PSE | 6 | |
| Input Current (latch-up immunity) | ISCR | -100 | 100 | mA | JEDEC JESD78D Nov 2011 | 6 | |
| Electrostatic Discharge HBM | ESDHBM | -2000 | 2000 | V | JS-001-2012 | 6 | |
| Electrostatic Discharge CDM | ESDCDM | -500 | 500 | V | JEDEC JESD22-C101F Oct 2013 | 6 | |
| Electrostatic Discharge MM | ESDMM | -200 | 200 | V | JESD22-A115C | 6 | |
| Operating Junction Temperature | TJ | -20 | 115 | °C | 6 | ||
| Storage Temperature Range | TSTRG | -55 | 150 | °C | 6 | ||
| Relative Humidity (non-condensing) | RHNC | 5 | 85 | % | 6 | ||
| Junction to Ambient Thermal Resistance | RTHJA | 35 | °C/W | RTHJA typical | 6 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| housing | PC | Package Body Temperature TBODY IPC/JEDEC J-STD-020 | 6 |
CAD (KiCad official)
- Symbol:
AS3824E1-ZQFT - Footprint:
Package_DFN_QFN:QFN-48-1EP_7x7mm_P0.5mm_EP5.15x5.15mm - 3D model: VQFN-48-EP(7x7) (KiCad packages3D, STEP)
- 3D model files:
as3824e1-zqft-etched.step/as3824e1-zqft-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);as3824e1-zqft.step/as3824e1-zqft.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Dialog Semiconductor datasheet (9 pp, sha256
4fcdd3b5dd43293f, retrieved 2026-11-02, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# AS3824E1-ZQFT
**Dialog Semiconductor** · LED Drivers · VQFN-48-EP(7x7)
AS3824E1-ZQFT from Dialog Semiconductor, in a VQFN-48-EP(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | G1 | bidirectional | Gate connection to external transistor; connect to S1 if unused. |
| 2 | S1 | bidirectional | Source connection to external transistor; connect to G1 if unused. |
| 3 | V3_2 | power_out | Digital supply output; connect 2.2uF capacitor to GND. |
| 4 | VSYNC | input | Vertical sync frequency input that resets the PWM generators; leave open if unused. |
| 5 | HSYNC | input | Clock input for the PWM generators; leave open if unused. |
| 6 | VDD | power_in | Supply voltage input; connect 4.7uF bypass capacitor to GND. |
| 7 | FB2 | bidirectional | Power supply feedback output 2; leave open if unused. |
| 8 | FB1 | bidirectional | Power supply feedback output 1; leave open if unused. |
| 9 | VSSA | power_in | Ground connection. |
| 10 | VSS_SENSE | power_in | Ground sense connection. |
| 11 | S16 | bidirectional | Source connection to external transistor; connect to G16 if unused. |
| 12 | G16 | bidirectional | Gate connection to external transistor; connect to S16 if unused. |
| 13 | S15 | bidirectional | Source connection to external transistor; connect to G15 if unused. |
| 14 | G15 | bidirectional | Gate connection to external transistor; connect to S15 if unused. |
| 15 | S14 | bidirectional | Source connection to external transistor; connect to G14 if unused. |
| 16 | G14 | bidirectional | Gate connection to external transistor; connect to S14 if unused. |
| 17 | S13 | bidirectional | Source connection to external transistor; connect to G13 if unused. |
| 18 | G13 | bidirectional | Gate connection to external transistor; connect to S13 if unused. |
| 19 | G12 | bidirectional | Gate connection to external transistor; connect to S12 if unused. |
| 20 | S12 | bidirectional | Source connection to external transistor; connect to G12 if unused. |
| 21 | G11 | bidirectional | Gate connection to external transistor; connect to S11 if unused. |
| 22 | S11 | bidirectional | Source connection to external transistor; connect to G11 if unused. |
| 23 | G10 | bidirectional | Gate connection to external transistor; connect to S10 if unused. |
| 24 | S10 | bidirectional | Source connection to external transistor; connect to G10 if unused. |
| 25 | G9 | bidirectional | Gate connection to external transistor; connect to S9 if unused. |
| 26 | S9 | bidirectional | Source connection to external transistor; connect to G9 if unused. |
| 27 | xFAULT | output | Open drain fault output; connect pull-up to V3_2; leave open if unused. |
| 28 | SCMP1 | input | Input of short comparator 1; connect to VSS. |
| 29 | SCMP2 | input | Input of short comparator 2; connect to VSS. |
| 30 | xCS | input | SPI interface chip select input with pull-up; leave open if unused. |
| 31 | SDO | tri_state | SPI interface data output with tristate; leave open if unused. |
| 32 | PSE | input | Phase shift enable input; connect to VSS. |
| 33 | SCL | input | SPI interface clock input with pull-down; leave open if unused. |
| 34 | SDI | input | SPI interface data input with pull-down; leave open if unused. |
| 35 | S8 | bidirectional | Source connection to external transistor; connect to G8 if unused. |
| 36 | G8 | bidirectional | Gate connection to external transistor; connect to S8 if unused. |
| 37 | S7 | bidirectional | Source connection to external transistor; connect to G7 if unused. |
| 38 | G7 | bidirectional | Gate connection to external transistor; connect to S7 if unused. |
| 39 | S6 | bidirectional | Source connection to external transistor; connect to G6 if unused. |
| 40 | G6 | bidirectional | Gate connection to external transistor; connect to S6 if unused. |
| 41 | S5 | bidirectional | Source connection to external transistor; connect to G5 if unused. |
| 42 | G5 | bidirectional | Gate connection to external transistor; connect to S5 if unused. |
| 43 | G4 | bidirectional | Gate connection to external transistor; connect to S4 if unused. |
| 44 | S4 | bidirectional | Source connection to external transistor; connect to G4 if unused. |
| 45 | G3 | bidirectional | Gate connection to external transistor; connect to S3 if unused. |
| 46 | S3 | bidirectional | Source connection to external transistor; connect to G3 if unused. |
| 47 | G2 | bidirectional | Gate connection to external transistor; connect to S2 if unused. |
| 48 | S2 | bidirectional | Source connection to external transistor; connect to G2 if unused. |
| 49 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Dialog Semiconductor |
| Package | VQFN-48-EP(7x7) |
| Category | Display Modules / LED Drivers / Display Drivers |
| Pins | 49 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply Voltage to Ground | VDDMAX / VGND | -0.3 | | 7 | V | Applicable for pin VDD | 6 |
| Maximum Voltage Analog pins | VANAMAX | -0.3 | | 7 | V | Applicable for pins: FB1, FB2, G1-G16, S1-S16, VSYNC, HSYNC | 6 |
| Maximum Voltage Digital pins | VDIGMAX | -0.3 | | 5 | V | Applicable for pins: V3_2, SDI, SDO, SCL, xCS, SCMP1, SCMP2, xFAULT, PSE | 6 |
| Input Current (latch-up immunity) | ISCR | -100 | | 100 | mA | JEDEC JESD78D Nov 2011 | 6 |
| Electrostatic Discharge HBM | ESDHBM | -2000 | | 2000 | V | JS-001-2012 | 6 |
| Electrostatic Discharge CDM | ESDCDM | -500 | | 500 | V | JEDEC JESD22-C101F Oct 2013 | 6 |
| Electrostatic Discharge MM | ESDMM | -200 | | 200 | V | JESD22-A115C | 6 |
| Operating Junction Temperature | TJ | -20 | | 115 | °C | | 6 |
| Storage Temperature Range | TSTRG | -55 | | 150 | °C | | 6 |
| Relative Humidity (non-condensing) | RHNC | 5 | | 85 | % | | 6 |
| Junction to Ambient Thermal Resistance | RTHJA | | 35 | | °C/W | RTHJA typical | 6 |
## Materials and finish
As the datasheet states them (page.json `metadata.appearance`; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| housing | PC | | Package Body Temperature TBODY IPC/JEDEC J-STD-020 | 6 |
## CAD (KiCad official)
- Symbol: `AS3824E1-ZQFT`
- Footprint: `Package_DFN_QFN:QFN-48-1EP_7x7mm_P0.5mm_EP5.15x5.15mm`
- 3D model: VQFN-48-EP(7x7) (KiCad packages3D, STEP)
- 3D model files: `as3824e1-zqft-etched.step` / `as3824e1-zqft-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `as3824e1-zqft.step` / `as3824e1-zqft.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Dialog Semiconductor datasheet](docs/as3824e1-zqft-datasheet.pdf) (9 pp, sha256 `4fcdd3b5dd43293f`, retrieved 2026-11-02, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/as3824e1-zqft-datasheet.pdf)