AS179-92LF

{
 "schema": "adom.pads/1",
 "slug": "as179-92lf",
 "footprint": "SOT-363_SC-70-6",
 "generated_from": {
  "footprint": "SOT-363_SC-70-6@sha256:0659d885e00b7869",
  "pins": "page.json:component.pins",
  "overrides": null
 },
 "pin1": {
  "pad": "1",
  "at": [
   -0.8375,
   -0.65
  ],
  "corner": "top-left",
  "source": "silk-marker",
  "derived_from": "SOT-363_SC-70-6@sha256:0659d885e00b7869"
 },
 "pad_count": 6,
 "symbol_pins": [
  "1",
  "2",
  "3",
  "4",
  "5",
  "6"
 ],
 "paste_apertures": 0,
 "issues": [],
 "pads": [
  {
   "pad": "1",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    -0.8375,
    -0.65
   ],
   "rot": 0.0,
   "size": [
    1.025,
    0.35
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "1",
   "name": "J3",
   "type": "passive",
   "description": "RF port J3. One of the two 'throw' RF ports of the SPDT switch; 50 Ω characteristic impedance. Requires a 100 pF DC-blocking capacitor for >500 MHz operation (larger values for lower frequencies).",
   "is_pin1": true,
   "source": {
    "geometry": "SOT-363_SC-70-6.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "2",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    -0.8375,
    0.0
   ],
   "rot": 0.0,
   "size": [
    1.025,
    0.35
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "2",
   "name": "GND",
   "type": "power_in",
   "description": "Ground return for the switch. Must be tied to the PCB ground plane with a low-inductance connection for proper RF performance.",
   "is_pin1": false,
   "source": {
    "geometry": "SOT-363_SC-70-6.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "3",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    -0.8375,
    0.65
   ],
   "rot": 0.0,
   "size": [
    1.025,
    0.35
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "3",
   "name": "J2",
   "type": "passive",
   "description": "RF port J2. The other 'throw' RF port of the SPDT switch; 50 Ω characteristic impedance. Requires a 100 pF DC-blocking capacitor for >500 MHz operation (larger values for lower frequencies).",
   "is_pin1": false,
   "source": {
    "geometry": "SOT-363_SC-70-6.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "4",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    0.8375,
    0.65
   ],
   "rot": 0.0,
   "size": [
    1.025,
    0.35
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "4",
   "name": "V1",
   "type": "input",
   "description": "DC control voltage input V1. Complementary control with V2 selects the active RF path. VCTL low = 0 to 0.2 V (@ 20 μA max); VCTL high = 2.0 V (@ 100 μA max) or 5.0 V (@ 200 μA max). Absolute maximum range -1.2 V to +8.0 V.",
   "is_pin1": false,
   "source": {
    "geometry": "SOT-363_SC-70-6.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "5",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    0.8375,
    0.0
   ],
   "rot": 0.0,
   "size": [
    1.025,
    0.35
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "5",
   "name": "J1",
   "type": "passive",
   "description": "RF common port J1 (the 'pole' of the SPDT). Routed to either J2 or J3 depending on the V1/V2 control state; 50 Ω characteristic impedance. Requires a 100 pF DC-blocking capacitor for >500 MHz operation.",
   "is_pin1": false,
   "source": {
    "geometry": "SOT-363_SC-70-6.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  },
  {
   "pad": "6",
   "kind": "smd",
   "shape": "roundrect",
   "at": [
    0.8375,
    -0.65
   ],
   "rot": 0.0,
   "size": [
    1.025,
    0.35
   ],
   "layers": [
    "F.Cu",
    "F.Mask",
    "F.Paste"
   ],
   "thermal": false,
   "pin": "6",
   "name": "V2",
   "type": "input",
   "description": "DC control voltage input V2. Complementary control with V1 selects the active RF path. VCTL low = 0 to 0.2 V (@ 20 μA max); VCTL high = 2.0 V (@ 100 μA max) or 5.0 V (@ 200 μA max). Absolute maximum range -1.2 V to +8.0 V.",
   "is_pin1": false,
   "source": {
    "geometry": "SOT-363_SC-70-6.kicad_mod",
    "meaning": "page.json:component.pins",
    "correspondence": "kicad: symbol pin number == pad name"
   }
  }
 ]
}