# APS11900LLHALT

**Allegro MicroSystems, LLC** · Magnetic Sensors · SOT-23W

APS11900LLHALT from Allegro MicroSystems, LLC, in a SOT-23W. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VCC | power_in | Supply voltage; the LH package is specified for operation from 3.0 V to 24 V. |
| 2 | GND | power_in | Ground terminal; for best performance, tie pins 2 and 3 together close to the IC. |
| 3 | GND | power_in | Ground terminal; for best performance, tie pins 2 and 3 together close to the IC. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Allegro MicroSystems, LLC |
| Package | SOT-23W |
| Category | Sensors |
| Pins | 3 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply Voltage (operating, TJ < 165°C, LH and UA packages) | VCC | 3 |  | 24 | V | Operating, TJ < 165°C LH and UA packages | 4 |
| Supply Current, default ICC(L) level | ICC(L1) | 5 |  | 6.9 | mA | ICC(L1) is the default ICC(L) current | 4 |
| Supply Current, ICC(L2) level | ICC(L2) | 2 |  | 5 | mA |  | 4 |
| Supply Current, high state | ICC(H) | 12 |  | 17 | mA |  | 4 |
| Safe Current State | ISAFE |  |  | 1.8 | mA | Safe current state; indicates overtemperature or EEPROM error | 4 |
| Power-On Time | tPO |  |  | 70 | µs | VCC ≥ VCC(min), B > BOP(max), B < BRP(min) | 4 |
| Supply Zener Clamp Voltage | VZ | 40 |  |  | V | ICC = ICC(H) + 1 mA, TA = 25°C | 4 |
| Reverse Supply Zener Clamp Voltage | VRZ |  |  | -23 | V | ICC = -1 mA | 4 |
| Initial Operate Point | BOP(init) | 60 | 80 | 100 | G | TA = 25°C | 5 |
| Programmable Magnetic Operating Point, switch mode (magnitude) | BOP(range) | 10 |  | 600 | G | Switch Mode, TA = 25°C; 8 bits | 5 |
| Programmable Magnetic Operating Point, latch mode (magnitude) | BOP(range) | 20 |  | 600 | G | Latch Mode, TA = 25°C; 8 bits | 5 |
| Average Magnetic Step Size | BOP(STEP) | 2 | 3 | 4.5 | G | TA = 25°C | 5 |
| Initial Hysteresis | BHYS(init) | 5 | 15 | 30 | G | TA = 25°C | 5 |
| Average Hysteresis Step Size | BHYS(STEP) | 1.5 | 3 | 5 | G | TA = 25°C | 5 |
| Programmable Hysteresis in Switch Mode | BHYS(range) | 15 |  | 70 | G | TA = 25°C; 5 bits. Switch mode only. | 5 |
| Initial Release Point | BRP(init) | 45 |  | 85 | G | TA = 25°C | 5 |
| Initial Operate Point Over Temperature | BOP(init)_T | 65 |  | 113 | G | TA = -40°C; default programming, ferrite temperature coefficient | 5 |
| Initial Operate Point Over Temperature | BOP(init)_T | 49 |  | 80 | G | TA = 150°C; default programming, ferrite temperature coefficient | 5 |
| Initial Release Point Over Temperature | BRP(init)_T | 51 |  | 98 | G | TA = -40°C; default programming: BOP(init) = 80 G (typ) at 25°C and ferrite temperature coefficient | 5 |
| Initial Release Point Over Temperature | BRP(init)_T | 36 |  | 72 | G | TA = 150°C; default programming: BOP(init) = 80 G (typ) at 25°C and ferrite temperature coefficient | 5 |
| Initial Hysteresis Over Temperature | BHYS(init)_T | 5 |  | 30 | G | TA = -40°C; default programming, ferrite temperature coefficient | 5 |
| Supply Voltage (absolute maximum) | VCC |  |  | 40 | V |  | 2 |
| Reverse Supply Voltage (absolute rating) | VRCC | -23 |  |  | V |  | 2 |
| Maximum Number of EEPROM Write Cycles | EEPROMW(max) |  |  | 100 | cycles |  | 2 |
| Maximum Junction Temperature | TJ(max) |  |  | 165 | °C |  | 2 |
| Maximum Junction Temperature | TJ(max) |  |  | 175 | °C | For 500 hours | 2 |
| Storage Temperature | Tstg | -65 |  | 170 | °C |  | 2 |
| Operating Ambient Temperature (LH package, selection guide) | TA | -40 |  | 150 | °C | APS11900LLHALT, 3-pin SOT23-W | 2 |
| Package Thermal Resistance, LH on 1-layer PCB (JEDEC standard 228) | RθJA |  | 228 |  | °C/W | Package LH, on 1-layer PCB based on JEDEC standard | 7 |
| Package Thermal Resistance, LH on 2-layer PCB | RθJA |  | 110 |  | °C/W | Package LH, on 2-layer PCB with 0.463 in.2 of copper area each side | 7 |

## Materials and finish

As the datasheet states them (page.json `metadata.appearance`; the 3D model's colours follow it).

| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts |  | tin | and lead (Pb) free with 100% matte-tin-plated leadframes. For situations where a functionally equivalent but factory￾programmed two-wire switch or latch is preferred, refer to the | 2 |

## CAD (KiCad official)

- Symbol: `APS11900LLHALT`
- Footprint: `Package_TO_SOT_SMD:SOT-23`
- 3D model: SOT-23W (KiCad packages3D, STEP)
- 3D model files: `aps11900llhalt-etched.step` / `aps11900llhalt-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `aps11900llhalt.step` / `aps11900llhalt.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Allegro MicroSystems, LLC datasheet](docs/aps11900llhalt-datasheet.pdf) (21 pp, sha256 `0eb8bb4561998013`, retrieved 2026-10-31, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/aps11900llhalt-datasheet.pdf)