component
APR348W6-7
Public Made by Adomby adom
Diodes Incorporated Monitors & Reset Circuits, SOT-26. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
| Name | Last updated |
|---|---|
| docs | 7h ago |
| viewers | 7h ago |
| apr348w6-7-etched.glb | 7h ago |
| apr348w6-7-etched.step | 7h ago |
| apr348w6-7-hero.glb | 7h ago |
| apr348w6-7-hero.overlay.json | 7h ago |
| apr348w6-7.glb | 7h ago |
| apr348w6-7.kicad_mod | 7h ago |
| apr348w6-7.kicad_sym | 7h ago |
| apr348w6-7.lbr | 7h ago |
| apr348w6-7.step | 7h ago |
| package.json | 7h ago |
| page.json | 7h ago |
| README.md | 7h ago |
APR348W6-7
Diodes Incorporated · Monitors & Reset Circuits · SOT-26
APR348W6-7 from Diodes Incorporated, in a SOT-26. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VCC | power_in | Internal linear regulator input; the datasheet rates VCC supply voltage at -0.3 to 28 V. |
| 2 | GND | power_in | Ground, also used as the FET source sense reference for VDET. |
| 3 | Rx | passive | External fixed resistor pin for the accurate turn-on signal; the datasheet proposes 30kΩ to 40kΩ for Rx. |
| 4 | VDD | power_out | Linear regulator output that biases the internal logic and MOSFET driver; connect a capacitor to this pin, with a typical 4.7µF proposed. |
| 5 | DRISR | output | Synchronous rectification MOSFET gate drive output; the datasheet rates the DRISR pin voltage at -0.3 to 7 V. |
| 6 | VDET | input | Synchronous rectification MOSFET drain voltage sense input, rated at -0.7 to 150 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Diodes Incorporated |
| Package | SOT-26 |
| Category | Power Management ICs |
| Pins | 6 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply Voltage | VCC | -0.3 | 28 | V | 3 | ||
| Voltage at VDET Pin | VDET | -0.7 | 150 | V | 3 | ||
| Voltage at DRISR Pin | VDRISR | -0.3 | 7 | V | 3 | ||
| Voltage at Rx Pin | VRX | -0.3 | 7 | V | 3 | ||
| Power Dissipation | PD | 0.6 | W | TA = +25°C | 3 | ||
| Operating Junction Temperature | TJ | 150 | °C | 3 | |||
| Storage Temperature | TSTG | -65 | 150 | °C | 3 | ||
| Lead Temperature (Soldering) | TLEAD | 300 | °C | Soldering, 10s | 3 | ||
| Human Body Model ESD (except VDET pin) | ESD | 6000 | V | Human Body Model, except VDET pin (Note 6) | 3 | ||
| Charge Device Model ESD | ESD | 1500 | V | Charge Device Model | 3 | ||
| VCC LDO Disable Threshold at VCC | VLDO_DISABLE | 4.25 | 4.55 | 4.85 | V | Falling | 4 |
| VCC LDO Enable Threshold at VCC | VLDO_ENSABLE | 4.35 | 4.65 | 4.95 | V | Rising | 4 |
| VDD Internal Power Supply | VDD | 5 | 5.5 | 6 | V | VCC = 12V, VDET = 12V | 4 |
| VDD Internal Power Supply | VDD | 5.3 | 5.9 | 6.5 | V | VCC = 3V, VDET = 12V | 4 |
| VDD Startup Current | ISTARTUP | 125 | 160 | µA | VCC = 0, VDET = VDD = VDD_ST - 0.1V | 4 | |
| VDD Startup Voltage | VDD_ST | 3.55 | 3.75 | 3.95 | V | 4 | |
| VDD UVLO Voltage | VDD_UVLO | 3.3 | 3.5 | 3.7 | V | 4 | |
| Quiescent Current | IQ_VDD | 170 | 220 | µA | VDD = 5.5V, VCC = 0 | 4 | |
| Gate Turn-On Threshold Voltage at VDET Pin | VTHON | -130 | -90 | -60 | mV | 4 | |
| Gate Regulation Voltage at VDET Pin | VFWD | -55 | -45 | -35 | mV | 4 | |
| Gate Turn-Off Threshold Voltage at VDET Pin | VTHOFF | -7 | 0 | mV | 4 | ||
| Synchronous Rectification Drive Voltage Low | VDRISR(Low) | 70 | 140 | mV | IG_LOAD = 100mA, VDD = 5V | 4 | |
| Turn-On Delay Time | tDON | 30 | 60 | ns | CLOAD = 2.2nF | 4 | |
| Turn-Off Propagation Delay Time | tDOFF | 25 | 45 | ns | CLOAD = 2.2nF | 4 | |
| Minimum On-Time | tON_MIN | 0.8 | 1.2 | 1.6 | µs | 4 | |
| Pull-Down Impedance | Rg | 0.7 | 1.4 | Ω | IG_LOAD = 100mA, VDD = 5V | 4 | |
| VCC LDO Operating Hysteresis at VCC Pin | VLDO_HYS | 100 | mV | 4 | |||
| UVLO Hysteresis | VUVLO | 0.25 | V | 4 | |||
| Maximum Source Current | ISOURCE | 0.6 | A | Note 9 | 4 | ||
| Maximum Sink Current | ISINK | 3.5 | A | Note 9 | 4 | ||
| Thermal Resistance (Junction to Ambient) | θJA | 197 | °C/W | Note 5: FR-4 PCB, 2oz copper, 1 inch2 cooling area | 3 | ||
| Thermal Resistance (Junction to Case) | θJC | 76 | °C/W | Note 5: FR-4 PCB, 2oz copper, 1 inch2 cooling area | 3 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | tin | Terminals: Finish, Matte Tin Plated Leads, Solderable per M2003 JESD22-B102, Method 208 | 1 |
CAD (KiCad official)
- Symbol:
APR348W6-7 - Footprint:
Package_TO_SOT_SMD:SOT-23-6 - 3D model: SOT-26 (KiCad packages3D, STEP)
- 3D model files:
apr348w6-7-etched.step/apr348w6-7-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);apr348w6-7.step/apr348w6-7.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Diodes Incorporated datasheet (9 pp, sha256
b1492e637e48b98c, retrieved 2026-10-27, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusoff(skipped (clean text read)), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).